MIPS: Cavium: Add EDAC support.
Drivers for EDAC on Cavium. Supported subsystems are: o CPU primary caches. These are parity protected only, so only error reporting. o Second level cache - ECC protected, provides SECDED. o Memory: ECC / SECDEC if used with suitable DRAM modules. The driver will will only initialize if ECC is enabled on a system so is safe to run on non-ECC memory. o PCI: Parity error reporting Since it is very hard to test this sort of code the implementation is very conservative and uses polling where possible for now. Signed-off-by: NRalf Baechle <ralf@linux-mips.org> Reviewed-by: NBorislav Petkov <borislav.petkov@amd.com>
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drivers/edac/octeon_edac-l2c.c
0 → 100644
drivers/edac/octeon_edac-lmc.c
0 → 100644
drivers/edac/octeon_edac-lmc.h
0 → 100644
drivers/edac/octeon_edac-pc.c
0 → 100644
drivers/edac/octeon_edac-pci.c
0 → 100644
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