1. 01 10月, 2013 10 次提交
  2. 21 9月, 2013 2 次提交
  3. 17 9月, 2013 6 次提交
  4. 13 9月, 2013 2 次提交
  5. 10 9月, 2013 1 次提交
  6. 09 9月, 2013 1 次提交
  7. 07 9月, 2013 1 次提交
    • V
      drm/i915: Delay disabling of VGA memory until vgacon->fbcon handoff is done · 6e1b4fda
      Ville Syrjälä 提交于
      When transitioning away from vgacon the system tries to save the
      current contents of the VGA memory, so that it can be cleanly handed
      off to fbcon (or whatever comes afterwards).
      
      The recent change
      
       commit 81b5c7bc
       Author: Alex Williamson <alex.williamson@redhat.com>
       Date:   Wed Aug 28 09:39:08 2013 -0600
      
          i915: Update VGA arbiter support for newer devices
      
      caused i915 to disable VGA memory decode for the IGD when i915 is
      initializing. Unfortunately that happens before the vgacon->fbcon
      handoff so vgacon_save_screen() will read out all ones from the
      VGA memory.
      
      After the handoff fbcon will inherit the bogus state from vgacon,
      and pre-fills the fb with matching contents. The end result is
      a white rectangle in the top left corner of the screen, the size
      of which matches the now inactive VGA console.
      
      To remedy the situation delay the disabling of VGA memory until
      the vgacon->fbcon handoff has happened.
      
      Also rename i915_enable_vga to i915_enable_vga_mem to make
      the relationship between these functions clearer.
      
      Cc: Alex Williamson <alex.williamson@redhat.com>
      Signed-off-by: NVille Syrjälä <ville.syrjala@linux.intel.com>
      Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
      6e1b4fda
  8. 04 9月, 2013 4 次提交
  9. 23 8月, 2013 3 次提交
    • P
      drm/i915: allow package C8+ states on Haswell (disabled) · c67a470b
      Paulo Zanoni 提交于
      This patch allows PC8+ states on Haswell. These states can only be
      reached when all the display outputs are disabled, and they allow some
      more power savings.
      
      The fact that the graphics device is allowing PC8+ doesn't mean that
      the machine will actually enter PC8+: all the other devices also need
      to allow PC8+.
      
      For now this option is disabled by default. You need i915.allow_pc8=1
      if you want it.
      
      This patch adds a big comment inside i915_drv.h explaining how it
      works and how it tracks things. Read it.
      
      v2: (this is not really v2, many previous versions were already sent,
           but they had different names)
          - Use the new functions to enable/disable GTIMR and GEN6_PMIMR
          - Rename almost all variables and functions to names suggested by
            Chris
          - More WARNs on the IRQ handling code
          - Also disable PC8 when there's GPU work to do (thanks to Ben for
            the help on this), so apps can run caster
          - Enable PC8 on a delayed work function that is delayed for 5
            seconds. This makes sure we only enable PC8+ if we're really
            idle
          - Make sure we're not in PC8+ when suspending
      v3: - WARN if IRQs are disabled on __wait_seqno
          - Replace some DRM_ERRORs with WARNs
          - Fix calls to restore GT and PM interrupts
          - Use intel_mark_busy instead of intel_ring_advance to disable PC8
      v4: - Use the force_wake, Luke!
      v5: - Remove the "IIR is not zero" WARNs
          - Move the force_wake chunk to its own patch
          - Only restore what's missing from RC6, not everything
      Signed-off-by: NPaulo Zanoni <paulo.r.zanoni@intel.com>
      Reviewed-by: NChris Wilson <chris@chris-wilson.co.uk>
      Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
      c67a470b
    • P
      drm/i915: wrap GEN6_PMIMR changes · edbfdb45
      Paulo Zanoni 提交于
      Just like we're doing with the other IMR changes.
      
      One of the functional changes is that not every caller was doing the
      POSTING_READ.
      Signed-off-by: NPaulo Zanoni <paulo.r.zanoni@intel.com>
      Reviewed-by: NRodrigo Vivi <rodrigo.vivi@gmail.com>
      Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
      edbfdb45
    • P
      drm/i915: wrap GTIMR changes · 43eaea13
      Paulo Zanoni 提交于
      Just like the functions that touch DEIMR and SDEIMR, but for GTIMR.
      The new functions contain a POSTING_READ(GTIMR) which was not present
      at the 2 callers inside i915_irq.c.
      
      The implementation is based on ibx_display_interrupt_update.
      Signed-off-by: NPaulo Zanoni <paulo.r.zanoni@intel.com>
      Reviewed-by: NRodrigo Vivi <rodrigo.vivi@gmail.com>
      Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
      43eaea13
  10. 09 8月, 2013 4 次提交
  11. 08 8月, 2013 5 次提交
  12. 07 8月, 2013 1 次提交