- 12 10月, 2016 3 次提交
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由 Bjorn Helgaas 提交于
The DRV_NAME macro is only used once, so there's no real advantage to having the macro at all. Remove it and use the "rcar-pcie" name directly in the struct platform_driver. No functional change intended. Signed-off-by: NBjorn Helgaas <bhelgaas@google.com> Acked-by: NSimon Horman <horms+renesas@verge.net.au>
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由 Bjorn Helgaas 提交于
rcar_pcie_get_resources() doesn't use the platform_device pointer passed to it, so remove it. No functional change intended. Signed-off-by: NBjorn Helgaas <bhelgaas@google.com> Acked-by: NSimon Horman <horms+renesas@verge.net.au>
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由 Bjorn Helgaas 提交于
The rcar driver never uses the platform drvdata pointer, so don't bother setting it. No functional change intended. Signed-off-by: NBjorn Helgaas <bhelgaas@google.com> Acked-by: NSimon Horman <horms+renesas@verge.net.au>
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- 11 10月, 2016 1 次提交
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由 Bjorn Helgaas 提交于
Use a local "struct device *dev" for brevity and consistency with other drivers. No functional change intended. Signed-off-by: NBjorn Helgaas <bhelgaas@google.com> Acked-by: NSimon Horman <horms+renesas@verge.net.au>
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- 05 10月, 2016 1 次提交
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由 Sergei Shtylyov 提交于
The PCIe link speed is initially set to 2.5 GT/s. Try to increase the link speed to 5 GT/s. Based on original patch by Grigory Kletsko <grigory.kletsko@cogentembedded.com>. [bhelgaas: remove "Trying speed up" message, remove unused SPCHG] Signed-off-by: NSergei Shtylyov <sergei.shtylyov@cogentembedded.com> Signed-off-by: NBjorn Helgaas <bhelgaas@google.com> Acked-by: NSimon Horman <horms+renesas@verge.net.au>
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- 15 9月, 2016 2 次提交
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由 Sergei Shtylyov 提交于
The R-Car PCIe driver causes 13 warnings from scripts/checkpatch.pl -- let's fix at least 10 easier ones: - line over 80 characters; - blank line missing after declarations; - statements not starting on a tabstop. Signed-off-by: NSergei Shtylyov <sergei.shtylyov@cogentembedded.com> Signed-off-by: NBjorn Helgaas <bhelgaas@google.com> Acked-by: NSimon Horman <horms+renesas@verge.net.au>
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由 Grigory Kletsko 提交于
Implement the MSI .setup_irqs() method which enables allocation of several MSIs at once. [Sergei Shtylyov: removed unrelated/unneeded changes, fixed too long lines, reordered the variable declarations, reworded the summary/description.] Signed-off-by: NGrigory Kletsko <grigory.kletsko@cogentembedded.com> Signed-off-by: NSergei Shtylyov <sergei.shtylyov@cogentembedded.com> Signed-off-by: NBjorn Helgaas <bhelgaas@google.com> Acked-by: NSimon Horman <horms+renesas@verge.net.au>
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- 13 9月, 2016 1 次提交
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由 Geert Uytterhoeven 提交于
If clk_prepare_enable() fails, we must not call clk_disable_unprepare() in the error path. Signed-off-by: NGeert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
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- 07 9月, 2016 1 次提交
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由 Lorenzo Pieralisi 提交于
On ARM/ARM64 architectures, PCI IO ports are emulated through memory mapped IO, by reserving a chunk of virtual address space starting at PCI_IOBASE and by mapping the PCI host bridges memory address space driving PCI IO cycles to it. PCI host bridge drivers that enable downstream PCI IO cycles map the host bridge memory address responding to PCI IO cycles to the fixed virtual address space through the pci_remap_iospace() API. This means that if the pci_remap_iospace() function fails, the corresponding host bridge PCI IO resource must be considered invalid, in that there is no way for the kernel to actually drive PCI IO transactions if the memory addresses responding to PCI IO cycles cannot be mapped into the CPU virtual address space. The PCI rcar host bridge driver does not remove the PCI IO resource from the host bridge resource windows if the pci_remap_iospace() call fails; this is an actual bug in that the PCI host bridge would consider the PCI IO resource valid (and possibly assign it to downstream devices) even if the kernel was not able to map the PCI host bridge memory address driving IO cycle to the CPU virtual address space (ie pci_remap_iospace() failures). Fix the PCI host bridge driver pci_remap_iospace() failure path, by destroying the PCI host bridge PCI IO resources retrieved through firmware when the pci_remap_iospace() function call fails, therefore preventing the kernel from adding the respective PCI IO resource to the list of PCI host bridge valid resources, fixing the issue. Fixes: 5d2917d4 ("PCI: rcar: Convert to DT resource parsing API") Signed-off-by: NLorenzo Pieralisi <lorenzo.pieralisi@arm.com> Signed-off-by: NBjorn Helgaas <bhelgaas@google.com> CC: Phil Edworthy <phil.edworthy@renesas.com> CC: Simon Horman <horms+renesas@verge.net.au>
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- 23 8月, 2016 1 次提交
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由 Bjorn Helgaas 提交于
Move the devm_ioremap_resource() of R-Car register space next to the of_address_to_resource() that extracts the resource. No functional change intended. Signed-off-by: NBjorn Helgaas <bhelgaas@google.com> Reviewed-by: NGeert Uytterhoeven <geert+renesas@glider.be>
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- 02 8月, 2016 1 次提交
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由 Paul Gortmaker 提交于
This code is not being built as a module by anyone: drivers/pci/host/Kconfig:config PCI_RCAR_GEN2_PCIE drivers/pci/host/Kconfig: bool "Renesas R-Car PCIe controller" Remove uses of MODULE_DESCRIPTION(), MODULE_AUTHOR(), MODULE_LICENSE(), etc., so that when reading the driver there is no doubt it is builtin-only. The information is preserved in comments at the top of the file. Replace module_platform_driver() with builtin_platform_driver(), which uses the same init level priority, so init ordering is unchanged. Note that MODULE_DEVICE_TABLE is a no-op for non-modular code. [bhelgaas: changelog, remove "Module" from author comment] Signed-off-by: NPaul Gortmaker <paul.gortmaker@windriver.com> Signed-off-by: NBjorn Helgaas <bhelgaas@google.com> Acked-by: NSimon Horman <horms+renesas@verge.net.au> Acked-by: NPhil Edworthy <phil.edworthy@renesas.com>
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- 25 6月, 2016 2 次提交
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由 Bjorn Helgaas 提交于
The switch is the only statement in the resource_list_for_each_entry() loop, so remove unnecessary cases and "continue" statements in the switch. Inline rcar_pcie_release_of_pci_ranges(), which is only called once. No functional change intended. Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
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由 Bjorn Helgaas 提交于
Use devm_request_pci_bus_resources() to request host bridge window resources instead of doing it by hand in the driver. No functional change intended. Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
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- 06 2月, 2016 1 次提交
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由 Lorenzo Pieralisi 提交于
The PCIe rcar host driver is not used in system configurations requiring the PCI_PROBE_ONLY flag to be set to prevent resources assignment, therefore the driver code handling the flag can be removed from the kernel. Signed-off-by: NLorenzo Pieralisi <lorenzo.pieralisi@arm.com> Signed-off-by: NBjorn Helgaas <bhelgaas@google.com> Acked-by: NSimon Horman <horms+renesas@verge.net.au> Cc: Arnd Bergmann <arnd@arndb.de> Cc: Phil Edworthy <phil.edworthy@renesas.com>
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- 11 1月, 2016 2 次提交
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由 Phil Edworthy 提交于
For PCIe compliance, the PHY registers need setting as per the manual. Signed-off-by: NPhil Edworthy <phil.edworthy@renesas.com> Signed-off-by: NBjorn Helgaas <bhelgaas@google.com> Reviewed-by: NWolfram Sang <wsa+renesas@sang-engineering.com>
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由 Phil Edworthy 提交于
If runtime PM is enabled in the kernel config, simply enable the clocks once during probe. Signed-off-by: NPhil Edworthy <phil.edworthy@renesas.com> Signed-off-by: NBjorn Helgaas <bhelgaas@google.com> Acked-by: NWolfram Sang <wsa+renesas@sang-engineering.com>
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- 09 1月, 2016 1 次提交
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由 Phil Edworthy 提交于
The pci_sys_data struct was previously used by pci_common_init_dev() and by the ARM pcibios_align_resource(), but recent commits removed those uses: cbce7900 ("PCI: designware: Make driver arch-agnostic") b3a72384 ("ARM/PCI: Replace pci_sys_data->align_resource with global function pointer") cbce7900 removed the use of pci_common_init_dev() by DesignWare drivers, including pcie-rcar.c, and b3a72384 removed the use of struct pci_sys_data by the ARM pcibios_align_resource(). Remove struct pci_sys_data from pcie-rcar.c. [bhelgaas: changelog] Signed-off-by: NPhil Edworthy <phil.edworthy@renesas.com> Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
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- 07 1月, 2016 1 次提交
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由 Grygorii Strashko 提交于
On -RT and if kernel is booting with "threadirqs" cmd line parameter, PCIe/PCI (MSI) IRQ cascade handlers (like dra7xx_pcie_msi_irq_handler()) will be forced threaded and, as result, will generate warnings like this: WARNING: CPU: 1 PID: 82 at kernel/irq/handle.c:150 handle_irq_event_percpu+0x14c/0x174() irq 460 handler irq_default_primary_handler+0x0/0x14 enabled interrupts Backtrace: (warn_slowpath_common) from (warn_slowpath_fmt+0x38/0x40) (warn_slowpath_fmt) from (handle_irq_event_percpu+0x14c/0x174) (handle_irq_event_percpu) from (handle_irq_event+0x84/0xb8) (handle_irq_event) from (handle_simple_irq+0x90/0x118) (handle_simple_irq) from (generic_handle_irq+0x30/0x44) (generic_handle_irq) from (dra7xx_pcie_msi_irq_handler+0x7c/0x8c) (dra7xx_pcie_msi_irq_handler) from (irq_forced_thread_fn+0x28/0x5c) (irq_forced_thread_fn) from (irq_thread+0x128/0x204) This happens because all of them invoke generic_handle_irq() from the requested handler. generic_handle_irq() grabs raw_locks and thus needs to run in raw-IRQ context. This issue was originally reproduced on TI dra7-evem, but, as was identified during discussion [1], other hosts can also suffer from this issue. Fix all them at once by marking PCIe/PCI (MSI) IRQ cascade handlers IRQF_NO_THREAD explicitly. [1] http://lkml.kernel.org/r/1448027966-21610-1-git-send-email-grygorii.strashko@ti.com [bhelgaas: add stable tag, fix typos] Signed-off-by: NGrygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: NBjorn Helgaas <bhelgaas@google.com> Acked-by: Lucas Stach <l.stach@pengutronix.de> (for imx6) CC: stable@vger.kernel.org CC: Kishon Vijay Abraham I <kishon@ti.com> CC: Jingoo Han <jingoohan1@gmail.com> CC: Kukjin Kim <kgene@kernel.org> CC: Krzysztof Kozlowski <k.kozlowski@samsung.com> CC: Richard Zhu <Richard.Zhu@freescale.com> CC: Thierry Reding <thierry.reding@gmail.com> CC: Stephen Warren <swarren@wwwdotorg.org> CC: Alexandre Courbot <gnurou@gmail.com> CC: Simon Horman <horms@verge.net.au> CC: Pratyush Anand <pratyush.anand@gmail.com> CC: Michal Simek <michal.simek@xilinx.com> CC: "Sören Brinkmann" <soren.brinkmann@xilinx.com> CC: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
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- 10 12月, 2015 1 次提交
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由 Simon Horman 提交于
Add fallback compatibility string for R-Car Gen 2 family. This is in keeping with the fallback scheme being adopted wherever appropriate for drivers for Renesas SoCs. Signed-off-by: NSimon Horman <horms+renesas@verge.net.au> Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
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- 09 12月, 2015 2 次提交
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由 Harunobu Kurokawa 提交于
Add the "renesas,pcie-r8a7795" property for the R-Car H3 device to the pcie-rcar driver. Tested-by: NWolfram Sang <wsa+renesas@sang-engineering.com> Signed-off-by: NHarunobu Kurokawa <harunobu.kurokawa.dn@renesas.com> Signed-off-by: NBjorn Helgaas <bhelgaas@google.com> Acked-by: NWolfram Sang <wsa+renesas@sang-engineering.com>
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由 Phil Edworthy 提交于
The main purpose of this change is to avoid calling pci_ioremap_io() as this is not available on arm64. However, instead of doing the range parsing in this driver we can utilise of_pci_get_host_bridge_resources(). This is similar to changes made to the generic PCI host driver in commit dbf9826d ("PCI: generic: Convert to DT resource parsing API") Reported-by: NWolfram Sang <wsa+renesas@sang-engineering.com> Tested-by: NWolfram Sang <wsa+renesas@sang-engineering.com> Signed-off-by: NPhil Edworthy <phil.edworthy@renesas.com> Signed-off-by: NBjorn Helgaas <bhelgaas@google.com> Acked-by: NSimon Horman <horms+renesas@verge.net.au>
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- 30 10月, 2015 4 次提交
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由 Phil Edworthy 提交于
Fix I/O offset for multiple host bridges. Signed-off-by: NPhil Edworthy <phil.edworthy@renesas.com> Signed-off-by: NBjorn Helgaas <bhelgaas@google.com> Acked-by: NSimon Horman <horms+renesas@verge.net.au>
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由 Phil Edworthy 提交于
On ARM64, setting the root bus number to -1 causes probe failure. Moreover, we should use the bus number specified in the DT as we could have multiple PCIe controllers with different bus ranges. Signed-off-by: NPhil Edworthy <phil.edworthy@renesas.com> Signed-off-by: NBjorn Helgaas <bhelgaas@google.com> Acked-by: NSimon Horman <horms+renesas@verge.net.au>
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由 Phil Edworthy 提交于
The R-Car PCIe host controller driver uses pci_common_init_dev(), which is ARM-specific and requires the ARM struct hw_pci. The part of pci_common_init_dev() that is needed is limited and can be done here without using hw_pci. Note that the ARM pcibios functions expect the PCI sysdata to be a pointer to a struct pci_sys_data. Add a struct pci_sys_data as the first element in struct gen_pci so that when we use a gen_pci pointer as sysdata, it is also a pointer to a struct pci_sys_data. Create and scan the root bus directly without using the ARM pci_common_init_dev() interface. Based on 499733e0 ("PCI: generic: Remove dependency on ARM-specific struct hw_pci"). Signed-off-by: NPhil Edworthy <phil.edworthy@renesas.com> Signed-off-by: NBjorn Helgaas <bhelgaas@google.com> Acked-by: NSimon Horman <horms+renesas@verge.net.au>
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由 Phil Edworthy 提交于
Make PCI aware of the I/O resources. Signed-off-by: NPhil Edworthy <phil.edworthy@renesas.com> Signed-off-by: NBjorn Helgaas <bhelgaas@google.com> Acked-by: NSimon Horman <horms+renesas@verge.net.au>
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- 12 8月, 2015 1 次提交
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由 Rob Herring 提交于
set_irq_flags is ARM-specific with custom flags which have genirq equivalents. Convert drivers to use the genirq interfaces directly, so we can kill off set_irq_flags. The translation of flags is as follows: IRQF_VALID -> !IRQ_NOREQUEST IRQF_PROBE -> !IRQ_NOPROBE IRQF_NOAUTOEN -> IRQ_NOAUTOEN For IRQs managed by an irqdomain, the irqdomain core code handles clearing and setting IRQ_NOREQUEST already, so there is no need to do this in .map() functions, and we can simply remove the set_irq_flags calls. Some users also modify IRQ_NOPROBE, and this has been maintained although it is not clear that is really needed. There appears to be a great deal of blind copy and paste of this code. Signed-off-by: NRob Herring <robh@kernel.org> Signed-off-by: NBjorn Helgaas <bhelgaas@google.com> Acked-by: NJingoo Han <jingoohan1@gmail.com> CC: Kishon Vijay Abraham I <kishon@ti.com> CC: Murali Karicheri <m-karicheri2@ti.com> CC: Thierry Reding <thierry.reding@gmail.com> CC: Stephen Warren <swarren@wwwdotorg.org> CC: Alexandre Courbot <gnurou@gmail.com> CC: Jingoo Han <jingoohan1@gmail.com> CC: Pratyush Anand <pratyush.anand@gmail.com> CC: Simon Horman <horms@verge.net.au> CC: Michal Simek <michal.simek@xilinx.com> CC: "Sören Brinkmann" <soren.brinkmann@xilinx.com>
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- 24 2月, 2015 3 次提交
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由 Nobuhiro Iwamatsu 提交于
PCIEPARL and PCIEPARH are macros that calculate register addresses. However, the register names are incorrect. Change them to PCIEPALR and PCIEPAUR. Signed-off-by: NNobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Signed-off-by: NBjorn Helgaas <bhelgaas@google.com> Acked-by: NPhil Edworthy <phil.edworthy@renesas.com> Acked-by: NSimon Horman <horms+renesas@verge.net.au>
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由 Nobuhiro Iwamatsu 提交于
The lower 7 bits of PCIEPARL are reserved. When we write to this register, these bits must be 0. Signed-off-by: NNobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Signed-off-by: NBjorn Helgaas <bhelgaas@google.com> Acked-by: NPhil Edworthy <phil.edworthy@renesas.com> Acked-by: NSimon Horman <horms+renesas@verge.net.au>
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由 Nobuhiro Iwamatsu 提交于
The MSI enable is bit 31, not bit 28. Set the correct bit to initialize MSI. Per Phil, "this is odd as MSI works before and after your patch. Since bit 31 just represents the value of MSICAP0[16].MSIE, I think this may just be used for endpoints. However, you are correct that the bit used was wrong." Signed-off-by: NNobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Signed-off-by: NBjorn Helgaas <bhelgaas@google.com> Acked-by: NPhil Edworthy <phil.edworthy@renesas.com> Acked-by: NSimon Horman <horms+renesas@verge.net.au>
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- 28 12月, 2014 1 次提交
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由 Lorenzo Pieralisi 提交于
Most if not all ARM PCI host controller device drivers either ignore the domain field in the pci_sys_data structure or just increment it every time a host controller is probed, using it as a domain counter. Therefore, instead of relying on pci_sys_data to stash the domain number in a standard location, ARM pcibios code can be moved to the newly introduced generic PCI domains code, implemented in commits: 41e5c0f8 ("of/pci: Add pci_get_new_domain_nr() and of_get_pci_domain_nr()") 670ba0c8 ("PCI: Add generic domain handling") ARM code is made to select PCI_DOMAINS_GENERIC by default, which builds core PCI code that assigns the domain number through the generic function: void pci_bus_assign_domain_nr(...) that relies on a DT property to define the domain number or falls back to a counter according to a predefined logic; its usage replaces the current domain assignment code in PCI host controllers present in the kernel. Tested-by: NLucas Stach <l.stach@pengutronix.de> Signed-off-by: NLorenzo Pieralisi <lorenzo.pieralisi@arm.com> Signed-off-by: NBjorn Helgaas <bhelgaas@google.com> Reviewed-by: NYijing Wang <wangyijing@huawei.com> Reviewed-By: Jason Gunthorpe <jgunthorpe@obsidianresearch.com> # mvebu Acked-by: NRussell King <rmk+kernel@arm.linux.org.uk> Acked-by: NLucas Stach <l.stach@pengutronix.de> Acked-by: NJingoo Han <jg1.han@samsung.com> Acked-by: NPhil Edworthy <phil.edworthy@renesas.com> Acked-by: NArnd Bergmann <arnd@arndb.de> CC: Mohit Kumar <mohit.kumar@st.com>
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- 27 12月, 2014 1 次提交
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由 Dmitry Torokhov 提交于
Return value of irq_of_parse_and_map() is unsigned int, with 0 indicating failure, so testing for negative result never works. Signed-off-by: NDmitry Torokhov <dtor@chromium.org> Signed-off-by: NBjorn Helgaas <bhelgaas@google.com> Acked-by: NPhil Edworthy <phil.edworthy@renesas.com>
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- 23 11月, 2014 2 次提交
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由 Thomas Gleixner 提交于
The PCI/MSI irq chip callbacks mask/unmask_msi_irq have been renamed to pci_msi_mask/unmask_irq to mark them PCI specific. Rename all usage sites. The conversion helper functions are kept around to avoid conflicts in next and will be removed after merging into mainline. Coccinelle assisted conversion. No functional change. Signed-off-by: NThomas Gleixner <tglx@linutronix.de> Cc: Bjorn Helgaas <bhelgaas@google.com> Cc: Russell King <linux@arm.linux.org.uk> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: Heiko Carstens <heiko.carstens@de.ibm.com> Cc: "David S. Miller" <davem@davemloft.net> Cc: Chris Metcalf <cmetcalf@tilera.com> Cc: x86@kernel.org Cc: Jiang Liu <jiang.liu@linux.intel.com> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Murali Karicheri <m-karicheri2@ti.com> Cc: Thierry Reding <thierry.reding@gmail.com> Cc: Mohit Kumar <mohit.kumar@st.com> Cc: Simon Horman <horms@verge.net.au> Cc: Michal Simek <michal.simek@xilinx.com> Cc: Yijing Wang <wangyijing@huawei.com>
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由 Jiang Liu 提交于
Rename write_msi_msg() to pci_write_msi_msg() to mark it as PCI specific. Signed-off-by: NJiang Liu <jiang.liu@linux.intel.com> Cc: Bjorn Helgaas <bhelgaas@google.com> Cc: Grant Likely <grant.likely@linaro.org> Cc: Marc Zyngier <marc.zyngier@arm.com> Cc: Yingjoe Chen <yingjoe.chen@mediatek.com> Cc: Yijing Wang <wangyijing@huawei.com> Signed-off-by: NThomas Gleixner <tglx@linutronix.de>
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- 22 11月, 2014 1 次提交
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由 Yijing Wang 提交于
Save MSI controller in pci_sys_data instead of assigning MSI controller pointer to every PCI bus in .add_bus(). [bhelgaas: use struct rcar_msi.chip, not ctrl] Signed-off-by: NYijing Wang <wangyijing@huawei.com> Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
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- 12 11月, 2014 1 次提交
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由 Yijing Wang 提交于
"msi_chip" isn't very descriptive, so rename it to "msi_controller". That tells a little more about what it does and is already used in device tree bindings. No functional change. [bhelgaas: changelog, change *only* the struct name so it's reviewable] Suggested-by: NBjorn Helgaas <bhelgaas@google.com> Signed-off-by: NYijing Wang <wangyijing@huawei.com> Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
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- 24 10月, 2014 1 次提交
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由 Jingoo Han 提交于
Make rcar_pci static because it is used only in this file. Signed-off-by: NJingoo Han <jg1.han@samsung.com> Signed-off-by: NBjorn Helgaas <bhelgaas@google.com> Acked-by: NSimon Horman <horms+renesas@verge.net.au>
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- 20 10月, 2014 1 次提交
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由 Wolfram Sang 提交于
A platform_driver does not need to set an owner, it will be populated by the driver core. Signed-off-by: NWolfram Sang <wsa@the-dreams.de>
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- 01 10月, 2014 1 次提交
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由 Liviu Dudau 提交于
The ranges property for a host bridge controller in DT describes the mapping between the PCI bus address and the CPU physical address. The resources framework however expects that the IO resources start at a pseudo "port" address 0 (zero) and have a maximum size of IO_SPACE_LIMIT. The conversion from PCI ranges to resources failed to take that into account, returning a CPU physical address instead of a port number. Also fix all the drivers that depend on the old behaviour by fetching the CPU physical address based on the port number where it is being needed. Signed-off-by: NLiviu Dudau <Liviu.Dudau@arm.com> Signed-off-by: NBjorn Helgaas <bhelgaas@google.com> Acked-by: NLinus Walleij <linus.walleij@linaro.org> CC: Grant Likely <grant.likely@linaro.org> CC: Rob Herring <robh+dt@kernel.org> CC: Arnd Bergmann <arnd@arndb.de> CC: Thierry Reding <thierry.reding@gmail.com> CC: Simon Horman <horms@verge.net.au> CC: Catalin Marinas <catalin.marinas@arm.com>
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- 16 7月, 2014 1 次提交
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由 Bjorn Helgaas 提交于
Per license_is_gpl_compatible(), the MODULE_LICENSE() string for GPL v2 is "GPL v2", not "GPLv2". Use "GPL v2" so this module doesn't taint the kernel. Based-on-work-by: NThierry Reding <treding@nvidia.com> Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
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- 06 7月, 2014 1 次提交
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由 Phil Edworthy 提交于
rcar_pcie_setup_window() took both the window number and the resource, which was redundant because we can look up the resource from the window number. Remove the "res" argument. Signed-off-by: NPhil Edworthy <phil.edworthy@renesas.com> Signed-off-by: NBjorn Helgaas <bhelgaas@google.com> Acked-by: NSimon Horman <horms+renesas@verge.net.au>
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