- 25 10月, 2012 1 次提交
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由 Ivan Shugov 提交于
Newer at91sam9g10 SoC revision can't be detected, so the kernel can't boot with this kind of kernel panic: "AT91: Impossible to detect the SOC type" CPU: ARM926EJ-S [41069265] revision 5 (ARMv5TEJ), cr=00053177 CPU: VIVT data cache, VIVT instruction cache Machine: Atmel AT91SAM9G10-EK Ignoring tag cmdline (using the default kernel command line) bootconsole [earlycon0] enabled Memory policy: ECC disabled, Data cache writeback Kernel panic - not syncing: AT91: Impossible to detect the SOC type [<c00133d4>] (unwind_backtrace+0x0/0xe0) from [<c02366dc>] (panic+0x78/0x1cc) [<c02366dc>] (panic+0x78/0x1cc) from [<c02fa35c>] (at91_map_io+0x90/0xc8) [<c02fa35c>] (at91_map_io+0x90/0xc8) from [<c02f9860>] (paging_init+0x564/0x6d0) [<c02f9860>] (paging_init+0x564/0x6d0) from [<c02f7914>] (setup_arch+0x464/0x704) [<c02f7914>] (setup_arch+0x464/0x704) from [<c02f44f8>] (start_kernel+0x6c/0x2d4) [<c02f44f8>] (start_kernel+0x6c/0x2d4) from [<20008040>] (0x20008040) The reason for this is that the Debug Unit Chip ID Register has changed between Engineering Sample and definitive revision of the SoC. Changing the check of cidr to socid will address the problem. We do not integrate this check to the list just above because we also have to make sure that the extended id is disregarded. Signed-off-by: NIvan Shugov <ivan.shugov@gmail.com> [nicolas.ferre@atmel.com: change commit message] Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com> Acked-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Cc: stable <stable@vger.kernel.org> [v3.1] # since commit 8c3583b6
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- 04 10月, 2012 1 次提交
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由 Arnd Bergmann 提交于
On NOMMU systems, we do cannot remap the MMIO space, so the definition of at91_io_desc is unused. Without this patch, building at91x40_defconfig results in: arch/arm/mach-at91/setup.c:90:24: warning: 'at91_io_desc' defined but not used [-Wunused-variable] Signed-off-by: NArnd Bergmann <arnd@arndb.de> Cc: Nicolas Ferre <nicolas.ferre@atmel.com> Cc: Jean-Christophe Plagniol-Villard <plagnioj@jcrosoft.com>
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- 18 9月, 2012 1 次提交
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由 Arnd Bergmann 提交于
ARM is moving to stricter checks on readl/write functions, so we need to use the correct types everywhere. Acked-by: NNicolas Ferre <nicolas.ferre@atmel.com> Cc: Jean-Christophe Plagniol-Villard <plagnioj@jcrosoft.com> Signed-off-by: NArnd Bergmann <arnd@arndb.de>
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- 28 4月, 2012 1 次提交
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由 Hong Xu 提交于
Signed-off-by: NHong Xu <hong.xu@atmel.com> Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
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- 16 4月, 2012 2 次提交
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由 Joachim Eastwood 提交于
at91_matrix_* macro's are used by at91_udc usb gadget driver, which can be built as module, therefore we need to export the variable containing matrix base address. Signed-off-by: NJoachim Eastwood <joachim.eastwood@jotron.com> Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>
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由 Joachim Eastwood 提交于
After commit f363c407 (ARM: at91: make sdram/ddr register base soc independent) building at91_cf as a module fails with: ERROR: "at91_ramc_base" [drivers/pcmcia/at91_cf.ko] undefined! make[1]: *** [__modpost] Error 1 make: *** [modules] Error 2 Export at91_ramc_base symbol to allow drivers using at91_ramc_* functions to be built as modules again. Signed-off-by: NJoachim Eastwood <joachim.eastwood@jotron.com> [nicolas.ferre@atmel.com: modify slightly commit message] Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>
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- 31 3月, 2012 1 次提交
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由 Olof Johansson 提交于
This does a sweeping change fixing up all the missing system_misc.h and system_info.h includes from the system.h split-up change. These were the ones I came across when building all defconfigs in arch/arm/configs, there might be more but they lack adequate build coverage to be easily caught. I'm expecting to get a lot of these piecemeal by each maintainer, so we might just as well do one sweeping change to get them all at once. Cc: Nicolas Ferre <nicolas.ferre@atmel.com> Cc: Russell King <linux@arm.linux.org.uk> Cc: Sascha Hauer <kernel@pengutronix.de> Cc: Imre Kaloz <kaloz@openwrt.org> Cc: Krzysztof Halasa <khc@pm.waw.pl> Cc: Eric Miao <eric.y.miao@gmail.com> Cc: Haojian Zhuang <haojian.zhuang@gmail.com> Cc: Wan ZongShun <mcuos.com@gmail.com> Acked-by: NKukjin Kim <kgene.kim@samsung.com> Signed-off-by: NOlof Johansson <olof@lixom.net>
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- 15 3月, 2012 5 次提交
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Use a string to specific the wakeup mode to make it more readable. Add the Real-time Clock Wake-up support too for sam9g45 and sam9x5. Add AT91_SHDW_CPTWK0_MAX to specific the Max of the Wakeup Counter. Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: NRob Herring <rob.herring@calxeda.com> Acked-by: NNicolas Ferre <nicolas.ferre@atmel.com>
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We can now drop the call to ioremap_registers() as we have the binding for the SDRAM/DDR Controller. Drop ioremap_registers() for sam9x5 too. Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: NRob Herring <rob.herring@calxeda.com> Acked-by: NNicolas Ferre <nicolas.ferre@atmel.com>
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Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: NRob Herring <rob.herring@calxeda.com> Acked-by: NNicolas Ferre <nicolas.ferre@atmel.com>
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Specified the main Oscillator via clock binding. This will allow to do not hardcode it anymore in the DT board at 12MHz. Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: NRob Herring <rob.herring@calxeda.com> Acked-by: NNicolas Ferre <nicolas.ferre@atmel.com>
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This will allow to have static Device mapping and DT probe mapping for the System Controller. Temporary keep the call to ioremap_registers() until we have the binding for the SDRAM/DDR Controller. Temporary keep the main clock hardcoded to 12MHz until we have the binding for the PMC. Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: NRob Herring <rob.herring@calxeda.com> Acked-by: NNicolas Ferre <nicolas.ferre@atmel.com>
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- 23 2月, 2012 1 次提交
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Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: NNicolas Ferre <nicolas.ferre@atmel.com> Reviewed-by: NRyan Mallon <rmallon@gmail.com> Cc: linux-usb@vger.kernel.org Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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- 03 2月, 2012 1 次提交
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Following removal announce and addition to feature-removal-schedule.txt, here is the actual source code deletion for Atmel CAP9 family. Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: NNicolas Ferre <nicolas.ferre@atmel.com>
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- 21 1月, 2012 1 次提交
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Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: NNicolas Ferre <nicolas.ferre@atmel.com>
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- 20 1月, 2012 1 次提交
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由 Nicolas Ferre 提交于
Currently setting it to PQFP changes subtype to BGA as subtypes are swapped in at91rm9200_set_type(). Wrong subtype causes GPIO bank D not to work at all. After this fix, subtype is still set as unknown. But board code should fill it in with proper value. Another information is thus printed. Bug discovery and first implementation made by Veli-Pekka Peltola. Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com> Acked-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Cc: stable <stable@vger.kernel.org>
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- 28 11月, 2011 3 次提交
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we will select now the DBGU used by the soc at Kconfig level For the DEBUG_LL and early_printk this will allow to select which DBGU to use this will also allow to select them when multiple SOC are enabled Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: NNicolas Ferre <nicolas.ferre@atmel.com>
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Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: NNicolas Ferre <nicolas.ferre@atmel.com>
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this will allow to ioremap the register of the PIT, PMC and others and make the code soc independent Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: NNicolas Ferre <nicolas.ferre@atmel.com>
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- 16 11月, 2011 1 次提交
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由 Nicolas Pitre 提交于
A generic version should replace this later. Signed-off-by: NNicolas Pitre <nicolas.pitre@linaro.org>
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- 28 7月, 2011 7 次提交
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Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Cc: Nicolas Ferre <nicolas.ferre@atmel.com> Cc: Patrice Vilchez <patrice.vilchez@atmel.com>
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Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Cc: Nicolas Ferre <nicolas.ferre@atmel.com> Cc: Patrice Vilchez <patrice.vilchez@atmel.com>
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Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Cc: Nicolas Ferre <nicolas.ferre@atmel.com> Cc: Patrice Vilchez <patrice.vilchez@atmel.com>
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Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Cc: Nicolas Ferre <nicolas.ferre@atmel.com> Cc: Patrice Vilchez <patrice.vilchez@atmel.com>
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instead of reading the registers everytime the current implementation respect the following constrain: - allow 1 to n soc to be enabled - allow to have a virtual cpu type and subtype - always detect the cpu type and subtype and report it - detect if the soc support is enabled - prepare for sysfs export support - drop soc specific code via compiler when the soc not enabled (via cpu_is_xxx) Today if we read the exid we will have the same value for 9g35 and 9m11 and we will need to check the cidr too with the new implementation we just need to check the soc subtype this will also allow to have specific virtual subtype for rm9200 which the board will have to specify via at91rm9200_set_type(int) as we have no way to detect it. this implementation is inspired by the SH cpu detection support Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Cc: Nicolas Ferre <nicolas.ferre@atmel.com> Cc: Patrice Vilchez <patrice.vilchez@atmel.com>
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they are the same except the default priority Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Cc: Nicolas Ferre <nicolas.ferre@atmel.com> Cc: Patrice Vilchez <patrice.vilchez@atmel.com>
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On all at91 except rm9200 and x40 have the System Controller starts at address 0xffffc000 and has a size of 16KiB. On rm9200 it's start at 0xfffe4000 of 111KiB with non reserved data starting at 0xfffff000 This patch removes the individual definitions of AT91_BASE_SYS and replaces them with a common version at base 0xfffffc000 and size 16KiB and map the same memory space Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Cc: Nicolas Ferre <nicolas.ferre@atmel.com> Cc: Patrice Vilchez <patrice.vilchez@atmel.com>
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