ChangeLog v1->v2:
* change PIN_FUNC_ID base in binding doc to 0 from 1.
Acked-by: NShawn Guo <shawn.guo@linaro.org>
Acked-by: NStephen Warren <swarren@wwwdotorg.org>
Signed-off-by: NDong Aisheng <dong.aisheng@linaro.org>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

ChangeLog v1->v2:
* change PIN_FUNC_ID base in binding doc to 0 from 1.
Acked-by: NShawn Guo <shawn.guo@linaro.org>
Acked-by: NStephen Warren <swarren@wwwdotorg.org>
Signed-off-by: NDong Aisheng <dong.aisheng@linaro.org>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

Change the mechanism of enabling the force PWM mode through
regulator set mode. This can be dynamically configured now.
In the REGULATOR_MODE_FAST the force PWM is enabled and in
REGULATOR_MODE_NORMAL the force PWM is disabled.
Signed-off-by: NLaxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>

Add dt support for the pmu device tps62360 and
Add binding documentation with example.
With this patch driver will support both device-tree and
non-device tree registration.
Signed-off-by: NLaxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>

The GPIO pins select which sub bus is connected to the master.

Initially tested with an sn74cbtlv3253 switch device wired into the
MDIO bus.
Signed-off-by: NDavid Daney <david.daney@cavium.com>
Signed-off-by: NDavid S. Miller <davem@davemloft.net>

This patch adds a somewhat generic framework for MDIO bus
multiplexers.  It is modeled on the I2C multiplexer.

The multiplexer is needed if there are multiple PHYs with the same
address connected to the same MDIO bus adepter, or if there is
insufficient electrical drive capability for all the connected PHY
devices.

Conceptually it could look something like this:

                   ------------------
                   | Control Signal |
                   --------+---------
                           |
 ---------------   --------+------
 | MDIO MASTER |---| Multiplexer |
 ---------------   --+-------+----
                     |       |
                     C       C
                     h       h
                     i       i
                     l       l
                     d       d
                     |       |
     ---------       A       B   ---------
     |       |       |       |   |       |
     | PHY@1 +-------+       +---+ PHY@1 |
     |       |       |       |   |       |
     ---------       |       |   ---------
     ---------       |       |   ---------
     |       |       |       |   |       |
     | PHY@2 +-------+       +---+ PHY@2 |
     |       |                   |       |
     ---------                   ---------

This framework configures the bus topology from device tree data.  The
mechanics of switching the multiplexer is left to device specific
drivers.

The follow-on patch contains a multiplexer driven by GPIO lines.
Signed-off-by: NDavid Daney <david.daney@cavium.com>
Signed-off-by: NDavid S. Miller <davem@davemloft.net>

Add property for the gpio flag open drain when registering
fixed regulator.
Signed-off-by: NLaxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>

This commit adds device tree support for the TPS6586x regulator.
Signed-off-by: NThierry Reding <thierry.reding@avionic-design.de>
Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>

SPEAr13xx series of SoCs contain Synopsys AHCI SATA Controller which shares
ahci_platform driver with other controller versions.

This patch updates DT compatible list for ahci_platform. It also updates and
renames binding documentation to more generic name.
Signed-off-by: NViresh Kumar <viresh.kumar@st.com>
Cc: Rob Herring <rob.herring@calxeda.com>
Signed-off-by: NJeff Garzik <jgarzik@redhat.com>

Add pinctrl support for Freescale MXS SoCs, i.MX23 and i.MX28.
The driver supports device tree probe only.
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
Acked-by: NStephen Warren <swarren@wwwdotorg.org>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

Acked-by: NStephen Warren <swarren@wwwdotorg.org>
Acked-by: NShawn Guo <shawn.guo@linaro.org>
Signed-off-by: NDong Aisheng <dong.aisheng@linaro.org>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

The driver has mux and config support while the gpio is still
not supported.
For select input setting, the driver will handle it internally
and do not need user to take care of it.

The pinctrl-imx core driver will parse the dts file and dynamically
create the pinmux functions and groups.

Each IMX SoC pinctrl driver should register pins with a pin register map
including mux register and config register and select input map to core
for proper operations.
Acked-by: NStephen Warren <swarren@wwwdotorg.org>
Acked-by: NShawn Guo <shawn.guo@linaro.org>
Signed-off-by: NDong Aisheng <dong.aisheng@linaro.org>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

Add runtime DT support and documentation for the Cortex A7/A15
architected timers.
Signed-off-by: NWill Deacon <will.deacon@arm.com>
Signed-off-by: NMarc Zyngier <marc.zyngier@arm.com>

Add description for 'reg' field.
Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>

Define a new binding for the Tegra pin controller, which is capable of
defining all aspects of desired pin multiplexing and pin configuration.
This is all based on the new common pinctrl bindings.

Add Tegra30 binding based on Tegra20 binding.

Add some basic stuff that was missing before:
* How many and what reg property entries must be provided.
* An example.
Signed-off-by: NStephen Warren <swarren@nvidia.com>
Acked-by: NDong Aisheng <dong.aisheng@linaro.org>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

This places the file in the new location for all pin controller bindings.

Also, rename the file using the full compatible value for easier
avoidance of conflicts between multiple bindings.
Signed-off-by: NStephen Warren <swarren@nvidia.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

The core pin controller bindings define:
* The fact that pin controllers expose pin configurations as nodes in
  device tree.
* That the bindings for those pin configuration nodes is defined by the
  individual pin controller drivers.
* A standardized set of properties for client devices to define numbered
  or named pin configuration states, each referring to some number of the
  afore-mentioned pin configuration nodes.
* That the bindings for the client devices determines the set of numbered
  or named states that must exist.
Signed-off-by: NStephen Warren <swarren@nvidia.com>
Acked-by: NShawn Guo <shawn.guo@linaro.org>
Acked-by: NTony Lindgren <tony@atomide.com>
Acked-by: NLinus Walleij <linus.walleij@linaro.org>
Acked-by: NSimon Glass <sjg@chromium.org>
Acked-by: NDong Aisheng <dong.aisheng@linaro.org>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

Add comments to NAND "gpios" property to make it clearer.
Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>
Acked-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>

Partitions are described in the same way for all mtd devices when using
devicetree, move the documentation to a separate file and add references
to it.
Signed-off-by: NJamie Lentin <jm@lentin.co.uk>
Acked-by: NArnd Bergmann <arnd@arndb.de>
Acked-by: NJason Cooper <jason@lakedaemon.net>
Signed-off-by: NGrant Likely <grant.likely@secretlab.ca>

Change "reg" to "anatop-reg-offset" due to there is a warning of handling no
size field in reg.

This patch also adds the missing device-tree binding documentation.
Signed-off-by: NYing-Chun Liu (PaulLiu) <paul.liu@linaro.org>
Acked-by: NShawn Guo <shawn.guo@linaro.org>
Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>

Define dt bindings for the ti-omap-hsmmc, and adapt the driver to extract
data (which was earlier passed as platform_data) from device tree.
Signed-off-by: NRajendra Nayak <rnayak@ti.com>
Acked-by: NRob Herring <rob.herring@calxeda.com>
Signed-off-by: NChris Ball <cjb@laptop.org>

This patch adds support to configure the SPEAr SMI driver via
device-tree instead of platform_data.
Signed-off-by: NStefan Roese <sr@denx.de>
Signed-off-by: NArtem Bityutskiy <artem.bityutskiy@linux.intel.com>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

This patch adds support to configure the FSMC NAND driver (used amongst
others on SPEAr platforms) via device-tree instead of platform_data.
Signed-off-by: NStefan Roese <sr@denx.de>
Signed-off-by: NArtem Bityutskiy <artem.bityutskiy@linux.intel.com>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

Allow both device tree (preferred) and platform data-based driver
instantiation.
Signed-off-by: NKarol Lewandowski <k.lewandowsk@samsung.com>
Signed-off-by: NKyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: NAnton Vorontsov <anton.vorontsov@linaro.org>

Add the DT support for the I2C GPIO expander inside the twl4030.

Note: The pdata parameters still have to be properly adapted using
dedicated bindings.
Signed-off-by: NBenoit Cousson <b-cousson@ti.com>
Acked-by: NFelipe Balbi <balbi@ti.com>
Acked-by: NGrant Likely <grant.likely@secretlab.ca>
Signed-off-by: NSamuel Ortiz <sameo@linux.intel.com>

This patch adds support to configure the STMMAC ethernet driver via
device-tree instead of platform_data.

Currently, only the properties needed on SPEAr600 are provided. All
other properties should be added once needed on other platforms.
Signed-off-by: NStefan Roese <sr@denx.de>
Cc: Giuseppe Cavallaro <peppe.cavallaro@st.com>
Signed-off-by: NDavid S. Miller <davem@davemloft.net>

This binding documents how the message register blocks found in some FSL
MPIC implementations shall be represented in a device tree.
Signed-off-by: NMeador Inge <meador_inge@mentor.com>
Signed-off-by: NJia Hongtao <B38951@freescale.com>
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

The MSIIR register for each MSI bank is aliased to a different
address. The MSI node reg property was updated to contain this
address:

e.g. reg = <0x41600 0x200 0x44140 4>;

The first region contains the address and length of the MSI
register set and the second region contains the address of
the aliased MSIIR register at 0x44140.
Signed-off-by: NDiana CRACIUN <Diana.Craciun@freescale.com>
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

This patch adds a generic target for SPEAr600 board that can be
configured via the device-tree. Currently the following devices
are supported via the devicetree:

- VIC interrupts
- PL011 UART
- PL061 GPIO
- Synopsys DW I2C
- Synopsys DW ethernet

Other peripheral devices (e.g. SMI flash, FSMC NAND flash etc) will
follow in later patches.

Only the spear600-evb is currently supported. Other SPEAr600
based boards will follow later.

Since the current mainline SPEAr600 code only supports the SPEAr600
evaluation board, with nearly zero peripheral devices (only UART
and GPIO), it makes sense to switch over to DT based configuration
completely now. So this patch also removes all non-DT stuff, mainly
platform device data. The files spear600.c and spear600_evb.c are
removed completely.
Signed-off-by: NStefan Roese <sr@denx.de>
Acked-by: NViresh Kumar <viresh.kumar@st.com>
Acked-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Reviewed-by: NArnd Bergmann <arnd@arndb.de>
Signed-off-by: NArnd Bergmann <arnd@arndb.de>

Allow to compile it if AT91 is enable.
Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>

Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Cc: Nicolas Ferre <nicolas.ferre@atmel.com>
Acked-by: NGrant Likely <grant.likely@secretlab.ca>
Acked-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>

Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Cc: Nicolas Ferre <nicolas.ferre@atmel.com>
Acked-by: NGrant Likely <grant.likely@secretlab.ca>
Acked-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>

Use a string to specific the wakeup mode to make it more readable.

Add the Real-time Clock Wake-up support too for sam9g45 and sam9x5.
Add AT91_SHDW_CPTWK0_MAX to specific the Max of the Wakeup Counter.
Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: NRob Herring <rob.herring@calxeda.com>
Acked-by: NNicolas Ferre <nicolas.ferre@atmel.com>

We can now drop the call to ioremap_registers() as we have the binding for the
SDRAM/DDR Controller.

Drop ioremap_registers() for sam9x5 too.
Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: NRob Herring <rob.herring@calxeda.com>
Acked-by: NNicolas Ferre <nicolas.ferre@atmel.com>

Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: NRob Herring <rob.herring@calxeda.com>
Acked-by: NNicolas Ferre <nicolas.ferre@atmel.com>

Specified the main Oscillator via clock binding.
This will allow to do not hardcode it anymore in the DT board at 12MHz.
Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: NRob Herring <rob.herring@calxeda.com>
Acked-by: NNicolas Ferre <nicolas.ferre@atmel.com>

To achieve DT support, we need to populate a custom platform_data in a
private struct from DT information. To simplify code, the adapter and
algorithm are also put into the private struct.
Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: NGrant Likely <grant.likely@secretlab.ca>
Acked-by: NRob Herring <rob.herring@calxeda.com>
Acked-by: NWolfram Sang <w.sang@pengutronix.de>
Cc: Nicolas Ferre <nicolas.ferre@atmel.com>

Use a local copy of board informatin and fill with DT data.
Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: NGrant Likely <grant.likely@secretlab.ca>
Cc: Nicolas Ferre <nicolas.ferre@atmel.com>

- nand-ecc-mode : String, operation mode of the NAND ecc mode.
  Supported values are: "none", "soft", "hw", "hw_syndrome", "hw_oob_first",
  "soft_bch".
- nand-bus-width : 8 or 16 bus width if not present 8
- nand-on-flash-bbt: boolean to enable on flash bbt option if not present false
Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: NGrant Likely <grant.likely@secretlab.ca>
Acked-by: NStefan Roese <sr@denx.de>

This is an incremental patch updating to the revised bindings for
matrix keyboards.

This includes an optional "linux,fn-keymap" binding that is not yet
implemented, that will be used to specify the Fn-key modifier layout
if needed.
Signed-off-by: NOlof Johansson <olof@lixom.net>
Acked-by: NGrant Likely <grant.likely@secretlab.ca>
Acked-by: NStephen Warren <swarren@nvidia.com>
Signed-off-by: NDmitry Torokhov <dtor@mail.ru>