1. 28 3月, 2013 5 次提交
    • I
      lib/scatterlist: sg_page_iter: support sg lists w/o backing pages · 2db76d7c
      Imre Deak 提交于
      The i915 driver uses sg lists for memory without backing 'struct page'
      pages, similarly to other IO memory regions, setting only the DMA
      address for these. It does this, so that it can program the HW MMU
      tables in a uniform way both for sg lists with and without backing pages.
      
      Without a valid page pointer we can't call nth_page to get the current
      page in __sg_page_iter_next, so add a helper that relevant users can
      call separately. Also add a helper to get the DMA address of the current
      page (idea from Daniel).
      
      Convert all places in i915, to use the new API.
      Signed-off-by: NImre Deak <imre.deak@intel.com>
      Reviewed-by: NDamien Lespiau <damien.lespiau@intel.com>
      Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
      2db76d7c
    • C
      drm/i915: Apply alignment restrictions on scanout surfaces for VT-d · 693db184
      Chris Wilson 提交于
      From the w/a database:
      
      'To prevent false VT-d type 6 error:
      
        The primary display plane must be 256KiB aligned, and require an extra
        128 PTEs of padding afterward;
      
        The sprites planes must be 128KiB aligned, and require an extra 64 PTEs
        of padding afterward;
      
        The cursors must be 64KiB aligned, and require an extra 2 PTEs of
        padding afterward.'
      
      As we use the same function to pin the primary and sprite planes, we can
      simply use the more strict requirements for scanouts for both.
      
      Instead of using explicit padding PTEs following the scanout objects, we
      should be able to use the scratch page that is always mapped into the
      unused PTEs to avoid the VT-d error.
      
      References: https://bugs.freedesktop.org/show_bug.cgi?id=59626
      References: https://bugs.freedesktop.org/show_bug.cgi?id=59627
      References: https://bugs.freedesktop.org/show_bug.cgi?id=59631Signed-off-by: NChris Wilson <chris@chris-wilson.co.uk>
      Reviewed-by: NDamien Lespiau <damien.lespiau@intel.com>
      [danvet: Apply s/vtd_wa/vtd_scanout_wa/ bikeshed since Damien likes
      it, too.]
      Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
      693db184
    • E
      DRM/i915: Get rid if the 'hotplug_supported_mask' in struct drm_i915_private. · 4f770a5b
      Egbert Eich 提交于
      Now since we have replaced the bits to show interest in hotplug IRQs
      we can go and nuke the 'hotplug_supported_mask'.
      Signed-off-by: NEgbert Eich <eich@suse.de>
      Acked-by: NChris Wilson <chris@chris-wilson.co.uk>
      Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
      4f770a5b
    • E
      DRM/i915: Remove i965_hpd_irq_setup. · bac56d5b
      Egbert Eich 提交于
      After
      "Convert HPD interrupts to make use of HPD pin assignment in encoders."
      This function is now basically the same as i915_hpd_irq_setup().
      
      Consolidating both functions in one requires one more check for
      I915_HAS_HOTPLUG(dev) in the i965 code path and one more check for
      IS_G4X(dev) in the i915 code path. These are considered harmless.
      Signed-off-by: NEgbert Eich <eich@suse.de>
      Acked-by: NChris Wilson <chris@chris-wilson.co.uk>
      [danvet: Fixup patch conflict and make it compile.]
      Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
      bac56d5b
    • D
      drm/i915: implement ibx_hpd_irq_setup · 82a28bcf
      Daniel Vetter 提交于
      This fixes a regression introduced in
      
      commit e5868a31
      Author: Egbert Eich <eich@suse.de>
      Date:   Thu Feb 28 04:17:12 2013 -0500
      
          DRM/i915: Convert HPD interrupts to make use of HPD pin assignment in encode
      
      Due to the irq setup rework in 3.9, see
      
      commit 20afbda2
      Author: Daniel Vetter <daniel.vetter@ffwll.ch>
      Date:   Tue Dec 11 14:05:07 2012 +0100
      
          drm/i915: Fixup hpd irq register setup ordering
      
      Egbert Eich's hpd rework blows up on pch-split platforms - it walks
      the encoder list before that has been set up completely. The new init
      sequence is:
      
      1. irq enabling
      2. modeset init
      3. hpd setup
      
      We need to move around the ibx setup a bit to fix this.
      
      Ville Syrjälä pointed out in his review that we can't touch SDEIER
      after the interrupt handler is set up, since that'll race with Paulo
      Zanoni's PCH interrupt race fix:
      
      commit 44498aea
      Author: Paulo Zanoni <paulo.r.zanoni@intel.com>
      Date:   Fri Feb 22 17:05:28 2013 -0300
      
          drm/i915: also disable south interrupts when handling them
      
      We fix that by unconditionally enabling all interrupts in SDEIER, but
      masking them as-needed in SDEIMR. Since only the single-threaded
      setup/teardown (or suspend/resume) code touches that, no further
      locking is required.
      
      While at it also simplify the mask handling - we start out with all
      interrupts cleared in the postinstall hook, and never enable a hpd
      interrupt before hpd_irq_setup is called.
      
      And finally, for consistency rename the ibx hpd setup function to
      ibx_hpd_irq_setup.
      
      v2: Fix race around SDEIER writes (Ville).
      
      v3: Remove the superflous posting read for SDEIER, spotted by Ville.
      
      Ville also wondered whether we shouldn't clear SDEIIR, since now
      SDE interrupts are enabled before we have an irq handler installed.
      But the master interrupt control bit in DEIER is still cleared, so we
      should be fine.
      
      Cc: Egbert Eich <eich@suse.de>
      Cc: Jesse Barnes <jbarnes@virtuousgeek.org>
      Cc: Paulo Zanoni <paulo.r.zanoni@intel.com>
      Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
      Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=62798Reviewed-by: NVille Syrjälä <ville.syrjala@linux.intel.com>
      Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
      82a28bcf
  2. 27 3月, 2013 10 次提交
  3. 26 3月, 2013 3 次提交
  4. 23 3月, 2013 22 次提交