Slot quirks "disable-wp" is deprecated.
Instead, use the host quirk "disable-wp".
(Because the slot-node is removed in dt-file.)
Signed-off-by: NJaehoon Chung <jh80.chung@samsung.com>
Tested-by: NSachin Kamat <sachin.kamat@samsung.com>
Acked-by: NSeungwon Jeon <tgih.jun@samsung.com>
Reviewed-by: NDoug Anderson <dianders@chromium.org>
Tested-by: NDoug Anderson <dianders@chromium.org>
Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>

Commit "mmc: mmci: Handle CMD irq before DATA irq", caused an issue
when using the ARM model of the PL181 and running QEMU.

The bug was reported for the following QEMU version:
$ qemu-system-arm -version
QEMU emulator version 2.0.0 (Debian 2.0.0+dfsg-2ubuntu1.1), Copyright
(c) 2003-2008 Fabrice Bellard

To resolve the problem, let's restore the old behavior were the DATA
irq is handled prior the CMD irq, but only for the arm_variant, which
the problem was reported for.
Reported-by: NJohn Stultz <john.stultz@linaro.org>
Cc: Peter Maydell <peter.maydell@linaro.org>
Cc: Russell King <linux@arm.linux.org.uk>
Tested-by: NKees Cook <keescook@chromium.org>
Tested-by: NJohn Stultz <john.stultz@linaro.org>
Cc: <stable@vger.kernel.org> # v3.15+
Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>

This patch won't change the behavior of how mmci deals with CMD irqs.
By moving code from mmci_irq() to mmci_cmd_irq(), we getter a better
overview of what going on.

Cc: Peter Maydell <peter.maydell@linaro.org>
Cc: John Stultz <john.stultz@linaro.org>
Cc: Russell King <linux@arm.linux.org.uk>
Tested-by: NKees Cook <keescook@chromium.org>
Tested-by: NJohn Stultz <john.stultz@linaro.org>
Cc: <stable@vger.kernel.org> # v3.15+
Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>

We don't need to verify the content of the status register twice, while
we are about to handle a DATA irq. Instead let's leave all verification
to be handled by mmci_data_irq().

Cc: Peter Maydell <peter.maydell@linaro.org>
Cc: John Stultz <john.stultz@linaro.org>
Cc: Russell King <linux@arm.linux.org.uk>
Tested-by: NKees Cook <keescook@chromium.org>
Tested-by: NJohn Stultz <john.stultz@linaro.org>
Cc: <stable@vger.kernel.org> # v3.15+
Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>

This patch changes the fifo reset code to follow the reset procedure
outlined in the documentation of Synopsys Mobile storage host databook.
Signed-off-by: NSonny Rao <sonnyrao@chromium.org>
Signed-off-by: NYuvaraj Kumar C D <yuvaraj.cd@samsung.com>
Acked-by: NSeungwon Jeon <tgih.jun@samsung.com>
[sonnyrao: fix compile for !CONFIG_MMC_DW_IDMAC case]
Acked-by: NJaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>

This simplifies probe error and remove code paths.
Signed-off-by: NLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>

Even though some implementations support 4-bytes data register access,
the tmio driver never configures the hardware in such a way and always
performs 2-bytes accesses. Hardcode the DMA transfer size to 2 bytes.
Signed-off-by: NLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>

The data register is 4 bytes wide, hardcode the DMA transfer size to
4 bytes in both directions.
Signed-off-by: NLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>

Commit e5a233cb ("mmc: sh_mmcif:
Factorize DMA channel request and configuration code") incorrectly
set the destination address for both slave channels instead of setting
the source address for the receive channel. Fix that.
Signed-off-by: NLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>

The sh-mmcif driver implements DT support but the bindings are not
documented. Document them.

Cc: devicetree@vger.kernel.org
Signed-off-by: NLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>

It is not required (in fact it even is not recommended) that a PCI
driver's suspend() callback save the standard configuration registers
of the device, prepare it for waking up the system, or put it into a
low-power state.  All of these operations can very well be taken
care of by the PCI subsystem, without the driver's participation. Thus
remove these PCI functions.

For the device which has wake up capability, use device_init_wakeup to
init the wake up capability so that PCI core will help to enable the wakeup
for it.
Signed-off-by: NChuanxiao Dong <chuanxiao.dong@intel.com>
Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>

Currently when the device secure discard implementation is
blacklisted (MMC_QUIRK_SEC_ERASE_TRIM_BROKEN quirk is set)
instead of secure discard we're going to do normal discard,
which is wrong.

When the secure discard is known to be broken we should just
disallow it entirely and not advertise this functionality to
the user. Fix it.

Also move mmc_fixup_device() in from of mmc_blk_alloc() so we
can get quirks set before we attempt to set queue information.
Signed-off-by: NLukas Czerner <lczerner@redhat.com>
Acked-by: NJaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>

Increase the build testing coverage.
Signed-off-by: NGeorgi Djakov <gdjakov@mm-sol.com>
Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>

The header <linux/regulator/consumer.h> is unused. Remove it.
Signed-off-by: NGeorgi Djakov <gdjakov@mm-sol.com>
Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>

The DT binding example in the documentation is missing the -supply
suffix for the vmmc and vqmmc regulators. Fix it.
Signed-off-by: NGeorgi Djakov <gdjakov@mm-sol.com>
Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>

This is to enable DDR50 bus speed mode with 1.8V signaling capability
for BayTrail ACPI and PCI mode eMMC Controller.
Signed-off-by: NMaurice Petallo <mauricex.r.petallo@intel.com>
Acked-by: NAdrian Hunter <adrian.hunter@intel.com>
Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>

"SDHCI_QUIRK2_PRESET_VALUE_BROKEN" quirk is added to prohibit
preset value enabling for Baytrail eMMC controller.
Signed-off-by: NMaurice Petallo <mauricex.r.petallo@intel.com>
Acked-by: NAdrian Hunter <adrian.hunter@intel.com>
Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>

If NO_DMA=y:

    drivers/built-in.o: In function `usdhi6_dma_setup':
    usdhi6rol0.c:(.text+0x5c35fc): undefined reference to `dma_map_sg'
    drivers/built-in.o: In function `usdhi6_dma_stop_unmap':
    usdhi6rol0.c:(.text+0x5c3738): undefined reference to `dma_unmap_sg'
Signed-off-by: NGeert Uytterhoeven <geert@linux-m68k.org>
Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>

If NO_DMA=y:

    drivers/built-in.o: In function `sh_mmcif_start_dma_tx':
    sh_mmcif.c:(.text+0x5a3286): undefined reference to `dma_map_sg'
    drivers/built-in.o: In function `sh_mmcif_start_dma_rx':
    sh_mmcif.c:(.text+0x5a33fc): undefined reference to `dma_map_sg'
    drivers/built-in.o: In function `sh_mmcif_end_cmd':
    sh_mmcif.c:(.text+0x5a3668): undefined reference to `dma_unmap_sg'
Signed-off-by: NGeert Uytterhoeven <geert@linux-m68k.org>
Acked-by: NLaurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>

If NO_DMA=y:

    drivers/built-in.o: In function `omap_hsmmc_pre_dma_transfer':
    omap_hsmmc.c:(.text+0x5a0928): undefined reference to `dma_map_sg'
    drivers/built-in.o: In function `omap_hsmmc_dma_cleanup':
    omap_hsmmc.c:(.text+0x5a0e8e): undefined reference to `dma_unmap_sg'
    drivers/built-in.o: In function `omap_hsmmc_dma_callback':
    omap_hsmmc.c:(.text+0x5a1f58): undefined reference to `dma_unmap_sg'
    drivers/built-in.o: In function `omap_hsmmc_post_req':
    omap_hsmmc.c:(.text+0x5a2082): undefined reference to `dma_unmap_sg'
Signed-off-by: NGeert Uytterhoeven <geert@linux-m68k.org>
Acked-by: NLaurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>

This patch adds the device tree binding documentation for the ST
SDHCI driver. It documents the differences between the core properties
described by mmc.txt and the properties used by the sdhci-st driver.
Signed-off-by: NGiuseppe Cavallaro <peppe.cavallaro@st.com>
Signed-off-by: NPeter Griffin <peter.griffin@linaro.org>
Acked-by: NLee Jones <lee.jones@linaro.org>
Acked-by: NMaxime Coquelin <maxime.coquelin@st.com>
Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>

This platform driver adds initial support for the SDHCI host controller
found on STMicroelectronics SoCs.

It has been tested on STiH41x b2020 platforms currently.
Signed-off-by: NGiuseppe Cavallaro <peppe.cavallaro@st.com>
Signed-off-by: NPeter Griffin <peter.griffin@linaro.org>
Acked-by: NLee Jones <lee.jones@linaro.org>
Acked-by: NMaxime Coquelin <maxime.coquelin@st.com>
Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>

The driver already supports the r8a7791 SoC, and "renesas,sdhi-r8a7791"
is already in use.
Signed-off-by: NGeert Uytterhoeven <geert+renesas@glider.be>
Cc: Ian Molton <ian.molton@codethink.co.uk>
Cc: Chris Ball <chris@printf.net>
Cc: linux-mmc@vger.kernel.org
Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>

Utilise new s3c24xx-dma dmaengine driver for DMA ops.
Signed-off-by: NVasily Khoruzhick <anarsoul@gmail.com>
Acked-by: NArnd Bergmann <arnd@arndb.de>
Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>

This doesn't seem to be used any longer and removing the include fixes
64-bit ARM builds.
Signed-off-by: NThierry Reding <treding@nvidia.com>
Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>

In case of reboot my olinuxino imx23 board does not see
mmc card any more. mmc_rescan is being called by delayed
work in loop, but mxs_mmc_get_cd always returns 0, so we
will never pass the card detection check and will not do
further card inition.

This patch is just an attempt to partially revert the patch
a91fe279 of Sascha Hauer, where it is claimed that upper
layer will handle broken card detection using the polling
logic and MMC_CAP_NEEDS_POLL capability, but seems it is not
true, because upper logic still expects 1 from 'get_cd'.

So, here we always return 1 (card present) in case of
MMC_CAP_NEEDS_POLL capability set.
Signed-off-by: NRoman Pen <r.peniaev@gmail.com>
CC: Chris Ball <chris@printf.net>
CC: Sascha Hauer <s.hauer@pengutronix.de>
CC: Fabio Estevam <fabio.estevam@freescale.com>
CC: Shawn Guo <shawn.guo@linaro.org>
CC: Ulf Hansson <ulf.hansson@linaro.org>
CC: linux-mmc@vger.kernel.org
CC: linux-kernel@vger.kernel.org
Acked-by: NSascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>

Use clk_prepare_enable/clk_disable_unprepare to make the driver
work properly with common clock framework.
Signed-off-by: NVasily Khoruzhick <anarsoul@gmail.com>
Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>

As stated by the eMMC 5.0 specification, a chip should not be rejected
only because of the revision stated in the EXT_CSD_REV field of the
EXT_CSD register.

Remove the control on this value, the control of the CSD_STRUCTURE field
should be sufficient to reject future incompatible changes.
Signed-off-by: NRomain Izard <romain.izard.pro@gmail.com>
Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>

After the switch to the MMC core regulator infrastucture, we already
have a local "mmc" pointer in various functions. There is no longer a
need to access the data structure via host->mmc.
Signed-off-by: NMarkus Mayer <markus.mayer@linaro.org>
Reviewed-by: NMatt Porter <mporter@linaro.org>
Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>

The MMC core in mmc_set_signal_voltage() already provides for the delay
required to switch to 1.8V, so there is no need for drivers to perform
this wait themselves.
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>

This patch is to enable SDIO host controller for Intel Quark X1000.
Signed-off-by: NDerek Browne <Derek.Browne@intel.com>
Signed-off-by: NAlvin (Weike) Chen <alvin.chen@intel.com>
Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>

While merging the sdhci patchset from Russell King, somehow a blank
line was left behind. Let's correct the formatting.

Cc: Chris Ball <chris@printf.net>
Cc: Russell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>

A standard compliant SDHCI can itself supply VDD at 1.8, 3.0, or 3.3v.
Several vendors ignore this and instead rely upon external regulators
to supply VDD.  While the external regulators typically can supply one
of the standard SDHCI voltage levels, there is no real reason for this
to be a hard requirement.

This patch alters the SDHCI driver such that external VDD regulators
that provide voltages other than the three mentioned above may be used
so long as they can supply a voltage that meets the needs of the card.

In the case that an external VDD regulator is provided, it is reasonable
to ignore the voltage capabilities of the host controller and allow the
external regulator to set the OCR mask.  Additionally, there is no need
to convert a VDD voltage request into one of the standard SDHCI voltage
levels or program it in the host controller's power control register.
Signed-off-by: NTim Kryger <tim.kryger@gmail.com>
Tested-by: NSachin Kamat <spk.linux@gmail.com>
Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>

Currently the documentation doesn't match the code in mmc_of_parse. This
patch rectifies this.
Signed-off-by: NPeter Griffin <peter.griffin@linaro.org>
Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>

It's a NOOP since 2.6.35 and it will be removed one day.
This is not trivial because current code uses hard coded 32 instead of
IRQF_DISABLED in the request_irq call.
Signed-off-by: NAxel Lin <axel.lin@ingics.com>
Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>

For MMC_BUS_WIDTH_8 case, current code missed setting BM_EIGHTBIT_MODE bit.
Also has a small refactor to make the code looks better in readability.

So the bit settings witch below logic:

SDMMC_BUSMODE register:
Set EIGHTBIT_MODE bit for 8 bit mode, Set FOURBIT_MODE bit for 4 bit mode.
Clear both EIGHTBIT_MODE and FOURBIT_MODE bits for 1 bit mode.

SDMMC_EXTCTRL register:
Set EXT_EIGHTBIT bit for 8 bit mode, Clear EXT_EIGHTBIT bit for 1/4 bit mode.

Add define for EXT_EIGHTBIT to avoid using magic number.
BM_ONEBIT_MASK is no longer used, thus remove it.

This patch is untested due to lack of platform with 8-bit hardware.
However since the code is there, it's good to make the code match the document.
Signed-off-by: NAxel Lin <axel.lin@ingics.com>
Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>

The initialization of some SD-cards fails because the card never
leaves the busy state. Aid trouble shooting by indicating this in the
kernel log.
Signed-off-by: NJohan Rudholm <johanru@axis.com>
Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>

version.h inclusion is not needed as suggested by versioncheck.
Signed-off-by: NSachin Kamat <sachin.kamat@linaro.org>
Cc: Jonas Jensen <jonas.jensen@gmail.com>
Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>

The am335x can't detect pending cirq in PM runtime suspend.
This patch reconfigures dat1 as a GPIO before going to suspend.
SDIO interrupts are detected with the GPIO, the GPIO will only wake
the module from suspend, SDIO irq detection will still happen through the
IP block.

Idea of remuxing the pins by Tony Lindgren. Code contributions from
Tony Lindgren and Balaji T K <balajitk@ti.com>
Signed-off-by: NAndreas Fenkart <afenkart@gmail.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>
Acked-by: NBalaji T K <balajitk@ti.com>
Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>

These are predefined states of the driver model. When not present,
as if not set in the device tree, they become no-ops.
Explicitly selecting the default state is not needed since the
device core layer sets pin mux to "default" state before probe.
This is not the simplest implementation, on AM335x at least, we could
switch to idle at any point in the suspend hook, only the default state
needs to be set before writing to the irq registers or an IRQ might get
lost.
Acked-by: NBalaji T K <balajitk@ti.com>
Signed-off-by: NAndreas Fenkart <afenkart@gmail.com>
Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>