提交 e36152aa 编写于 作者: L Laurent Pinchart 提交者: Ulf Hansson

mmc: sh_mmcif: Configure DMA slave bus width

The data register is 4 bytes wide, hardcode the DMA transfer size to
4 bytes in both directions.
Signed-off-by: NLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
上级 d25006e7
......@@ -418,10 +418,13 @@ sh_mmcif_request_dma_one(struct sh_mmcif_host *host,
cfg.slave_id = slave_id;
cfg.direction = direction;
if (direction == DMA_DEV_TO_MEM)
if (direction == DMA_DEV_TO_MEM) {
cfg.src_addr = res->start + MMCIF_CE_DATA;
else
cfg.src_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
} else {
cfg.dst_addr = res->start + MMCIF_CE_DATA;
cfg.dst_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
}
ret = dmaengine_slave_config(chan, &cfg);
if (ret < 0) {
......
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