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  1. 26 1月, 2008 3 次提交
    • A
      ARM kprobes: core code · 24ba613c
      由 Abhishek Sagar 提交于 
      This is a full implementation of Kprobes including Jprobes and
Kretprobes support.

This ARM implementation does not follow the usual kprobes double-
exception model. The traditional model is where the initial kprobes
breakpoint calls kprobe_handler(), which returns from exception to
execute the instruction in its original context, then immediately
re-enters after a second breakpoint (or single-stepping exception)
into post_kprobe_handler(), each time the probe is hit..  The ARM
implementation only executes one kprobes exception per hit, so no
post_kprobe_handler() phase. All side-effects from the kprobe'd
instruction are resolved before returning from the initial exception.
As a result, all instructions are _always_ effectively boosted
regardless of the type of instruction, and even regardless of whether
or not there is a post-handler for the probe.
Signed-off-by: NAbhishek Sagar <sagar.abhishek@gmail.com>
Signed-off-by: NQuentin Barnes <qbarnes@gmail.com>
Signed-off-by: NNicolas Pitre <nico@marvell.com>
      24ba613c
    • Q
      ARM kprobes: instruction single-stepping support · 35aa1df4
      由 Quentin Barnes 提交于 
      This is the code implementing instruction single-stepping for kprobes
on ARM.

To get around the limitation of no Next-PC and no hardware single-
stepping, all kprobe'd instructions are split into three camps:
simulation, emulation, and rejected. "Simulated" instructions are
those instructions which behavior is reproduced by straight C code.
"Emulated" instructions are ones that are copied, slightly altered
and executed directly in the instruction slot to reproduce their
behavior.  "Rejected" instructions are ones that could be simulated,
but work hasn't been put into simulating them. These instructions
should be very rare, if not unencountered, in the kernel. If ever
needed, code could be added to simulate them.

One might wonder why this and the ptrace singlestep facility are not
sharing some code.  Both approaches are fundamentally different because
the ptrace code regains control after the stepped instruction by installing
a breakpoint after the instruction itself, and possibly at the location
where the instruction might be branching to, instead of simulating or
emulating the target instruction.

The ptrace approach isn't suitable for kprobes because the breakpoints
would have to be moved back, and the icache flushed, everytime the
probe is hit to let normal code execution resume, which would have a
significant performance impact. It is also racy on SMP since another
CPU could, with the right timing, sail through the probe point without
being caught.  Because ptrace single-stepping always result in a
different process to be scheduled, the concern for performance is much
less significant.

On the other hand, the kprobes approach isn't (currently) suitable for
ptrace because it has no provision for proper user space memory
protection and translation, and even if that was implemented, the gain
wouldn't be worth the added complexity in the ptrace path compared to
the current approach.

So, until kprobes does support user space, both kprobes and ptrace are
best kept independent and separate.
Signed-off-by: NQuentin Barnes <qbarnes@gmail.com>
Signed-off-by: NAbhishek Sagar <sagar.abhishek@gmail.com>
Signed-off-by: NNicolas Pitre <nico@marvell.com>
      35aa1df4
    • I
      sched: remove printk_clock() · b842271f
      由 Ingo Molnar 提交于 
      printk_clock() is obsolete - it has been replaced with cpu_clock().
Signed-off-by: NIngo Molnar <mingo@elte.hu>
      b842271f
  3. 25 1月, 2008 4 次提交
  5. 20 1月, 2008 2 次提交
  7. 19 1月, 2008 2 次提交
  9. 16 1月, 2008 1 次提交
  11. 11 1月, 2008 1 次提交
  13. 07 1月, 2008 1 次提交
  15. 04 1月, 2008 1 次提交
  17. 18 12月, 2007 2 次提交
  19. 08 12月, 2007 1 次提交
  21. 30 11月, 2007 1 次提交
  23. 27 11月, 2007 8 次提交
  25. 26 11月, 2007 2 次提交
  27. 17 11月, 2007 1 次提交
  29. 11 11月, 2007 1 次提交
  31. 09 11月, 2007 1 次提交
    • R
      [ARM] pxa: fix one-shot timer mode · 91bc51d8
      由 Russell King 提交于 
      One-shot timer mode on PXA has various bugs which prevent kernels
build with NO_HZ enabled booting.  They end up spinning on a
permanently asserted timer interrupt because we don't properly
clear it down - clearing the OIER bit does not stop the pending
interrupt status.  Fix this in the set_mode handler as well.

Moreover, the code which sets the next expiry point may race with
the hardware, and we might not set the match register sufficiently
in the future.  If we encounter that situation, return -ETIME so
the generic time code retries.
Acked-by: NThomas Gleixner <tglx@linutronix.de>
Acked-by: NNicolas Pitre <nico@cam.org>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
      91bc51d8
  33. 08 11月, 2007 1 次提交
  35. 07 11月, 2007 1 次提交
  37. 06 11月, 2007 2 次提交
  39. 31 10月, 2007 4 次提交