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  1. 14 4月, 2009 1 次提交
  3. 04 4月, 2009 1 次提交
    • M
      sh: Fix up DSP context save/restore. · 01ab1039
      由 Michael Trimarchi 提交于 
      There were a number of issues with the DSP context save/restore code,
mostly left-over relics from when it was introduced on SH3-DSP with
little follow-up testing, resulting in things like task_pt_dspregs()
referencing incorrect state on the stack.

This follows the MIPS convention of tracking the DSP state in the
thread_struct and handling the state save/restore in switch_to() and
finish_arch_switch() respectively. The regset interface is also updated,
which allows us to finally be rid of task_pt_dspregs() and the special
cased task_pt_regs().
Signed-off-by: NMichael Trimarchi <michael@evidence.eu.com>
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
      01ab1039
  5. 02 4月, 2009 1 次提交
    • P
      sh: Kill off broken direct-mapped cache mode. · e8208828
      由 Paul Mundt 提交于 
      Forcing direct-mapped worked on certain older 2-way set associative
parts, but was always error prone on 4-way parts. As these are the
norm these days, there is not much point in continuing to support this
mode. Most of the folks that used direct-mapped mode generally just
wanted writethrough caching in the first place..
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
      e8208828
  7. 31 3月, 2009 2 次提交
  9. 17 3月, 2009 1 次提交
    • P
      sh: Support for extended ASIDs on PTEAEX-capable SH-X3 cores. · 8263a67e
      由 Paul Mundt 提交于 
      This adds support for extended ASIDs (up to 16-bits) on newer SH-X3 cores
that implement the PTAEX register and respective functionality. Presently
only the 65nm SH7786 (90nm only supports legacy 8-bit ASIDs).

The main change is in how the PTE is written out when loading the entry
in to the TLB, as well as in how the TLB entry is selectively flushed.

While SH-X2 extended mode splits out the memory-mapped U and I-TLB data
arrays for extra bits, extended ASID mode splits out the address arrays.
While we don't use the memory-mapped data array access, the address
array accesses are necessary for selective TLB flushes, so these are
implemented newly and replace the generic SH-4 implementation.

With this, TLB flushes in switch_mm() are almost non-existent on newer
parts.
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
      8263a67e
  11. 16 3月, 2009 5 次提交
  13. 11 3月, 2009 2 次提交
  15. 10 3月, 2009 1 次提交
    • M
      sh: hibernation support · 2ef7f0da
      由 Magnus Damm 提交于 
      Add Suspend-to-disk / swsusp / CONFIG_HIBERNATION support
to the SuperH architecture.

To suspend, use "swapon /dev/sda2; echo disk > /sys/power/state"
To resume, pass "resume=/dev/sda2" on the kernel command line.

The patch "pm: rework includes, remove arch ifdefs V2" is
needed to allow the generic swsusp code to build properly.

Hibernation is not enabled with this patch though, a patch
setting ARCH_HIBERNATION_POSSIBLE will be submitted later.
Signed-off-by: NMagnus Damm <damm@igel.co.jp>
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
      2ef7f0da
  17. 06 3月, 2009 12 次提交
  19. 03 3月, 2009 1 次提交
  21. 27 2月, 2009 8 次提交
  23. 12 2月, 2009 1 次提交
  25. 29 1月, 2009 2 次提交
  27. 21 1月, 2009 1 次提交
  29. 22 12月, 2008 1 次提交