1. 24 4月, 2008 9 次提交
  2. 22 4月, 2008 1 次提交
  3. 19 4月, 2008 1 次提交
  4. 17 4月, 2008 1 次提交
  5. 10 4月, 2008 1 次提交
    • D
      [SPARC]: Fix several regset and ptrace bugs. · d786a4a6
      David S. Miller 提交于
      1) ptrace should pass 'current' to task_user_regset_view()
      
      2) When fetching general registers using a 64-bit view, and
         the target is 32-bit, we have to convert.
      
      3) Skip the whole register window get/set code block if
         the user isn't asking to access anything in there.
      
         Otherwise we have problems if the user doesn't have
         an address space setup.  Fetching ptrace register is
         still valid at such a time, and ptrace does not try
         to access the register window area of the regset.
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      d786a4a6
  6. 04 4月, 2008 2 次提交
  7. 29 3月, 2008 3 次提交
  8. 26 3月, 2008 12 次提交
  9. 25 3月, 2008 1 次提交
    • D
      [SPARC64]: Make save_stack_trace() more efficient. · 85a79353
      David S. Miller 提交于
      Doing a 'flushw' every stack trace capture creates so much overhead
      that it makes lockdep next to unusable.
      
      We only care about the frame pointer chain and the function caller
      program counters, so flush those by hand to the stack frame.
      
      This is significantly more efficient than a 'flushw' because:
      
      1) We only save 16 bytes per active register window to the stack.
      
      2) This doesn't push the entire register window context of the current
         call chain out of the cpu, forcing register window fill traps as we
         return back down.
      
      Note that we can't use 'restore' and 'save' instructions to move
      around the register windows because that wouldn't work on Niagara
      processors.  They optimize 'save' into a new register window by
      simply clearing out the registers instead of pulling them in from
      the on-chip register window backing store.
      
      Based upon a report by Tom Callaway.
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      85a79353
  10. 24 3月, 2008 2 次提交
  11. 22 3月, 2008 1 次提交
    • D
      [SPARC64]: Remove most limitations to kernel image size. · 64658743
      David S. Miller 提交于
      Currently kernel images are limited to 8MB in size, and this causes
      problems especially when enabling features that take up a lot of
      kernel image space such as lockdep.
      
      The code now will align the kernel image size up to 4MB and map that
      many locked TLB entries.  So, the only practical limitation is the
      number of available locked TLB entries which is 16 on Cheetah and 64
      on pre-Cheetah sparc64 cpus.  Niagara cpus don't actually have hw
      locked TLB entry support.  Rather, the hypervisor transparently
      provides support for "locked" TLB entries since it runs with physical
      addressing and does the initial TLB miss processing.
      
      Fully utilizing this change requires some help from SILO, a patch for
      which will be submitted to the maintainer.  Essentially, SILO will
      only currently map up to 8MB for the kernel image and that needs to be
      increased.
      
      Note that neither this patch nor the SILO bits will help with network
      booting.  The openfirmware code will only map up to a certain amount
      of kernel image during a network boot and there isn't much we can to
      about that other than to implemented a layered network booting
      facility.  Solaris has this, and calls it "wanboot" and we may
      implement something similar at some point.
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      64658743
  12. 18 3月, 2008 1 次提交
  13. 05 3月, 2008 1 次提交
  14. 04 3月, 2008 1 次提交
  15. 29 2月, 2008 3 次提交