1. 14 4月, 2012 1 次提交
  2. 01 3月, 2012 2 次提交
  3. 25 2月, 2012 2 次提交
  4. 14 2月, 2012 5 次提交
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  6. 27 1月, 2012 2 次提交
  7. 11 8月, 2011 1 次提交
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  9. 10 6月, 2011 1 次提交
    • B
      e1000e: access multiple PHY registers on same page at the same time · 2b6b168d
      Bruce Allan 提交于
      Doing a PHY page select can take a long time, relatively speaking. This
      can cause a significant delay when updating a number of PHY registers on
      the same page by unnecessarily setting the page for each PHY access. For
      example when going to Sx, all the PHY wakeup registers (WUC, RAR[], MTA[],
      SHRAR[], IP4AT[], IP6AT[], etc.) on 82577/8/9 need to be updated which
      takes a long time which can cause issues when suspending.
      
      This patch introduces new PHY ops function pointers to allow callers to
      set the page directly and do any number of PHY accesses on that page.
      This feature is currently only implemented for 82577, 82578 and 82579
      PHYs for both the normally addressed registers as well as the special-
      case addressing of the PHY wakeup registers on page 800. For the latter
      registers, the existing function for accessing the wakeup registers has
      been divided up into three- 1) enable access to the wakeup register page,
      2) perform the register access and 3) disable access to the wakeup register
      page. The two functions that enable/disable access to the wakeup register
      page are necessarily available to the caller so that the caller can restore
      the value of the Port Control (a.k.a. Wakeup Enable) register after the
      wakeup register accesses are done.
      
      All instances of writing to multiple PHY registers on the same page are
      updated to use this new method and to acquire any PHY locking mechanism
      before setting the page and performing the register accesses, and release
      the locking mechanism afterward.
      
      Some affiliated magic number cleanup is done as well.
      Signed-off-by: NBruce Allan <bruce.w.allan@intel.com>
      Tested-by: NJeff Pieper <jeffrey.e.pieper@intel.com>
      Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com>
      2b6b168d
  10. 14 4月, 2011 1 次提交
  11. 24 1月, 2011 1 次提交
  12. 14 1月, 2011 2 次提交
  13. 10 1月, 2011 1 次提交
  14. 25 12月, 2010 2 次提交
  15. 11 12月, 2010 2 次提交
  16. 02 11月, 2010 1 次提交
  17. 19 6月, 2010 2 次提交
  18. 13 5月, 2010 1 次提交
  19. 14 1月, 2010 1 次提交
  20. 03 12月, 2009 2 次提交
  21. 02 12月, 2009 5 次提交
  22. 22 11月, 2009 2 次提交