- 27 1月, 2015 1 次提交
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由 Nicolas Ferre 提交于
The entries are separated as ARM V4/V5 and ARM V7 as some other per-SoC config options may be removed in the near future. Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: NOlof Johansson <olof@lixom.net>
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- 24 1月, 2015 1 次提交
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由 Olof Johansson 提交于
Signed-off-by: NOlof Johansson <olof@lixom.net>
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- 22 1月, 2015 2 次提交
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由 Christoph Junghans 提交于
The pogoplug differs from the SheevaPlug only by a few details, but especially in the led assignments. This patch was tested under Gentoo Linux and is based on dts files from Arch Linux ARM and OpenWrt. Suggested-by: NFelix Kaechele <heffer@fedoraproject.org> Suggested-by: NOleg Rakhmanov <moonman.ca@gmail.com> Signed-off-by: NChristoph Junghans <ottxor@gentoo.org> [Andrew Lunn <andrew@lunn.ch>: Fixed subject line] Signed-off-by: NAndrew Lunn <andrew@lunn.ch>
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由 Wang Long 提交于
Add dts file for Hisilicon hip01 ca9x2 board Signed-off-by: NWang Long <long.wanglong@huawei.com> Signed-off-by: NWei Xu <xuwei5@hisilicon.com> [olof: Folded in smp enable-method from a different patch] Signed-off-by: NOlof Johansson <olof@lixom.net>
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- 21 1月, 2015 2 次提交
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由 Rafał Miłecki 提交于
Signed-off-by: NRafał Miłecki <zajec5@gmail.com> Signed-off-by: NHauke Mehrtens <hauke@hauke-m.de>
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由 Dan Haab 提交于
Luxul XWC-1000 is a controller device based on BCM4708 SoC. The only unusual thing in its DTS file is "ubi" partition on NAND flash. Signed-off-by: NDan Haab <dhaab@luxul.com> Signed-off-by: NHauke Mehrtens <hauke@hauke-m.de>
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- 20 1月, 2015 3 次提交
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由 Olof Johansson 提交于
The file is roughly sorted alphabetically (with some exceptions where old options have been split in two), so alphascale should go at the top instead of at the bottom. Also linewrap like other entries have been lately. Signed-off-by: NOlof Johansson <olof@lixom.net>
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由 Oleksij Rempel 提交于
for now it is wary basic SoC description with most important IPs needed to make this device work Signed-off-by: NOleksij Rempel <linux@rempel-privat.de> Signed-off-by: NOlof Johansson <olof@lixom.net>
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由 Tony Lindgren 提交于
This allows booting the device with basic functionality. Note that at least on my revision c board the DDR3 does not seem to work properly and only some of the memory can be reliably used. Also, the mainline u-boot does not seem to properly initialize the ethernet, so I've been using the old TI u-boot at: http://arago-project.org/git/projects/?p=u-boot-omap3.git;a=summary Cc: Brian Hutchinson <b.hutchman@gmail.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 16 1月, 2015 1 次提交
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由 Maxime COQUELIN 提交于
B2199 HDK is the reference board for STiH418 SoC. It has the following characteristics: - 3GB DDR3 - 8GB eMMC / SD-Card slot - 32MB NOR Flash - 1 x Gbit Ethernet - 1 x USB3.0 port - 2 x USB2.0 ports - 1 x Sata or Mini-PCIe port - 1 x WiFi 802.11ac (Quantenna) - 1 x HDMI out - 1 x HDMI in - 1 x SPDIF Reviewed-by: NPeter Griffin <peter.griffin@linaro.org> Signed-off-by: NMaxime Coquelin <maxime.coquelin@st.com>
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- 13 1月, 2015 2 次提交
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由 Zhiwu Song 提交于
CSR atlas7 uses Network on Chip(NoC) bus architecture, there are dozens of MARCOs, in each MARCO, there are dozens of hardware modules. Signed-off-by: NZhiwu Song <Zhiwu.Song@csr.com> Signed-off-by: NHao Liu <Hao.Liu@csr.com> Signed-off-by: NBarry Song <Baohua.Song@csr.com> Acked-by: NArnd Bergmann <arnd@arndb.de>
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由 Peter Robinson 提交于
A number of arches (EXYNOS/IMX/TEGRA) are separated out into finer grained definitions whether it be sub ARCH or SOC definitions. The device tree blobs should only be built if the specific option is enabled that supports that device or it might be that there's an expectation that the device is supported when in actual fact it's not. This ensures only the relevant bits are built. Also standardised the line break between the arch/soc definitions and the dtbs to be on separate lines for better consistency as per feedback. Signed-off-by: NPeter Robinson <pbrobinson@gmail.com> Reviewed-by: NLucas Stach <l.stach@pengutronix.de> Acked-by: NThierry Reding <treding@nvidia.com> Acked-by: NStephen Warren <swarren@nvidia.com> Acked-by: NShawn Guo <shawn.guo@freescale.com> [olof: Fixed stray \ in one of the IMX rules] Signed-off-by: NOlof Johansson <olof@lixom.net>
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- 11 1月, 2015 1 次提交
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由 Barry Song 提交于
MARCO will not be supported any more. it has been replaced by CSR atlas7. Signed-off-by: NBarry Song <Baohua.Song@csr.com> Acked-by: NArnd Bergmann <arnd@arndb.de>
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- 09 1月, 2015 3 次提交
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由 Gregory CLEMENT 提交于
The A388-GP is a board produced by Marvell that holds - 1 PCIe slot - 2 mini PCIe slot (one of them is multiplexed with the PCIe slot, muxing is selected through the GPIO expander) - 1 16MB SPI-NOR - 2 Gigabit Ethernet ports - 4 SATA ports (2 of them are multiplexed with the mini PCIe slots, muxing is selected through the GPIO expander) - 1 SDIO slot - 1 USB3 port - 2 USB2 port - 2 GPIO/interrupts expander on I2C Signed-off-by: NGregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: NAndrew Lunn <andrew@lunn.ch>
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由 Gregory CLEMENT 提交于
This SoC belongs to the Armada 38x family. The main difference with the Armada 385 is that the 388 can handle two more SATA ports. Currently the consequence is the use of a different compatible string for the pinctrl node, in order to be able to use the pins associated to this 2 new SATA ports. The second SATA controller has also been moved from the armada38x.dtsi as it it specific to the Armada388 version. In the same time the Armada385 DB and Armada 385 RD board have been renamed in the 388 one and now include the armada-388.dtsi file. AS both of them have 4 SATA ports the SoC used on them were wrongly described. Signed-off-by: NGregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: NAndrew Lunn <andrew@lunn.ch>
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由 Maxime Ripard 提交于
The A385-AP is a board produced by Marvell that holds 3 mPCIe slot, a 16MB SPI-NOR, 3 Gigabit Ethernet ports, USB3 and NAND flash storage. [gregory.clement@free-electrons.com: switch the license to the dual X11/GPL with the agreement of the author] Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: NGregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: NAndrew Lunn <andrew@lunn.ch>
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- 08 1月, 2015 1 次提交
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由 Felipe Balbi 提交于
The AM437x Industrial Development Kit (IDK) is an application development platform targeted at industrial communication and control applications. It comes with a 3-phase motor driver, PROFINET, PROFIBUS and a few other industrial communication interfaces. The board has 1GiB of DDR3 RAM, QSPI NOR flash, a 100% discrete power design (no PMIC) and an on-board 2MP camera (not supported with Linux as of this writing). Signed-off-by: NFelipe Balbi <balbi@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 06 1月, 2015 2 次提交
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由 Robert Nelson 提交于
For more information about the Udoo boards: http://www.udoo.org/Signed-off-by: NRobert Nelson <robertcnelson@gmail.com> Reviewed-by: NFabio Estevam <fabio.estevam@freescale.com> Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
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由 Evgeni Dobrev 提交于
This patch adds support for Seagate BlackArmor NAS220. The Seagate BlackArmor NAS 220 is a NAS system based on Marvell 88f6192. It has 32MB NAND and 128MB DRAM. It has two SATA slots, one Gigabit Ethernet port, two USB 2.0 ports, two buttons and three LEDs. There is a serial port available on the CN5 connector on the board (1 - TX, 4 - RX, 6 - GND). The only functionality still not implemented is the bi-color led on the front panel (status). Pins mpp22 and mpp23 control this led. Setting mpp22 to high and mpp23 to low results in orange color. Setting mpp22 to low and mpp23 to high results in blue color. The third led is wired to show the SATA activity on the two drives. Signed-off-by: NEvgeni Dobrev <evgeni@studio-punkt.com> Acked-by: NSebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Signed-off-by: NAndrew Lunn <andrew@lunn.ch>
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- 05 1月, 2015 1 次提交
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由 Anson Huang 提交于
Add basic i.MX6SoloX Sabre Auto board support, currently only debug UART and uSDHC are supported on this board. Signed-off-by: NAnson Huang <b20788@freescale.com> Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
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- 21 12月, 2014 1 次提交
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由 Ulrich Hecht 提交于
Makes sure the dtb is built for multiplatform builds. Signed-off-by: NUlrich Hecht <ulrich.hecht+renesas@gmail.com> Acked-by: NGeert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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- 05 12月, 2014 4 次提交
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由 Rafał Miłecki 提交于
Signed-off-by: NRafał Miłecki <zajec5@gmail.com> Signed-off-by: NHauke Mehrtens <hauke@hauke-m.de>
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由 Rafał Miłecki 提交于
Signed-off-by: NRafał Miłecki <zajec5@gmail.com> Signed-off-by: NHauke Mehrtens <hauke@hauke-m.de>
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由 Rafał Miłecki 提交于
Signed-off-by: NRafał Miłecki <zajec5@gmail.com> Signed-off-by: NHauke Mehrtens <hauke@hauke-m.de>
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由 Rafał Miłecki 提交于
Signed-off-by: NRafał Miłecki <zajec5@gmail.com> Signed-off-by: NHauke Mehrtens <hauke@hauke-m.de>
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- 01 12月, 2014 1 次提交
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由 Peter Crosthwaite 提交于
Add a DTS describing the Digilent ZYBO board. Similar to ZED but with a 50MHz crystal instead of 33MHz. Acked-by: NSoren Brinkmann <soren.brinkmann@xilinx.com> Signed-off-by: NPeter Crosthwaite <crosthwaite.peter@gmail.com> Signed-off-by: NMichal Simek <michal.simek@xilinx.com>
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- 27 11月, 2014 1 次提交
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由 Youngjun Cho 提交于
This patch adds new board dts file to support Samsung Monk board which is based on Exynos3250 SoC and has different H/W configuration from Rinato. This dts file support following features: - eMMC - Main PMIC (Samsung S2MPS14) - Interface PMIC (Maxim MAX77836, MUIC, fuel-gauge, charger) - RTC of Exynos3250 - ADC of Exynos3250 with NTC thermistor - I2S of Exynos3250 - TMU of Exynos3250 - Secure firmware for Exynos3250 secondary cpu boot - Serial ports of Exynos3250 - gpio-key for power key Signed-off-by: NYoungjun Cho <yj44.cho@samsung.com> Signed-off-by: NChanwoo Choi <cw00.choi@samsung.com> Signed-off-by: NInki Dae <inki.dae@samsung.com> Signed-off-by: NSeung-Woo Kim <sw0312.kim@samsung.com> Signed-off-by: NJaehoon Chung <jh80.chung@samsung.com> Signed-off-by: NKyungmin Park <kyungmin.park@samsung.com> Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>
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- 23 11月, 2014 8 次提交
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由 Chen-Yu Tsai 提交于
The A80 Optimus Board is was launched with the Allwinner A80 SoC. It was jointly developed by Allwinner and Merrii. This board has a UART port, a JTAG connector, USB host ports, a USB 3.0 OTG connector, an HDMI output, a micro SD slot, 8G NAND flash, 4G DRAM, a camera sensor interface, a WiFi/BT combo chip, a headphone jack, IR receiver, and additional GPIO headers. This patch adds only basic support. Signed-off-by: NChen-Yu Tsai <wens@csie.org> Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com> Tested-by: NAndreas Färber <afaerber@suse.de>
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由 Iain Paton 提交于
This adds support for the Olimex A20-OLinuXino-Lime2 https://www.olimex.com/Products/OLinuXino/A20/A20-OLinuXIno-LIME2 Differences to previous Lime boards are 1GB RAM and gigabit ethernet Signed-off-by: NIain Paton <ipaton0@gmail.com> Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com>
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由 Hans de Goede 提交于
The Mele M3 is yet another Allwinnner based Android top set box from Mele. It uses a housing similar to the A2000, but without the USM sata storage slot at the top. It features an A20 SoC, 1G RAM, 4G eMMC (unique for Allwinner devices), 100Mbit ethernet, HDMI out, 3 USB A receptacles, VGA, and A/V OUT connections. Signed-off-by: NHans de Goede <hdegoede@redhat.com> Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com>
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由 Hans de Goede 提交于
The Banana Pi is an A20 based development board using Raspberry Pi compatible IO headers. It comes with 1 GB RAM, 1 Gb ethernet, 2x USB host, sata, hdmi and stereo audio out + various expenansion headers: http://www.lemaker.org/Signed-off-by: NHans de Goede <hdegoede@redhat.com> Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com>
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由 Stefan Agner 提交于
Add Colibri VF50 device tree files vf500-colibri.dtsi and vf500-colibri-eval-v3.dts, in line with the Colibri VF61 device tree files. However, to minimize dupplication we also add vf-colibri.dtsi and vf-colibri-eval-v3.dtsi which contain the common device tree nodes. Signed-off-by: NStefan Agner <stefan@agner.ch> Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
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由 Jingchang Lu 提交于
The LS1021A TWR is a low cost, high-performance evaluation, development and test platform supporting the LS1021A processor. It is optimized to support the high-bandwidth DDR3L memory and a full complement of high-speed SerDes ports. For more detail information about the LS1021A TWR board, please refer to LS1021A QorIQ Tower System Reference Manual. Signed-off-by: NChao Fu <B44548@freescale.com> Signed-off-by: NJingchang Lu <jingchang.lu@freescale.com> Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
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由 Jingchang Lu 提交于
The LS1021A QorIQ development system (QDS) is a high-performance computing evaluation, development and test platform supporting the LS1021A processor. The LS1021A QDS is optimized to support the high-bandwidth DDR3LP/DDR4 memory and a full complement of high-speed SerDes ports. For more detail information about the LS1021AQDS, please refer to the QorIQ LS1021A Development System Reference Manual. Signed-off-by: NAlison Wang <alison.wang@freescale.com> Signed-off-by: NChao Fu <B44548@freescale.com> Signed-off-by: NJason Jin <Jason.Jin@freescale.com> Signed-off-by: NXiubo Li <Li.Xiubo@freescale.com> Signed-off-by: NBhupesh Sharma <bhupesh.sharma@freescale.com> Signed-off-by: NJaiprakash Singh <b44839@freescale.com> Signed-off-by: NJingchang Lu <jingchang.lu@freescale.com> Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
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由 Soeren Moch 提交于
TBS2910 is a i.MX6Q based board. For additional details refer to http://www.tbsdtv.com/products/tbs2910-matrix-arm-mini-pc.htmlSigned-off-by: NSoeren Moch <smoch@web.de> Reviewed-by: NSebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Reviewed-by: NFabio Estevam <fabio.estevam@freescale.com> Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
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- 22 11月, 2014 3 次提交
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由 Arnaud Ebalard 提交于
Synology DS414 is a 4-bay NAS powered by a Marvell Armada XP (mv78230 dual-core @1.33Ghz). It is very similar on many aspects to previous 4-bay synology models based on Marvell kirkwood SoC. Here is a short summary of the device: - 1GB RAM - Boot on SPI flash (64Mbit Micron N25Q064) - 2 GbE interfaces (Armada MAC connected to two Marvell 88E1512 PHY via RGMII) - 1 front USB 2.0 ports (directly handled by the Armada 370) - 2 rear USB 3.0 ports (handled by an EtronTech EJ168A XHCI controller on the PCIe bus) - 4 internal SATA ports handled by a Marvell 88SX7042 SATA-II controller on the PCIe bus) - Seiko S-35390A I2C RTC chip - UART0 providing serial console - UART1 used for poweroff (connected to a Microchip PIC16F883) Additional note: the front LEDs the and the two fans are not directly connected to the SoC and under its control. The former are presumably driven by the SATA controller, the latter by the PIC. [ jac: fixed up s/ge[01]_rgmii_pins/pmx_ge[01]_rgmii/ to match armada-xp.dtsi ] Acked-by: NAndrew Lunn <andrew@lunn.ch> Signed-off-by: NArnaud Ebalard <arno@natisbad.org> Link: https://lkml.kernel.org/r/5b678d6d1f2f42f4bf0d087878b9d8024d463ea7.1416613429.git.arno@natisbad.orgSigned-off-by: NJason Cooper <jason@lakedaemon.net>
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由 Arnaud Ebalard 提交于
Synology DS213j is a 2-bay NAS powered by a Marvell Armada 370 (88F6710 @1.2Ghz). It is very similar on many aspects to previous 2-bay synology models based on Marvell kirkwood SoC. Here is a short summary of the device: - 512MB RAM - boot on SPI flash (64Mbit Micron N25Q064) - 1 GbE interface (Armada MAC connected to a Marvell 88E1512 PHY via SGMII) - 2 rear USB 2.0 ports (directly handled by the Armada 370) - 2 internal SATA ports handled by the Armada 370: 2 GPIO for presence, 2 for powering them - two front amber LED (disk1, disk2) controlled by the SoC - Seiko S-35390A I2C RTC chip - UART0 providing serial console - UART1 used for poweroff (connected to a TI MSP430F2111) - Fan handled via 4 GPIO (3 for speed, 1 for alarm) Acked-by: NAndrew Lunn <andrew@lunn.ch> Signed-off-by: NArnaud Ebalard <arno@natisbad.org> Link: https://lkml.kernel.org/r/20f1a03897df1d825b62abdd525e588a8e39b3ec.1416613429.git.arno@natisbad.orgSigned-off-by: NJason Cooper <jason@lakedaemon.net>
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由 George McCollister 提交于
This adds the NovaTech OrionLXm which is based on the AM335x SoC http://www.novatechweb.com/substation-automation/orionlxm/ RAM: 512MiB Flash: 4GB eMMC Ethernet PHYs: 2x Micrel KSZ8041FTLI USB ports are used internally by the expansion cards. Internal micro SD slot is available. Signed-off-by: NGeorge McCollister <george.mccollister@gmail.com> Reviewed-by: NFelipe Balbi <balbi@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 21 11月, 2014 1 次提交
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由 Dinh Nguyen 提交于
The Arria 10 is latest SOC+FPGA from the Altera SOCFPGA platform. The Arria10 SOC shares some similarities with the SOCFPGA Cyclone5 and Arria5, but there are enough differences to warrant a new base dtsi. The differences are: * 3 EMAC controllers * 5 I2C controllers * 3 SPI controllers * 1.5 GHZ dual A9s * Support for DDR4 Besides the usual memory map and IRQ changes, the clock framework will be different, so this patch just adds the fixed-clocks. Signed-off-by: NThor Thayer <tthayer@opensource.altera.com> Signed-off-by: NDinh Nguyen <dinguyen@opensource.altera.com>
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- 20 11月, 2014 1 次提交
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由 Matthias Klein 提交于
The model B and B+ differ in the GPIO lines for ACT and PWR leds, and the I2S interface. Signed-off-by: NMatthias Klein <matthias.klein@linux.com> Tested-by: NStephen Warren <swarren@nvidia.com> Signed-off-by: NLee Jones <lee@kernel.org> Signed-off-by: NArnd Bergmann <arnd@arndb.de>
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