Skip to content

R
raspberrypi-kernel

openeuler / raspberrypi-kernel

通知 13
Star 1
Fork 0
R
raspberrypi-kernel
提交 26bcc181 编写于 作者: A Arend van Spriel 提交者： Greg Kroah-Hartman
浏览文件
操作

staging: brcm80211: remove usage of struct osl_info from util sources 

Most of the util source files do not need the osl_info anymore due
to previous patches so usage of it has been removed.
Reviewed-by: NRoland Vossen <rvossen@broadcom.com>
Reviewed-by: NBrett Rudley <brudley@broadcom.com>
Signed-off-by: NArend van Spriel <arend@broadcom.com>
Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
上级 ff31c54c
隐藏空白更改
内联 并排
Showing with 207 addition and 257 deletion
drivers/staging/brcm80211/brcmfmac/dhd_sdio.c
浏览文件 @ 26bcc181
...@@ -2283,7 +2283,7 @@ dhdsdio_doiovar(dhd_bus_t *bus, const bcm_iovar_t *vi, u32 actionid, ...@@ -2283,7 +2283,7 @@ dhdsdio_doiovar(dhd_bus_t *bus, const bcm_iovar_t *vi, u32 actionid,
case IOV_SVAL(IOV_SDIOD_DRIVE): case IOV_SVAL(IOV_SDIOD_DRIVE):
dhd_sdiod_drive_strength = int_val; dhd_sdiod_drive_strength = int_val;
si_sdiod_drive_strength_init(bus->sih, bus->dhd->osh, si_sdiod_drive_strength_init(bus->sih,
dhd_sdiod_drive_strength); dhd_sdiod_drive_strength);
break; break;
...@@ -3329,7 +3329,7 @@ static u8 dhdsdio_rxglom(dhd_bus_t *bus, u8 rxseq) ...@@ -3329,7 +3329,7 @@ static u8 dhdsdio_rxglom(dhd_bus_t *bus, u8 rxseq)
F2SYNC, bus->dataptr, F2SYNC, bus->dataptr,
dlen, NULL, NULL, NULL); dlen, NULL, NULL, NULL);
sublen = sublen =
(u16) pktfrombuf(osh, pfirst, 0, dlen, (u16) pktfrombuf(pfirst, 0, dlen,
bus->dataptr); bus->dataptr);
if (sublen != dlen) { if (sublen != dlen) {
DHD_ERROR(("%s: FAILED TO COPY, dlen %d sublen %d\n", DHD_ERROR(("%s: FAILED TO COPY, dlen %d sublen %d\n",
...@@ -5317,7 +5317,7 @@ dhdsdio_probe_attach(struct dhd_bus *bus, struct osl_info *osh, void *sdh, ...@@ -5317,7 +5317,7 @@ dhdsdio_probe_attach(struct dhd_bus *bus, struct osl_info *osh, void *sdh,
#endif /* DHD_DEBUG */ #endif /* DHD_DEBUG */
/* si_attach() will provide an SI handle and scan the backplane */ /* si_attach() will provide an SI handle and scan the backplane */
bus->sih = si_attach((uint) devid, osh, regsva, DHD_BUS, sdh, bus->sih = si_attach((uint) devid, regsva, DHD_BUS, sdh,
&bus->vars, &bus->varsz); &bus->vars, &bus->varsz);
if (!(bus->sih)) { if (!(bus->sih)) {
DHD_ERROR(("%s: si_attach failed!\n", __func__)); DHD_ERROR(("%s: si_attach failed!\n", __func__));
...@@ -5332,7 +5332,7 @@ dhdsdio_probe_attach(struct dhd_bus *bus, struct osl_info *osh, void *sdh, ...@@ -5332,7 +5332,7 @@ dhdsdio_probe_attach(struct dhd_bus *bus, struct osl_info *osh, void *sdh,
goto fail; goto fail;
} }
si_sdiod_drive_strength_init(bus->sih, osh, dhd_sdiod_drive_strength); si_sdiod_drive_strength_init(bus->sih, dhd_sdiod_drive_strength);
/* Get info on the ARM and SOCRAM cores... */ /* Get info on the ARM and SOCRAM cores... */
if (!DHD_NOPMU(bus)) { if (!DHD_NOPMU(bus)) {
......
drivers/staging/brcm80211/brcmsmac/phy/wlc_phy_n.c
浏览文件 @ 26bcc181
...@@ -19082,10 +19082,10 @@ wlc_phy_chanspec_nphy_setup(phy_info_t *pi, chanspec_t chanspec, ...@@ -19082,10 +19082,10 @@ wlc_phy_chanspec_nphy_setup(phy_info_t *pi, chanspec_t chanspec,
if ((pi->sh->chip == BCM4716_CHIP_ID) || if ((pi->sh->chip == BCM4716_CHIP_ID) ||
(pi->sh->chip == BCM47162_CHIP_ID)) { (pi->sh->chip == BCM47162_CHIP_ID)) {
si_pmu_spuravoid(pi->sh->sih, pi->sh->osh, spuravoid); si_pmu_spuravoid(pi->sh->sih, spuravoid);
} else { } else {
wlapi_bmac_core_phypll_ctl(pi->sh->physhim, false); wlapi_bmac_core_phypll_ctl(pi->sh->physhim, false);
si_pmu_spuravoid(pi->sh->sih, pi->sh->osh, spuravoid); si_pmu_spuravoid(pi->sh->sih, spuravoid);
wlapi_bmac_core_phypll_ctl(pi->sh->physhim, true); wlapi_bmac_core_phypll_ctl(pi->sh->physhim, true);
} }
......
drivers/staging/brcm80211/brcmsmac/wlc_ampdu.c
浏览文件 @ 26bcc181
...@@ -494,7 +494,6 @@ wlc_sendampdu(struct ampdu_info *ampdu, struct wlc_txq_info *qi, ...@@ -494,7 +494,6 @@ wlc_sendampdu(struct ampdu_info *ampdu, struct wlc_txq_info *qi,
struct sk_buff **pdu, int prec) struct sk_buff **pdu, int prec)
{ {
struct wlc_info *wlc; struct wlc_info *wlc;
struct osl_info *osh;
struct sk_buff *p, *pkt[AMPDU_MAX_MPDU]; struct sk_buff *p, *pkt[AMPDU_MAX_MPDU];
u8 tid, ndelim; u8 tid, ndelim;
int err = 0; int err = 0;
...@@ -526,7 +525,6 @@ wlc_sendampdu(struct ampdu_info *ampdu, struct wlc_txq_info *qi, ...@@ -526,7 +525,6 @@ wlc_sendampdu(struct ampdu_info *ampdu, struct wlc_txq_info *qi,
u16 qlen; u16 qlen;
wlc = ampdu->wlc; wlc = ampdu->wlc;
osh = wlc->osh;
p = *pdu; p = *pdu;
ASSERT(p); ASSERT(p);
...@@ -1070,7 +1068,7 @@ wlc_ampdu_dotxstatus_complete(struct ampdu_info *ampdu, struct scb *scb, ...@@ -1070,7 +1068,7 @@ wlc_ampdu_dotxstatus_complete(struct ampdu_info *ampdu, struct scb *scb,
wlc->pub->unit, txs->phyerr); wlc->pub->unit, txs->phyerr);
if (WL_ERROR_ON()) { if (WL_ERROR_ON()) {
prpkt("txpkt (AMPDU)", wlc->osh, p); prpkt("txpkt (AMPDU)", p);
wlc_print_txdesc((d11txh_t *) p->data); wlc_print_txdesc((d11txh_t *) p->data);
} }
wlc_print_txstatus(txs); wlc_print_txstatus(txs);
......
drivers/staging/brcm80211/brcmsmac/wlc_bmac.c
浏览文件 @ 26bcc181
...@@ -674,7 +674,7 @@ int wlc_bmac_attach(struct wlc_info *wlc, u16 vendor, u16 device, uint unit, ...@@ -674,7 +674,7 @@ int wlc_bmac_attach(struct wlc_info *wlc, u16 vendor, u16 device, uint unit,
* Also initialize software state that depends on the particular hardware * Also initialize software state that depends on the particular hardware
* we are running. * we are running.
*/ */
wlc_hw->sih = si_attach((uint) device, osh, regsva, bustype, btparam, wlc_hw->sih = si_attach((uint) device, regsva, bustype, btparam,
&wlc_hw->vars, &wlc_hw->vars_size); &wlc_hw->vars, &wlc_hw->vars_size);
if (wlc_hw->sih == NULL) { if (wlc_hw->sih == NULL) {
WL_ERROR("wl%d: wlc_bmac_attach: si_attach failed\n", unit); WL_ERROR("wl%d: wlc_bmac_attach: si_attach failed\n", unit);
......
drivers/staging/brcm80211/include/bcmsrom.h
浏览文件 @ 26bcc181
...@@ -21,14 +21,14 @@ ...@@ -21,14 +21,14 @@
/* Prototypes */ /* Prototypes */
extern int srom_var_init(si_t *sih, uint bus, void *curmap, extern int srom_var_init(si_t *sih, uint bus, void *curmap,
struct osl_info *osh, char **vars, uint *count); char **vars, uint *count);
extern int srom_read(si_t *sih, uint bus, void *curmap, struct osl_info *osh, extern int srom_read(si_t *sih, uint bus, void *curmap,
uint byteoff, uint nbytes, u16 *buf, bool check_crc); uint byteoff, uint nbytes, u16 *buf, bool check_crc);
/* parse standard PCMCIA cis, normally used by SB/PCMCIA/SDIO/SPI/OTP /* parse standard PCMCIA cis, normally used by SB/PCMCIA/SDIO/SPI/OTP
* and extract from it into name=value pairs * and extract from it into name=value pairs
*/ */
extern int srom_parsecis(struct osl_info *osh, u8 **pcis, uint ciscnt, extern int srom_parsecis(u8 **pcis, uint ciscnt,
char **vars, uint *count); char **vars, uint *count);
#endif /* _bcmsrom_h_ */ #endif /* _bcmsrom_h_ */
drivers/staging/brcm80211/include/bcmutils.h
浏览文件 @ 26bcc181
...@@ -140,7 +140,7 @@ extern struct sk_buff *pktq_mdeq(struct pktq *pq, uint prec_bmp, int *prec_out); ...@@ -140,7 +140,7 @@ extern struct sk_buff *pktq_mdeq(struct pktq *pq, uint prec_bmp, int *prec_out);
/* externs */ /* externs */
/* packet */ /* packet */
extern uint pktfrombuf(struct osl_info *osh, struct sk_buff *p, extern uint pktfrombuf(struct sk_buff *p,
uint offset, int len, unsigned char *buf); uint offset, int len, unsigned char *buf);
extern uint pkttotlen(struct sk_buff *p); extern uint pkttotlen(struct sk_buff *p);
...@@ -155,10 +155,9 @@ extern struct sk_buff *pktq_mdeq(struct pktq *pq, uint prec_bmp, int *prec_out); ...@@ -155,10 +155,9 @@ extern struct sk_buff *pktq_mdeq(struct pktq *pq, uint prec_bmp, int *prec_out);
extern char *getvar(char *vars, const char *name); extern char *getvar(char *vars, const char *name);
extern int getintvar(char *vars, const char *name); extern int getintvar(char *vars, const char *name);
#ifdef BCMDBG #ifdef BCMDBG
extern void prpkt(const char *msg, struct osl_info *osh, extern void prpkt(const char *msg, struct sk_buff *p0);
struct sk_buff *p0);
#else #else
#define prpkt(a, b, c) #define prpkt(a, b)
#endif /* BCMDBG */ #endif /* BCMDBG */
#define bcm_perf_enable() #define bcm_perf_enable()
......
drivers/staging/brcm80211/include/hndpmu.h
浏览文件 @ 26bcc181
...@@ -28,44 +28,41 @@ ...@@ -28,44 +28,41 @@
#define SET_LDO_VOLTAGE_LNLDO1 9 #define SET_LDO_VOLTAGE_LNLDO1 9
#define SET_LDO_VOLTAGE_LNLDO2_SEL 10 #define SET_LDO_VOLTAGE_LNLDO2_SEL 10
extern void si_pmu_init(si_t *sih, struct osl_info *osh); extern void si_pmu_init(si_t *sih);
extern void si_pmu_chip_init(si_t *sih, struct osl_info *osh); extern void si_pmu_chip_init(si_t *sih);
extern void si_pmu_pll_init(si_t *sih, struct osl_info *osh, u32 xtalfreq); extern void si_pmu_pll_init(si_t *sih, u32 xtalfreq);
extern void si_pmu_res_init(si_t *sih, struct osl_info *osh); extern void si_pmu_res_init(si_t *sih);
extern void si_pmu_swreg_init(si_t *sih, struct osl_info *osh); extern void si_pmu_swreg_init(si_t *sih);
extern u32 si_pmu_force_ilp(si_t *sih, struct osl_info *osh, bool force); extern u32 si_pmu_force_ilp(si_t *sih, bool force);
extern u32 si_pmu_si_clock(si_t *sih, struct osl_info *osh); extern u32 si_pmu_si_clock(si_t *sih);
extern u32 si_pmu_cpu_clock(si_t *sih, struct osl_info *osh); extern u32 si_pmu_cpu_clock(si_t *sih);
extern u32 si_pmu_mem_clock(si_t *sih, struct osl_info *osh); extern u32 si_pmu_mem_clock(si_t *sih);
extern u32 si_pmu_alp_clock(si_t *sih, struct osl_info *osh); extern u32 si_pmu_alp_clock(si_t *sih);
extern u32 si_pmu_ilp_clock(si_t *sih, struct osl_info *osh); extern u32 si_pmu_ilp_clock(si_t *sih);
extern void si_pmu_set_switcher_voltage(si_t *sih, struct osl_info *osh, extern void si_pmu_set_switcher_voltage(si_t *sih,
u8 bb_voltage, u8 rf_voltage); u8 bb_voltage, u8 rf_voltage);
extern void si_pmu_set_ldo_voltage(si_t *sih, struct osl_info *osh, u8 ldo, extern void si_pmu_set_ldo_voltage(si_t *sih, u8 ldo, u8 voltage);
u8 voltage); extern u16 si_pmu_fast_pwrup_delay(si_t *sih);
extern u16 si_pmu_fast_pwrup_delay(si_t *sih, struct osl_info *osh); extern void si_pmu_rcal(si_t *sih);
extern void si_pmu_rcal(si_t *sih, struct osl_info *osh);
extern void si_pmu_pllupd(si_t *sih); extern void si_pmu_pllupd(si_t *sih);
extern void si_pmu_spuravoid(si_t *sih, struct osl_info *osh, u8 spuravoid); extern void si_pmu_spuravoid(si_t *sih, u8 spuravoid);
extern bool si_pmu_is_otp_powered(si_t *sih, struct osl_info *osh); extern bool si_pmu_is_otp_powered(si_t *sih);
extern u32 si_pmu_measure_alpclk(si_t *sih, struct osl_info *osh); extern u32 si_pmu_measure_alpclk(si_t *sih);
extern u32 si_pmu_chipcontrol(si_t *sih, uint reg, u32 mask, u32 val); extern u32 si_pmu_chipcontrol(si_t *sih, uint reg, u32 mask, u32 val);
extern u32 si_pmu_regcontrol(si_t *sih, uint reg, u32 mask, u32 val); extern u32 si_pmu_regcontrol(si_t *sih, uint reg, u32 mask, u32 val);
extern u32 si_pmu_pllcontrol(si_t *sih, uint reg, u32 mask, u32 val); extern u32 si_pmu_pllcontrol(si_t *sih, uint reg, u32 mask, u32 val);
extern void si_pmu_pllupd(si_t *sih); extern void si_pmu_pllupd(si_t *sih);
extern void si_pmu_sprom_enable(si_t *sih, struct osl_info *osh, bool enable); extern void si_pmu_sprom_enable(si_t *sih, bool enable);
extern void si_pmu_radio_enable(si_t *sih, bool enable); extern void si_pmu_radio_enable(si_t *sih, bool enable);
extern u32 si_pmu_waitforclk_on_backplane(si_t *sih, struct osl_info *osh, extern u32 si_pmu_waitforclk_on_backplane(si_t *sih, u32 clk, u32 delay);
u32 clk, u32 delay);
extern void si_pmu_otp_power(si_t *sih, struct osl_info *osh, bool on); extern void si_pmu_otp_power(si_t *sih, bool on);
extern void si_sdiod_drive_strength_init(si_t *sih, struct osl_info *osh, extern void si_sdiod_drive_strength_init(si_t *sih, u32 drivestrength);
u32 drivestrength);
#endif /* _hndpmu_h_ */ #endif /* _hndpmu_h_ */
drivers/staging/brcm80211/include/nicpci.h
浏览文件 @ 26bcc181
...@@ -47,15 +47,15 @@ struct sbpcieregs; ...@@ -47,15 +47,15 @@ struct sbpcieregs;
extern u8 pcicore_find_pci_capability(void *dev, u8 req_cap_id, extern u8 pcicore_find_pci_capability(void *dev, u8 req_cap_id,
unsigned char *buf, u32 *buflen); unsigned char *buf, u32 *buflen);
extern uint pcie_readreg(struct osl_info *osh, struct sbpcieregs *pcieregs, extern uint pcie_readreg(struct sbpcieregs *pcieregs,
uint addrtype, uint offset); uint addrtype, uint offset);
extern uint pcie_writereg(struct osl_info *osh, struct sbpcieregs *pcieregs, extern uint pcie_writereg(struct sbpcieregs *pcieregs,
uint addrtype, uint offset, uint val); uint addrtype, uint offset, uint val);
extern u8 pcie_clkreq(void *pch, u32 mask, u32 val); extern u8 pcie_clkreq(void *pch, u32 mask, u32 val);
extern u32 pcie_lcreg(void *pch, u32 mask, u32 val); extern u32 pcie_lcreg(void *pch, u32 mask, u32 val);
extern void *pcicore_init(si_t *sih, struct osl_info *osh, void *regs); extern void *pcicore_init(si_t *sih, void *pdev, void *regs);
extern void pcicore_deinit(void *pch); extern void pcicore_deinit(void *pch);
extern void pcicore_attach(void *pch, char *pvars, int state); extern void pcicore_attach(void *pch, char *pvars, int state);
extern void pcicore_hwup(void *pch); extern void pcicore_hwup(void *pch);
......
drivers/staging/brcm80211/include/siutils.h
浏览文件 @ 26bcc181
...@@ -118,8 +118,8 @@ typedef void (*gpio_handler_t) (u32 stat, void *arg); ...@@ -118,8 +118,8 @@ typedef void (*gpio_handler_t) (u32 stat, void *arg);
#define GPIO_CTRL_EPA_EN_MASK 0x40 #define GPIO_CTRL_EPA_EN_MASK 0x40
/* === exported functions === */ /* === exported functions === */
extern si_t *si_attach(uint pcidev, struct osl_info *osh, void *regs, extern si_t *si_attach(uint pcidev, void *regs, uint bustype,
uint bustype, void *sdh, char **vars, uint *varsz); void *sdh, char **vars, uint *varsz);
extern void si_detach(si_t *sih); extern void si_detach(si_t *sih);
extern bool si_pci_war16165(si_t *sih); extern bool si_pci_war16165(si_t *sih);
...@@ -128,7 +128,6 @@ extern uint si_coreid(si_t *sih); ...@@ -128,7 +128,6 @@ extern uint si_coreid(si_t *sih);
extern uint si_flag(si_t *sih); extern uint si_flag(si_t *sih);
extern uint si_coreidx(si_t *sih); extern uint si_coreidx(si_t *sih);
extern uint si_corerev(si_t *sih); extern uint si_corerev(si_t *sih);
struct osl_info *si_osh(si_t *sih);
extern uint si_corereg(si_t *sih, uint coreidx, uint regoff, uint mask, extern uint si_corereg(si_t *sih, uint coreidx, uint regoff, uint mask,
uint val); uint val);
extern void si_write_wrapperreg(si_t *sih, u32 offset, u32 val); extern void si_write_wrapperreg(si_t *sih, u32 offset, u32 val);
...@@ -213,7 +212,6 @@ typedef struct gpioh_item { ...@@ -213,7 +212,6 @@ typedef struct gpioh_item {
/* misc si info needed by some of the routines */ /* misc si info needed by some of the routines */
typedef struct si_info { typedef struct si_info {
struct si_pub pub; /* back plane public state (must be first) */ struct si_pub pub; /* back plane public state (must be first) */
struct osl_info *osh; /* osl os handle */
void *pbus; /* handle to bus (pci/sdio/..) */ void *pbus; /* handle to bus (pci/sdio/..) */
uint dev_coreid; /* the core provides driver functions */ uint dev_coreid; /* the core provides driver functions */
void *intr_arg; /* interrupt callback function arg */ void *intr_arg; /* interrupt callback function arg */
......
drivers/staging/brcm80211/util/bcmotp.c
浏览文件 @ 26bcc181
...@@ -78,7 +78,6 @@ typedef struct { ...@@ -78,7 +78,6 @@ typedef struct {
uint ccrev; /* chipc revision */ uint ccrev; /* chipc revision */
otp_fn_t *fn; /* OTP functions */ otp_fn_t *fn; /* OTP functions */
si_t *sih; /* Saved sb handle */ si_t *sih; /* Saved sb handle */
struct osl_info *osh;
#ifdef BCMIPXOTP #ifdef BCMIPXOTP
/* IPX OTP section */ /* IPX OTP section */
...@@ -569,15 +568,14 @@ static int hndotp_size(void *oh) ...@@ -569,15 +568,14 @@ static int hndotp_size(void *oh)
static u16 hndotp_otpr(void *oh, chipcregs_t *cc, uint wn) static u16 hndotp_otpr(void *oh, chipcregs_t *cc, uint wn)
{ {
#ifdef BCMDBG
otpinfo_t *oi = (otpinfo_t *) oh; otpinfo_t *oi = (otpinfo_t *) oh;
struct osl_info *osh; #endif
volatile u16 *ptr; volatile u16 *ptr;
ASSERT(wn < ((oi->size / 2) + OTP_RC_LIM_OFF)); ASSERT(wn < ((oi->size / 2) + OTP_RC_LIM_OFF));
ASSERT(cc != NULL); ASSERT(cc != NULL);
osh = si_osh(oi->sih);
ptr = (volatile u16 *)((volatile char *)cc + CC_SROM_OTP); ptr = (volatile u16 *)((volatile char *)cc + CC_SROM_OTP);
return R_REG(&ptr[wn]); return R_REG(&ptr[wn]);
} }
...@@ -585,15 +583,12 @@ static u16 hndotp_otpr(void *oh, chipcregs_t *cc, uint wn) ...@@ -585,15 +583,12 @@ static u16 hndotp_otpr(void *oh, chipcregs_t *cc, uint wn)
static u16 hndotp_otproff(void *oh, chipcregs_t *cc, int woff) static u16 hndotp_otproff(void *oh, chipcregs_t *cc, int woff)
{ {
otpinfo_t *oi = (otpinfo_t *) oh; otpinfo_t *oi = (otpinfo_t *) oh;
struct osl_info *osh;
volatile u16 *ptr; volatile u16 *ptr;
ASSERT(woff >= (-((int)oi->size / 2))); ASSERT(woff >= (-((int)oi->size / 2)));
ASSERT(woff < OTP_LIM_OFF); ASSERT(woff < OTP_LIM_OFF);
ASSERT(cc != NULL); ASSERT(cc != NULL);
osh = si_osh(oi->sih);
ptr = (volatile u16 *)((volatile char *)cc + CC_SROM_OTP); ptr = (volatile u16 *)((volatile char *)cc + CC_SROM_OTP);
return R_REG(&ptr[(oi->size / 2) + woff]); return R_REG(&ptr[(oi->size / 2) + woff]);
...@@ -601,12 +596,9 @@ static u16 hndotp_otproff(void *oh, chipcregs_t *cc, int woff) ...@@ -601,12 +596,9 @@ static u16 hndotp_otproff(void *oh, chipcregs_t *cc, int woff)
static u16 hndotp_read_bit(void *oh, chipcregs_t *cc, uint idx) static u16 hndotp_read_bit(void *oh, chipcregs_t *cc, uint idx)
{ {
otpinfo_t *oi = (otpinfo_t *) oh;
uint k, row, col; uint k, row, col;
u32 otpp, st; u32 otpp, st;
struct osl_info *osh;
osh = si_osh(oi->sih);
row = idx / 65; row = idx / 65;
col = idx % 65; col = idx % 65;
...@@ -637,12 +629,10 @@ static void *hndotp_init(si_t *sih) ...@@ -637,12 +629,10 @@ static void *hndotp_init(si_t *sih)
otpinfo_t *oi; otpinfo_t *oi;
u32 cap = 0, clkdiv, otpdiv = 0; u32 cap = 0, clkdiv, otpdiv = 0;
void *ret = NULL; void *ret = NULL;
struct osl_info *osh;
oi = &otpinfo; oi = &otpinfo;
idx = si_coreidx(sih); idx = si_coreidx(sih);
osh = si_osh(oi->sih);
/* Check for otp */ /* Check for otp */
cc = si_setcoreidx(sih, SI_CC_IDX); cc = si_setcoreidx(sih, SI_CC_IDX);
...@@ -920,7 +910,6 @@ void *otp_init(si_t *sih) ...@@ -920,7 +910,6 @@ void *otp_init(si_t *sih)
} }
oi->sih = sih; oi->sih = sih;
oi->osh = si_osh(oi->sih);
ret = (oi->fn->init) (sih); ret = (oi->fn->init) (sih);
......
drivers/staging/brcm80211/util/bcmsrom.c
浏览文件 @ 26bcc181
...@@ -67,29 +67,26 @@ extern uint _varsz; ...@@ -67,29 +67,26 @@ extern uint _varsz;
#define SROM_CIS_SINGLE 1 #define SROM_CIS_SINGLE 1
static int initvars_srom_si(si_t *sih, struct osl_info *osh, void *curmap, static int initvars_srom_si(si_t *sih, void *curmap, char **vars, uint *count);
char **vars, uint *count); static void _initvars_srom_pci(u8 sromrev, u16 *srom, uint off, varbuf_t *b);
static void _initvars_srom_pci(u8 sromrev, u16 *srom, uint off, static int initvars_srom_pci(si_t *sih, void *curmap, char **vars, uint *count);
varbuf_t *b);
static int initvars_srom_pci(si_t *sih, void *curmap, char **vars,
uint *count);
static int initvars_flash_si(si_t *sih, char **vars, uint *count); static int initvars_flash_si(si_t *sih, char **vars, uint *count);
#ifdef BCMSDIO #ifdef BCMSDIO
static int initvars_cis_sdio(struct osl_info *osh, char **vars, uint *count); static int initvars_cis_sdio(char **vars, uint *count);
static int sprom_cmd_sdio(struct osl_info *osh, u8 cmd); static int sprom_cmd_sdio(u8 cmd);
static int sprom_read_sdio(struct osl_info *osh, u16 addr, u16 *data); static int sprom_read_sdio(u16 addr, u16 *data);
#endif /* BCMSDIO */ #endif /* BCMSDIO */
static int sprom_read_pci(struct osl_info *osh, si_t *sih, u16 *sprom, static int sprom_read_pci(si_t *sih, u16 *sprom,
uint wordoff, u16 *buf, uint nwords, bool check_crc); uint wordoff, u16 *buf, uint nwords, bool check_crc);
#if defined(BCMNVRAMR) #if defined(BCMNVRAMR)
static int otp_read_pci(struct osl_info *osh, si_t *sih, u16 *buf, uint bufsz); static int otp_read_pci(si_t *sih, u16 *buf, uint bufsz);
#endif #endif
static u16 srom_cc_cmd(si_t *sih, struct osl_info *osh, void *ccregs, u32 cmd, static u16 srom_cc_cmd(si_t *sih, void *ccregs, u32 cmd,
uint wordoff, u16 data); uint wordoff, u16 data);
static int initvars_table(struct osl_info *osh, char *start, char *end, static int initvars_table(char *start, char *end,
char **vars, uint *count); char **vars, uint *count);
static int initvars_flash(si_t *sih, struct osl_info *osh, char **vp, static int initvars_flash(si_t *sih, char **vp,
uint len); uint len);
/* Initialization of varbuf structure */ /* Initialization of varbuf structure */
...@@ -157,7 +154,7 @@ static int varbuf_append(varbuf_t *b, const char *fmt, ...) ...@@ -157,7 +154,7 @@ static int varbuf_append(varbuf_t *b, const char *fmt, ...)
* Initialize local vars from the right source for this platform. * Initialize local vars from the right source for this platform.
* Return 0 on success, nonzero on error. * Return 0 on success, nonzero on error.
*/ */
int srom_var_init(si_t *sih, uint bustype, void *curmap, struct osl_info *osh, int srom_var_init(si_t *sih, uint bustype, void *curmap,
char **vars, uint *count) char **vars, uint *count)
{ {
uint len; uint len;
...@@ -174,7 +171,7 @@ int srom_var_init(si_t *sih, uint bustype, void *curmap, struct osl_info *osh, ...@@ -174,7 +171,7 @@ int srom_var_init(si_t *sih, uint bustype, void *curmap, struct osl_info *osh,
switch (bustype) { switch (bustype) {
case SI_BUS: case SI_BUS:
case JTAG_BUS: case JTAG_BUS:
return initvars_srom_si(sih, osh, curmap, vars, count); return initvars_srom_si(sih, curmap, vars, count);
case PCI_BUS: case PCI_BUS:
ASSERT(curmap != NULL); ASSERT(curmap != NULL);
...@@ -185,7 +182,7 @@ int srom_var_init(si_t *sih, uint bustype, void *curmap, struct osl_info *osh, ...@@ -185,7 +182,7 @@ int srom_var_init(si_t *sih, uint bustype, void *curmap, struct osl_info *osh,
#ifdef BCMSDIO #ifdef BCMSDIO
case SDIO_BUS: case SDIO_BUS:
return initvars_cis_sdio(osh, vars, count); return initvars_cis_sdio(vars, count);
#endif /* BCMSDIO */ #endif /* BCMSDIO */
default: default:
...@@ -196,7 +193,7 @@ int srom_var_init(si_t *sih, uint bustype, void *curmap, struct osl_info *osh, ...@@ -196,7 +193,7 @@ int srom_var_init(si_t *sih, uint bustype, void *curmap, struct osl_info *osh,
/* support only 16-bit word read from srom */ /* support only 16-bit word read from srom */
int int
srom_read(si_t *sih, uint bustype, void *curmap, struct osl_info *osh, srom_read(si_t *sih, uint bustype, void *curmap,
uint byteoff, uint nbytes, u16 *buf, bool check_crc) uint byteoff, uint nbytes, u16 *buf, bool check_crc)
{ {
uint off, nw; uint off, nw;
...@@ -225,12 +222,12 @@ srom_read(si_t *sih, uint bustype, void *curmap, struct osl_info *osh, ...@@ -225,12 +222,12 @@ srom_read(si_t *sih, uint bustype, void *curmap, struct osl_info *osh,
return 1; return 1;
if (sprom_read_pci if (sprom_read_pci
(osh, sih, srom, off, buf, nw, check_crc)) (sih, srom, off, buf, nw, check_crc))
return 1; return 1;
} }
#if defined(BCMNVRAMR) #if defined(BCMNVRAMR)
else { else {
if (otp_read_pci(osh, sih, buf, SROM_MAX)) if (otp_read_pci(sih, buf, SROM_MAX))
return 1; return 1;
} }
#endif #endif
...@@ -240,7 +237,7 @@ srom_read(si_t *sih, uint bustype, void *curmap, struct osl_info *osh, ...@@ -240,7 +237,7 @@ srom_read(si_t *sih, uint bustype, void *curmap, struct osl_info *osh,
nw = nbytes / 2; nw = nbytes / 2;
for (i = 0; i < nw; i++) { for (i = 0; i < nw; i++) {
if (sprom_read_sdio if (sprom_read_sdio
(osh, (u16) (off + i), (u16 *) (buf + i))) ((u16) (off + i), (u16 *) (buf + i)))
return 1; return 1;
} }
#endif /* BCMSDIO */ #endif /* BCMSDIO */
...@@ -378,7 +375,7 @@ u8 patch_pair; ...@@ -378,7 +375,7 @@ u8 patch_pair;
/* For dongle HW, accept partial calibration parameters */ /* For dongle HW, accept partial calibration parameters */
#define BCMDONGLECASE(n) #define BCMDONGLECASE(n)
int srom_parsecis(struct osl_info *osh, u8 *pcis[], uint ciscnt, char **vars, int srom_parsecis(u8 *pcis[], uint ciscnt, char **vars,
uint *count) uint *count)
{ {
char eabuf[32]; char eabuf[32];
...@@ -1398,7 +1395,7 @@ int srom_parsecis(struct osl_info *osh, u8 *pcis[], uint ciscnt, char **vars, ...@@ -1398,7 +1395,7 @@ int srom_parsecis(struct osl_info *osh, u8 *pcis[], uint ciscnt, char **vars,
*b.buf++ = '\0'; *b.buf++ = '\0';
ASSERT(b.buf - base <= MAXSZ_NVRAM_VARS); ASSERT(b.buf - base <= MAXSZ_NVRAM_VARS);
err = initvars_table(osh, base, b.buf, vars, count); err = initvars_table(base, b.buf, vars, count);
kfree(base); kfree(base);
return err; return err;
...@@ -1408,7 +1405,7 @@ int srom_parsecis(struct osl_info *osh, u8 *pcis[], uint ciscnt, char **vars, ...@@ -1408,7 +1405,7 @@ int srom_parsecis(struct osl_info *osh, u8 *pcis[], uint ciscnt, char **vars,
* not in the bus cores. * not in the bus cores.
*/ */
static u16 static u16
srom_cc_cmd(si_t *sih, struct osl_info *osh, void *ccregs, u32 cmd, srom_cc_cmd(si_t *sih, void *ccregs, u32 cmd,
uint wordoff, u16 data) uint wordoff, u16 data)
{ {
chipcregs_t *cc = (chipcregs_t *) ccregs; chipcregs_t *cc = (chipcregs_t *) ccregs;
...@@ -1454,7 +1451,7 @@ static inline void htol16_buf(u16 *buf, unsigned int size) ...@@ -1454,7 +1451,7 @@ static inline void htol16_buf(u16 *buf, unsigned int size)
* Return 0 on success, nonzero on error. * Return 0 on success, nonzero on error.
*/ */
static int static int
sprom_read_pci(struct osl_info *osh, si_t *sih, u16 *sprom, uint wordoff, sprom_read_pci(si_t *sih, u16 *sprom, uint wordoff,
u16 *buf, uint nwords, bool check_crc) u16 *buf, uint nwords, bool check_crc)
{ {
int err = 0; int err = 0;
...@@ -1471,7 +1468,7 @@ sprom_read_pci(struct osl_info *osh, si_t *sih, u16 *sprom, uint wordoff, ...@@ -1471,7 +1468,7 @@ sprom_read_pci(struct osl_info *osh, si_t *sih, u16 *sprom, uint wordoff,
ccregs = (void *)((u8 *) sprom - CC_SROM_OTP); ccregs = (void *)((u8 *) sprom - CC_SROM_OTP);
buf[i] = buf[i] =
srom_cc_cmd(sih, osh, ccregs, SRC_OP_READ, srom_cc_cmd(sih, ccregs, SRC_OP_READ,
wordoff + i, 0); wordoff + i, 0);
} else { } else {
...@@ -1514,7 +1511,7 @@ sprom_read_pci(struct osl_info *osh, si_t *sih, u16 *sprom, uint wordoff, ...@@ -1514,7 +1511,7 @@ sprom_read_pci(struct osl_info *osh, si_t *sih, u16 *sprom, uint wordoff,
} }
#if defined(BCMNVRAMR) #if defined(BCMNVRAMR)
static int otp_read_pci(struct osl_info *osh, si_t *sih, u16 *buf, uint bufsz) static int otp_read_pci(si_t *sih, u16 *buf, uint bufsz)
{ {
u8 *otp; u8 *otp;
uint sz = OTP_SZ_MAX / 2; /* size in words */ uint sz = OTP_SZ_MAX / 2; /* size in words */
...@@ -1562,7 +1559,7 @@ static int otp_read_pci(struct osl_info *osh, si_t *sih, u16 *buf, uint bufsz) ...@@ -1562,7 +1559,7 @@ static int otp_read_pci(struct osl_info *osh, si_t *sih, u16 *buf, uint bufsz)
* Create variable table from memory. * Create variable table from memory.
* Return 0 on success, nonzero on error. * Return 0 on success, nonzero on error.
*/ */
static int initvars_table(struct osl_info *osh, char *start, char *end, static int initvars_table(char *start, char *end,
char **vars, uint *count) char **vars, uint *count)
{ {
int c = (int)(end - start); int c = (int)(end - start);
...@@ -1589,8 +1586,7 @@ static int initvars_table(struct osl_info *osh, char *start, char *end, ...@@ -1589,8 +1586,7 @@ static int initvars_table(struct osl_info *osh, char *start, char *end,
* of the table upon enter and to the end of the table upon exit when success. * of the table upon enter and to the end of the table upon exit when success.
* Return 0 on success, nonzero on error. * Return 0 on success, nonzero on error.
*/ */
static int initvars_flash(si_t *sih, struct osl_info *osh, char **base, static int initvars_flash(si_t *sih, char **base, uint len)
uint len)
{ {
char *vp = *base; char *vp = *base;
char *flash; char *flash;
...@@ -1650,7 +1646,6 @@ static int initvars_flash(si_t *sih, struct osl_info *osh, char **base, ...@@ -1650,7 +1646,6 @@ static int initvars_flash(si_t *sih, struct osl_info *osh, char **base,
*/ */
static int initvars_flash_si(si_t *sih, char **vars, uint *count) static int initvars_flash_si(si_t *sih, char **vars, uint *count)
{ {
struct osl_info *osh = si_osh(sih);
char *vp, *base; char *vp, *base;
int err; int err;
...@@ -1662,9 +1657,9 @@ static int initvars_flash_si(si_t *sih, char **vars, uint *count) ...@@ -1662,9 +1657,9 @@ static int initvars_flash_si(si_t *sih, char **vars, uint *count)
if (!vp) if (!vp)
return BCME_NOMEM; return BCME_NOMEM;
err = initvars_flash(sih, osh, &vp, MAXSZ_NVRAM_VARS); err = initvars_flash(sih, &vp, MAXSZ_NVRAM_VARS);
if (err == 0) if (err == 0)
err = initvars_table(osh, base, vp, vars, count); err = initvars_table(base, vp, vars, count);
kfree(base); kfree(base);
...@@ -1861,7 +1856,6 @@ static int initvars_srom_pci(si_t *sih, void *curmap, char **vars, uint *count) ...@@ -1861,7 +1856,6 @@ static int initvars_srom_pci(si_t *sih, void *curmap, char **vars, uint *count)
u32 sr; u32 sr;
varbuf_t b; varbuf_t b;
char *vp, *base = NULL; char *vp, *base = NULL;
struct osl_info *osh = si_osh(sih);
bool flash = false; bool flash = false;
int err = 0; int err = 0;
...@@ -1879,7 +1873,7 @@ static int initvars_srom_pci(si_t *sih, void *curmap, char **vars, uint *count) ...@@ -1879,7 +1873,7 @@ static int initvars_srom_pci(si_t *sih, void *curmap, char **vars, uint *count)
sromwindow = (u16 *) SROM_OFFSET(sih); sromwindow = (u16 *) SROM_OFFSET(sih);
if (si_is_sprom_available(sih)) { if (si_is_sprom_available(sih)) {
err = err =
sprom_read_pci(osh, sih, sromwindow, 0, srom, SROM_WORDS, sprom_read_pci(sih, sromwindow, 0, srom, SROM_WORDS,
true); true);
if ((srom[SROM4_SIGN] == SROM4_SIGNATURE) || if ((srom[SROM4_SIGN] == SROM4_SIGNATURE) ||
...@@ -1889,7 +1883,7 @@ static int initvars_srom_pci(si_t *sih, void *curmap, char **vars, uint *count) ...@@ -1889,7 +1883,7 @@ static int initvars_srom_pci(si_t *sih, void *curmap, char **vars, uint *count)
&& (sih->buscorerev >= 0xe)))) { && (sih->buscorerev >= 0xe)))) {
/* sromrev >= 4, read more */ /* sromrev >= 4, read more */
err = err =
sprom_read_pci(osh, sih, sromwindow, 0, srom, sprom_read_pci(sih, sromwindow, 0, srom,
SROM4_WORDS, true); SROM4_WORDS, true);
sromrev = srom[SROM4_CRCREV] & 0xff; sromrev = srom[SROM4_CRCREV] & 0xff;
if (err) if (err)
...@@ -1907,24 +1901,29 @@ static int initvars_srom_pci(si_t *sih, void *curmap, char **vars, uint *count) ...@@ -1907,24 +1901,29 @@ static int initvars_srom_pci(si_t *sih, void *curmap, char **vars, uint *count)
} }
#if defined(BCMNVRAMR) #if defined(BCMNVRAMR)
/* Use OTP if SPROM not available */ /* Use OTP if SPROM not available */
else if ((err = otp_read_pci(osh, sih, srom, SROM_MAX)) == 0) {
/* OTP only contain SROM rev8/rev9 for now */
sromrev = srom[SROM4_CRCREV] & 0xff;
}
#endif
else { else {
err = 1; err = otp_read_pci(sih, srom, SROM_MAX);
BS_ERROR(("Neither SPROM nor OTP has valid image\n")); if (err == 0)
/* OTP only contain SROM rev8/rev9 for now */
sromrev = srom[SROM4_CRCREV] & 0xff;
else
err = 1;
} }
#else
else
err = 1;
#endif
/* We want internal/wltest driver to come up with default sromvars so we can /*
* program a blank SPROM/OTP. * We want internal/wltest driver to come up with default
* sromvars so we can program a blank SPROM/OTP.
*/ */
if (err) { if (err) {
char *value; char *value;
u32 val; u32 val;
val = 0; val = 0;
BS_ERROR(("Neither SPROM nor OTP has valid image\n"));
value = si_getdevpathvar(sih, "sromrev"); value = si_getdevpathvar(sih, "sromrev");
if (value) { if (value) {
sromrev = (u8) simple_strtoul(value, NULL, 0); sromrev = (u8) simple_strtoul(value, NULL, 0);
...@@ -1968,7 +1967,7 @@ static int initvars_srom_pci(si_t *sih, void *curmap, char **vars, uint *count) ...@@ -1968,7 +1967,7 @@ static int initvars_srom_pci(si_t *sih, void *curmap, char **vars, uint *count)
/* read variables from flash */ /* read variables from flash */
if (flash) { if (flash) {
err = initvars_flash(sih, osh, &vp, MAXSZ_NVRAM_VARS); err = initvars_flash(sih, &vp, MAXSZ_NVRAM_VARS);
if (err) if (err)
goto errout; goto errout;
goto varsdone; goto varsdone;
...@@ -1987,7 +1986,7 @@ static int initvars_srom_pci(si_t *sih, void *curmap, char **vars, uint *count) ...@@ -1987,7 +1986,7 @@ static int initvars_srom_pci(si_t *sih, void *curmap, char **vars, uint *count)
ASSERT((vp - base) <= MAXSZ_NVRAM_VARS); ASSERT((vp - base) <= MAXSZ_NVRAM_VARS);
varsdone: varsdone:
err = initvars_table(osh, base, vp, vars, count); err = initvars_table(base, vp, vars, count);
errout: errout:
if (base) if (base)
...@@ -2002,7 +2001,7 @@ static int initvars_srom_pci(si_t *sih, void *curmap, char **vars, uint *count) ...@@ -2002,7 +2001,7 @@ static int initvars_srom_pci(si_t *sih, void *curmap, char **vars, uint *count)
* Read the SDIO cis and call parsecis to initialize the vars. * Read the SDIO cis and call parsecis to initialize the vars.
* Return 0 on success, nonzero on error. * Return 0 on success, nonzero on error.
*/ */
static int initvars_cis_sdio(struct osl_info *osh, char **vars, uint *count) static int initvars_cis_sdio(char **vars, uint *count)
{ {
u8 *cis[SBSDIO_NUM_FUNCTION + 1]; u8 *cis[SBSDIO_NUM_FUNCTION + 1];
uint fn, numfn; uint fn, numfn;
...@@ -2027,7 +2026,7 @@ static int initvars_cis_sdio(struct osl_info *osh, char **vars, uint *count) ...@@ -2027,7 +2026,7 @@ static int initvars_cis_sdio(struct osl_info *osh, char **vars, uint *count)
} }
if (!rc) if (!rc)
rc = srom_parsecis(osh, cis, fn, vars, count); rc = srom_parsecis(cis, fn, vars, count);
while (fn-- > 0) while (fn-- > 0)
kfree(cis[fn]); kfree(cis[fn]);
...@@ -2036,7 +2035,7 @@ static int initvars_cis_sdio(struct osl_info *osh, char **vars, uint *count) ...@@ -2036,7 +2035,7 @@ static int initvars_cis_sdio(struct osl_info *osh, char **vars, uint *count)
} }
/* set SDIO sprom command register */ /* set SDIO sprom command register */
static int sprom_cmd_sdio(struct osl_info *osh, u8 cmd) static int sprom_cmd_sdio(u8 cmd)
{ {
u8 status = 0; u8 status = 0;
uint wait_cnt = 1000; uint wait_cnt = 1000;
...@@ -2056,7 +2055,7 @@ static int sprom_cmd_sdio(struct osl_info *osh, u8 cmd) ...@@ -2056,7 +2055,7 @@ static int sprom_cmd_sdio(struct osl_info *osh, u8 cmd)
} }
/* read a word from the SDIO srom */ /* read a word from the SDIO srom */
static int sprom_read_sdio(struct osl_info *osh, u16 addr, u16 *data) static int sprom_read_sdio(u16 addr, u16 *data)
{ {
u8 addr_l, addr_h, data_l, data_h; u8 addr_l, addr_h, data_l, data_h;
...@@ -2070,7 +2069,7 @@ static int sprom_read_sdio(struct osl_info *osh, u16 addr, u16 *data) ...@@ -2070,7 +2069,7 @@ static int sprom_read_sdio(struct osl_info *osh, u16 addr, u16 *data)
NULL); NULL);
/* do read */ /* do read */
if (sprom_cmd_sdio(osh, SBSDIO_SPROM_READ)) if (sprom_cmd_sdio(SBSDIO_SPROM_READ))
return 1; return 1;
/* read data */ /* read data */
...@@ -2084,8 +2083,7 @@ static int sprom_read_sdio(struct osl_info *osh, u16 addr, u16 *data) ...@@ -2084,8 +2083,7 @@ static int sprom_read_sdio(struct osl_info *osh, u16 addr, u16 *data)
} }
#endif /* BCMSDIO */ #endif /* BCMSDIO */
static int initvars_srom_si(si_t *sih, struct osl_info *osh, void *curmap, static int initvars_srom_si(si_t *sih, void *curmap, char **vars, uint *varsz)
char **vars, uint *varsz)
{ {
/* Search flash nvram section for srom variables */ /* Search flash nvram section for srom variables */
return initvars_flash_si(sih, vars, varsz); return initvars_flash_si(sih, vars, varsz);
......
drivers/staging/brcm80211/util/bcmutils.c
浏览文件 @ 26bcc181
...@@ -76,7 +76,7 @@ void BCMFASTPATH pkt_buf_free_skb(struct osl_info *osh, ...@@ -76,7 +76,7 @@ void BCMFASTPATH pkt_buf_free_skb(struct osl_info *osh,
} }
/* copy a buffer into a pkt buffer chain */ /* copy a buffer into a pkt buffer chain */
uint pktfrombuf(struct osl_info *osh, struct sk_buff *p, uint offset, int len, uint pktfrombuf(struct sk_buff *p, uint offset, int len,
unsigned char *buf) unsigned char *buf)
{ {
uint n, ret = 0; uint n, ret = 0;
...@@ -453,7 +453,7 @@ int getintvar(char *vars, const char *name) ...@@ -453,7 +453,7 @@ int getintvar(char *vars, const char *name)
#if defined(BCMDBG) #if defined(BCMDBG)
/* pretty hex print a pkt buffer chain */ /* pretty hex print a pkt buffer chain */
void prpkt(const char *msg, struct osl_info *osh, struct sk_buff *p0) void prpkt(const char *msg, struct sk_buff *p0)
{ {
struct sk_buff *p; struct sk_buff *p;
......
drivers/staging/brcm80211/util/hnddma.c
浏览文件 @ 26bcc181
...@@ -228,7 +228,7 @@ static void dma64_txreclaim(dma_info_t *di, txd_range_t range); ...@@ -228,7 +228,7 @@ static void dma64_txreclaim(dma_info_t *di, txd_range_t range);
static bool dma64_txstopped(dma_info_t *di); static bool dma64_txstopped(dma_info_t *di);
static bool dma64_rxstopped(dma_info_t *di); static bool dma64_rxstopped(dma_info_t *di);
static bool dma64_rxenabled(dma_info_t *di); static bool dma64_rxenabled(dma_info_t *di);
static bool _dma64_addrext(struct osl_info *osh, dma64regs_t *dma64regs); static bool _dma64_addrext(dma64regs_t *dma64regs);
static inline u32 parity32(u32 data); static inline u32 parity32(u32 data);
...@@ -610,14 +610,14 @@ static bool _dma_isaddrext(dma_info_t *di) ...@@ -610,14 +610,14 @@ static bool _dma_isaddrext(dma_info_t *di)
/* not all tx or rx channel are available */ /* not all tx or rx channel are available */
if (di->d64txregs != NULL) { if (di->d64txregs != NULL) {
if (!_dma64_addrext(di->osh, di->d64txregs)) { if (!_dma64_addrext(di->d64txregs)) {
DMA_ERROR(("%s: _dma_isaddrext: DMA64 tx doesn't have " DMA_ERROR(("%s: _dma_isaddrext: DMA64 tx doesn't have "
"AE set\n", di->name)); "AE set\n", di->name));
ASSERT(0); ASSERT(0);
} }
return true; return true;
} else if (di->d64rxregs != NULL) { } else if (di->d64rxregs != NULL) {
if (!_dma64_addrext(di->osh, di->d64rxregs)) { if (!_dma64_addrext(di->d64rxregs)) {
DMA_ERROR(("%s: _dma_isaddrext: DMA64 rx doesn't have " DMA_ERROR(("%s: _dma_isaddrext: DMA64 rx doesn't have "
"AE set\n", di->name)); "AE set\n", di->name));
ASSERT(0); ASSERT(0);
...@@ -1702,7 +1702,7 @@ static void *BCMFASTPATH dma64_getnextrxp(dma_info_t *di, bool forceall) ...@@ -1702,7 +1702,7 @@ static void *BCMFASTPATH dma64_getnextrxp(dma_info_t *di, bool forceall)
return rxp; return rxp;
} }
static bool _dma64_addrext(struct osl_info *osh, dma64regs_t * dma64regs) static bool _dma64_addrext(dma64regs_t *dma64regs)
{ {
u32 w; u32 w;
OR_REG(&dma64regs->control, D64_XC_AE); OR_REG(&dma64regs->control, D64_XC_AE);
...@@ -1792,10 +1792,6 @@ static void dma64_txrotate(dma_info_t *di) ...@@ -1792,10 +1792,6 @@ static void dma64_txrotate(dma_info_t *di)
uint dma_addrwidth(si_t *sih, void *dmaregs) uint dma_addrwidth(si_t *sih, void *dmaregs)
{ {
struct osl_info *osh;
osh = si_osh(sih);
/* Perform 64-bit checks only if we want to advertise 64-bit (> 32bit) capability) */ /* Perform 64-bit checks only if we want to advertise 64-bit (> 32bit) capability) */
/* DMA engine is 64-bit capable */ /* DMA engine is 64-bit capable */
if ((si_core_sflags(sih, 0, 0) & SISF_DMA64) == SISF_DMA64) { if ((si_core_sflags(sih, 0, 0) & SISF_DMA64) == SISF_DMA64) {
......
drivers/staging/brcm80211/util/hndpmu.c
浏览文件 @ 26bcc181
...@@ -46,23 +46,20 @@ ...@@ -46,23 +46,20 @@
#define PMU_NONE(args) #define PMU_NONE(args)
/* PLL controls/clocks */ /* PLL controls/clocks */
static void si_pmu1_pllinit0(si_t *sih, struct osl_info *osh, chipcregs_t *cc, static void si_pmu1_pllinit0(si_t *sih, chipcregs_t *cc, u32 xtal);
u32 xtal); static u32 si_pmu1_cpuclk0(si_t *sih, chipcregs_t *cc);
static u32 si_pmu1_cpuclk0(si_t *sih, struct osl_info *osh, chipcregs_t *cc); static u32 si_pmu1_alpclk0(si_t *sih, chipcregs_t *cc);
static u32 si_pmu1_alpclk0(si_t *sih, struct osl_info *osh, chipcregs_t *cc);
/* PMU resources */ /* PMU resources */
static bool si_pmu_res_depfltr_bb(si_t *sih); static bool si_pmu_res_depfltr_bb(si_t *sih);
static bool si_pmu_res_depfltr_ncb(si_t *sih); static bool si_pmu_res_depfltr_ncb(si_t *sih);
static bool si_pmu_res_depfltr_paldo(si_t *sih); static bool si_pmu_res_depfltr_paldo(si_t *sih);
static bool si_pmu_res_depfltr_npaldo(si_t *sih); static bool si_pmu_res_depfltr_npaldo(si_t *sih);
static u32 si_pmu_res_deps(si_t *sih, struct osl_info *osh, chipcregs_t *cc, static u32 si_pmu_res_deps(si_t *sih, chipcregs_t *cc, u32 rsrcs, bool all);
u32 rsrcs, bool all); static uint si_pmu_res_uptime(si_t *sih, chipcregs_t *cc, u8 rsrc);
static uint si_pmu_res_uptime(si_t *sih, struct osl_info *osh, chipcregs_t *cc,
u8 rsrc);
static void si_pmu_res_masks(si_t *sih, u32 * pmin, u32 * pmax); static void si_pmu_res_masks(si_t *sih, u32 * pmin, u32 * pmax);
static void si_pmu_spuravoid_pllupdate(si_t *sih, chipcregs_t *cc, static void si_pmu_spuravoid_pllupdate(si_t *sih, chipcregs_t *cc,
struct osl_info *osh, u8 spuravoid); u8 spuravoid);
static void si_pmu_set_4330_plldivs(si_t *sih); static void si_pmu_set_4330_plldivs(si_t *sih);
...@@ -107,8 +104,7 @@ void si_pmu_pllupd(si_t *sih) ...@@ -107,8 +104,7 @@ void si_pmu_pllupd(si_t *sih)
} }
/* Setup switcher voltage */ /* Setup switcher voltage */
void si_pmu_set_switcher_voltage(si_t *sih, struct osl_info *osh, u8 bb_voltage, void si_pmu_set_switcher_voltage(si_t *sih, u8 bb_voltage, u8 rf_voltage)
u8 rf_voltage)
{ {
chipcregs_t *cc; chipcregs_t *cc;
uint origidx; uint origidx;
...@@ -130,7 +126,7 @@ void si_pmu_set_switcher_voltage(si_t *sih, struct osl_info *osh, u8 bb_voltage, ...@@ -130,7 +126,7 @@ void si_pmu_set_switcher_voltage(si_t *sih, struct osl_info *osh, u8 bb_voltage,
si_setcoreidx(sih, origidx); si_setcoreidx(sih, origidx);
} }
void si_pmu_set_ldo_voltage(si_t *sih, struct osl_info *osh, u8 ldo, u8 voltage) void si_pmu_set_ldo_voltage(si_t *sih, u8 ldo, u8 voltage)
{ {
u8 sr_cntl_shift = 0, rc_shift = 0, shift = 0, mask = 0; u8 sr_cntl_shift = 0, rc_shift = 0, shift = 0, mask = 0;
u8 addr = 0; u8 addr = 0;
...@@ -188,7 +184,7 @@ void si_pmu_set_ldo_voltage(si_t *sih, struct osl_info *osh, u8 ldo, u8 voltage) ...@@ -188,7 +184,7 @@ void si_pmu_set_ldo_voltage(si_t *sih, struct osl_info *osh, u8 ldo, u8 voltage)
/* d11 slow to fast clock transition time in slow clock cycles */ /* d11 slow to fast clock transition time in slow clock cycles */
#define D11SCC_SLOW2FAST_TRANSITION 2 #define D11SCC_SLOW2FAST_TRANSITION 2
u16 si_pmu_fast_pwrup_delay(si_t *sih, struct osl_info *osh) u16 si_pmu_fast_pwrup_delay(si_t *sih)
{ {
uint delay = PMU_MAX_TRANSITION_DLY; uint delay = PMU_MAX_TRANSITION_DLY;
chipcregs_t *cc; chipcregs_t *cc;
...@@ -223,7 +219,7 @@ u16 si_pmu_fast_pwrup_delay(si_t *sih, struct osl_info *osh) ...@@ -223,7 +219,7 @@ u16 si_pmu_fast_pwrup_delay(si_t *sih, struct osl_info *osh)
else { else {
u32 ilp = si_ilp_clock(sih); u32 ilp = si_ilp_clock(sih);
delay = delay =
(si_pmu_res_uptime(sih, osh, cc, RES4329_HT_AVAIL) + (si_pmu_res_uptime(sih, cc, RES4329_HT_AVAIL) +
D11SCC_SLOW2FAST_TRANSITION) * ((1000000 + ilp - D11SCC_SLOW2FAST_TRANSITION) * ((1000000 + ilp -
1) / ilp); 1) / ilp);
delay = (11 * delay) / 10; delay = (11 * delay) / 10;
...@@ -238,7 +234,7 @@ u16 si_pmu_fast_pwrup_delay(si_t *sih, struct osl_info *osh) ...@@ -238,7 +234,7 @@ u16 si_pmu_fast_pwrup_delay(si_t *sih, struct osl_info *osh)
else { else {
u32 ilp = si_ilp_clock(sih); u32 ilp = si_ilp_clock(sih);
delay = delay =
(si_pmu_res_uptime(sih, osh, cc, RES4336_HT_AVAIL) + (si_pmu_res_uptime(sih, cc, RES4336_HT_AVAIL) +
D11SCC_SLOW2FAST_TRANSITION) * ((1000000 + ilp - D11SCC_SLOW2FAST_TRANSITION) * ((1000000 + ilp -
1) / ilp); 1) / ilp);
delay = (11 * delay) / 10; delay = (11 * delay) / 10;
...@@ -250,7 +246,7 @@ u16 si_pmu_fast_pwrup_delay(si_t *sih, struct osl_info *osh) ...@@ -250,7 +246,7 @@ u16 si_pmu_fast_pwrup_delay(si_t *sih, struct osl_info *osh)
else { else {
u32 ilp = si_ilp_clock(sih); u32 ilp = si_ilp_clock(sih);
delay = delay =
(si_pmu_res_uptime(sih, osh, cc, RES4330_HT_AVAIL) + (si_pmu_res_uptime(sih, cc, RES4330_HT_AVAIL) +
D11SCC_SLOW2FAST_TRANSITION) * ((1000000 + ilp - D11SCC_SLOW2FAST_TRANSITION) * ((1000000 + ilp -
1) / ilp); 1) / ilp);
delay = (11 * delay) / 10; delay = (11 * delay) / 10;
...@@ -265,7 +261,7 @@ u16 si_pmu_fast_pwrup_delay(si_t *sih, struct osl_info *osh) ...@@ -265,7 +261,7 @@ u16 si_pmu_fast_pwrup_delay(si_t *sih, struct osl_info *osh)
return (u16) delay; return (u16) delay;
} }
u32 si_pmu_force_ilp(si_t *sih, struct osl_info *osh, bool force) u32 si_pmu_force_ilp(si_t *sih, bool force)
{ {
chipcregs_t *cc; chipcregs_t *cc;
uint origidx; uint origidx;
...@@ -683,7 +679,7 @@ static void si_pmu_res_masks(si_t *sih, u32 * pmin, u32 * pmax) ...@@ -683,7 +679,7 @@ static void si_pmu_res_masks(si_t *sih, u32 * pmin, u32 * pmax)
} }
/* initialize PMU resources */ /* initialize PMU resources */
void si_pmu_res_init(si_t *sih, struct osl_info *osh) void si_pmu_res_init(si_t *sih)
{ {
chipcregs_t *cc; chipcregs_t *cc;
uint origidx; uint origidx;
...@@ -1184,7 +1180,7 @@ static u32 si_pmu1_pllfvco0(si_t *sih) ...@@ -1184,7 +1180,7 @@ static u32 si_pmu1_pllfvco0(si_t *sih)
/* query alp/xtal clock frequency */ /* query alp/xtal clock frequency */
static u32 static u32
si_pmu1_alpclk0(si_t *sih, struct osl_info *osh, chipcregs_t *cc) si_pmu1_alpclk0(si_t *sih, chipcregs_t *cc)
{ {
const pmu1_xtaltab0_t *xt; const pmu1_xtaltab0_t *xt;
u32 xf; u32 xf;
...@@ -1209,8 +1205,7 @@ si_pmu1_alpclk0(si_t *sih, struct osl_info *osh, chipcregs_t *cc) ...@@ -1209,8 +1205,7 @@ si_pmu1_alpclk0(si_t *sih, struct osl_info *osh, chipcregs_t *cc)
* case the xtal frequency is unknown to the s/w so we need to call * case the xtal frequency is unknown to the s/w so we need to call
* si_pmu1_xtaldef0() wherever it is needed to return a default value. * si_pmu1_xtaldef0() wherever it is needed to return a default value.
*/ */
static void si_pmu1_pllinit0(si_t *sih, struct osl_info *osh, chipcregs_t *cc, static void si_pmu1_pllinit0(si_t *sih, chipcregs_t *cc, u32 xtal)
u32 xtal)
{ {
const pmu1_xtaltab0_t *xt; const pmu1_xtaltab0_t *xt;
u32 tmp; u32 tmp;
...@@ -1452,7 +1447,7 @@ static void si_pmu1_pllinit0(si_t *sih, struct osl_info *osh, chipcregs_t *cc, ...@@ -1452,7 +1447,7 @@ static void si_pmu1_pllinit0(si_t *sih, struct osl_info *osh, chipcregs_t *cc,
/* query the CPU clock frequency */ /* query the CPU clock frequency */
static u32 static u32
si_pmu1_cpuclk0(si_t *sih, struct osl_info *osh, chipcregs_t *cc) si_pmu1_cpuclk0(si_t *sih, chipcregs_t *cc)
{ {
u32 tmp, m1div; u32 tmp, m1div;
#ifdef BCMDBG #ifdef BCMDBG
...@@ -1485,7 +1480,7 @@ si_pmu1_cpuclk0(si_t *sih, struct osl_info *osh, chipcregs_t *cc) ...@@ -1485,7 +1480,7 @@ si_pmu1_cpuclk0(si_t *sih, struct osl_info *osh, chipcregs_t *cc)
(tmp & PMU1_PLL0_PC3_NDIV_FRAC_MASK) >> (tmp & PMU1_PLL0_PC3_NDIV_FRAC_MASK) >>
PMU1_PLL0_PC3_NDIV_FRAC_SHIFT; PMU1_PLL0_PC3_NDIV_FRAC_SHIFT;
fref = si_pmu1_alpclk0(sih, osh, cc) / 1000; fref = si_pmu1_alpclk0(sih, cc) / 1000;
fvco = (fref * ndiv_int) << 8; fvco = (fref * ndiv_int) << 8;
fvco += (fref * (ndiv_frac >> 12)) >> 4; fvco += (fref * (ndiv_frac >> 12)) >> 4;
...@@ -1506,7 +1501,7 @@ si_pmu1_cpuclk0(si_t *sih, struct osl_info *osh, chipcregs_t *cc) ...@@ -1506,7 +1501,7 @@ si_pmu1_cpuclk0(si_t *sih, struct osl_info *osh, chipcregs_t *cc)
} }
/* initialize PLL */ /* initialize PLL */
void si_pmu_pll_init(si_t *sih, struct osl_info *osh, uint xtalfreq) void si_pmu_pll_init(si_t *sih, uint xtalfreq)
{ {
chipcregs_t *cc; chipcregs_t *cc;
uint origidx; uint origidx;
...@@ -1525,7 +1520,7 @@ void si_pmu_pll_init(si_t *sih, struct osl_info *osh, uint xtalfreq) ...@@ -1525,7 +1520,7 @@ void si_pmu_pll_init(si_t *sih, struct osl_info *osh, uint xtalfreq)
case BCM4329_CHIP_ID: case BCM4329_CHIP_ID:
if (xtalfreq == 0) if (xtalfreq == 0)
xtalfreq = 38400; xtalfreq = 38400;
si_pmu1_pllinit0(sih, osh, cc, xtalfreq); si_pmu1_pllinit0(sih, cc, xtalfreq);
break; break;
case BCM4313_CHIP_ID: case BCM4313_CHIP_ID:
case BCM43224_CHIP_ID: case BCM43224_CHIP_ID:
...@@ -1541,7 +1536,7 @@ void si_pmu_pll_init(si_t *sih, struct osl_info *osh, uint xtalfreq) ...@@ -1541,7 +1536,7 @@ void si_pmu_pll_init(si_t *sih, struct osl_info *osh, uint xtalfreq)
case BCM4319_CHIP_ID: case BCM4319_CHIP_ID:
case BCM4336_CHIP_ID: case BCM4336_CHIP_ID:
case BCM4330_CHIP_ID: case BCM4330_CHIP_ID:
si_pmu1_pllinit0(sih, osh, cc, xtalfreq); si_pmu1_pllinit0(sih, cc, xtalfreq);
break; break;
default: default:
PMU_MSG(("No PLL init done for chip %s rev %d pmurev %d\n", PMU_MSG(("No PLL init done for chip %s rev %d pmurev %d\n",
...@@ -1559,7 +1554,7 @@ void si_pmu_pll_init(si_t *sih, struct osl_info *osh, uint xtalfreq) ...@@ -1559,7 +1554,7 @@ void si_pmu_pll_init(si_t *sih, struct osl_info *osh, uint xtalfreq)
} }
/* query alp/xtal clock frequency */ /* query alp/xtal clock frequency */
u32 si_pmu_alp_clock(si_t *sih, struct osl_info *osh) u32 si_pmu_alp_clock(si_t *sih)
{ {
chipcregs_t *cc; chipcregs_t *cc;
uint origidx; uint origidx;
...@@ -1597,7 +1592,7 @@ u32 si_pmu_alp_clock(si_t *sih, struct osl_info *osh) ...@@ -1597,7 +1592,7 @@ u32 si_pmu_alp_clock(si_t *sih, struct osl_info *osh)
case BCM4336_CHIP_ID: case BCM4336_CHIP_ID:
case BCM4330_CHIP_ID: case BCM4330_CHIP_ID:
clock = si_pmu1_alpclk0(sih, osh, cc); clock = si_pmu1_alpclk0(sih, cc);
break; break;
case BCM5356_CHIP_ID: case BCM5356_CHIP_ID:
/* always 25Mhz */ /* always 25Mhz */
...@@ -1620,8 +1615,7 @@ u32 si_pmu_alp_clock(si_t *sih, struct osl_info *osh) ...@@ -1620,8 +1615,7 @@ u32 si_pmu_alp_clock(si_t *sih, struct osl_info *osh)
* pllreg "pll0" i.e. 12 for main 6 for phy, 0 for misc. * pllreg "pll0" i.e. 12 for main 6 for phy, 0 for misc.
*/ */
static u32 static u32
si_pmu5_clock(si_t *sih, struct osl_info *osh, chipcregs_t *cc, uint pll0, si_pmu5_clock(si_t *sih, chipcregs_t *cc, uint pll0, uint m) {
uint m) {
u32 tmp, div, ndiv, p1, p2, fc; u32 tmp, div, ndiv, p1, p2, fc;
if ((pll0 & 3) || (pll0 > PMU4716_MAINPLL_PLL0)) { if ((pll0 & 3) || (pll0 > PMU4716_MAINPLL_PLL0)) {
...@@ -1658,7 +1652,7 @@ si_pmu5_clock(si_t *sih, struct osl_info *osh, chipcregs_t *cc, uint pll0, ...@@ -1658,7 +1652,7 @@ si_pmu5_clock(si_t *sih, struct osl_info *osh, chipcregs_t *cc, uint pll0,
ndiv = (tmp & PMU5_PLL_NDIV_MASK) >> PMU5_PLL_NDIV_SHIFT; ndiv = (tmp & PMU5_PLL_NDIV_MASK) >> PMU5_PLL_NDIV_SHIFT;
/* Do calculation in Mhz */ /* Do calculation in Mhz */
fc = si_pmu_alp_clock(sih, osh) / 1000000; fc = si_pmu_alp_clock(sih) / 1000000;
fc = (p1 * ndiv * fc) / p2; fc = (p1 * ndiv * fc) / p2;
PMU_NONE(("%s: p1=%d, p2=%d, ndiv=%d(0x%x), m%d=%d; fc=%d, clock=%d\n", PMU_NONE(("%s: p1=%d, p2=%d, ndiv=%d(0x%x), m%d=%d; fc=%d, clock=%d\n",
...@@ -1672,7 +1666,7 @@ si_pmu5_clock(si_t *sih, struct osl_info *osh, chipcregs_t *cc, uint pll0, ...@@ -1672,7 +1666,7 @@ si_pmu5_clock(si_t *sih, struct osl_info *osh, chipcregs_t *cc, uint pll0,
/* For designs that feed the same clock to both backplane /* For designs that feed the same clock to both backplane
* and CPU just return the CPU clock speed. * and CPU just return the CPU clock speed.
*/ */
u32 si_pmu_si_clock(si_t *sih, struct osl_info *osh) u32 si_pmu_si_clock(si_t *sih)
{ {
chipcregs_t *cc; chipcregs_t *cc;
uint origidx; uint origidx;
...@@ -1701,19 +1695,19 @@ u32 si_pmu_si_clock(si_t *sih, struct osl_info *osh) ...@@ -1701,19 +1695,19 @@ u32 si_pmu_si_clock(si_t *sih, struct osl_info *osh)
case BCM4748_CHIP_ID: case BCM4748_CHIP_ID:
case BCM47162_CHIP_ID: case BCM47162_CHIP_ID:
clock = clock =
si_pmu5_clock(sih, osh, cc, PMU4716_MAINPLL_PLL0, si_pmu5_clock(sih, cc, PMU4716_MAINPLL_PLL0,
PMU5_MAINPLL_SI); PMU5_MAINPLL_SI);
break; break;
case BCM4329_CHIP_ID: case BCM4329_CHIP_ID:
if (sih->chiprev == 0) if (sih->chiprev == 0)
clock = 38400 * 1000; clock = 38400 * 1000;
else else
clock = si_pmu1_cpuclk0(sih, osh, cc); clock = si_pmu1_cpuclk0(sih, cc);
break; break;
case BCM4319_CHIP_ID: case BCM4319_CHIP_ID:
case BCM4336_CHIP_ID: case BCM4336_CHIP_ID:
case BCM4330_CHIP_ID: case BCM4330_CHIP_ID:
clock = si_pmu1_cpuclk0(sih, osh, cc); clock = si_pmu1_cpuclk0(sih, cc);
break; break;
case BCM4313_CHIP_ID: case BCM4313_CHIP_ID:
/* 80MHz backplane clock */ /* 80MHz backplane clock */
...@@ -1729,12 +1723,12 @@ u32 si_pmu_si_clock(si_t *sih, struct osl_info *osh) ...@@ -1729,12 +1723,12 @@ u32 si_pmu_si_clock(si_t *sih, struct osl_info *osh)
break; break;
case BCM5356_CHIP_ID: case BCM5356_CHIP_ID:
clock = clock =
si_pmu5_clock(sih, osh, cc, PMU5356_MAINPLL_PLL0, si_pmu5_clock(sih, cc, PMU5356_MAINPLL_PLL0,
PMU5_MAINPLL_SI); PMU5_MAINPLL_SI);
break; break;
case BCM5357_CHIP_ID: case BCM5357_CHIP_ID:
clock = clock =
si_pmu5_clock(sih, osh, cc, PMU5357_MAINPLL_PLL0, si_pmu5_clock(sih, cc, PMU5357_MAINPLL_PLL0,
PMU5_MAINPLL_SI); PMU5_MAINPLL_SI);
break; break;
default: default:
...@@ -1751,7 +1745,7 @@ u32 si_pmu_si_clock(si_t *sih, struct osl_info *osh) ...@@ -1751,7 +1745,7 @@ u32 si_pmu_si_clock(si_t *sih, struct osl_info *osh)
} }
/* query CPU clock frequency */ /* query CPU clock frequency */
u32 si_pmu_cpu_clock(si_t *sih, struct osl_info *osh) u32 si_pmu_cpu_clock(si_t *sih)
{ {
chipcregs_t *cc; chipcregs_t *cc;
uint origidx; uint origidx;
...@@ -1784,18 +1778,18 @@ u32 si_pmu_cpu_clock(si_t *sih, struct osl_info *osh) ...@@ -1784,18 +1778,18 @@ u32 si_pmu_cpu_clock(si_t *sih, struct osl_info *osh)
cc = si_setcoreidx(sih, SI_CC_IDX); cc = si_setcoreidx(sih, SI_CC_IDX);
ASSERT(cc != NULL); ASSERT(cc != NULL);
clock = si_pmu5_clock(sih, osh, cc, pll, PMU5_MAINPLL_CPU); clock = si_pmu5_clock(sih, cc, pll, PMU5_MAINPLL_CPU);
/* Return to original core */ /* Return to original core */
si_setcoreidx(sih, origidx); si_setcoreidx(sih, origidx);
} else } else
clock = si_pmu_si_clock(sih, osh); clock = si_pmu_si_clock(sih);
return clock; return clock;
} }
/* query memory clock frequency */ /* query memory clock frequency */
u32 si_pmu_mem_clock(si_t *sih, struct osl_info *osh) u32 si_pmu_mem_clock(si_t *sih)
{ {
chipcregs_t *cc; chipcregs_t *cc;
uint origidx; uint origidx;
...@@ -1828,12 +1822,12 @@ u32 si_pmu_mem_clock(si_t *sih, struct osl_info *osh) ...@@ -1828,12 +1822,12 @@ u32 si_pmu_mem_clock(si_t *sih, struct osl_info *osh)
cc = si_setcoreidx(sih, SI_CC_IDX); cc = si_setcoreidx(sih, SI_CC_IDX);
ASSERT(cc != NULL); ASSERT(cc != NULL);
clock = si_pmu5_clock(sih, osh, cc, pll, PMU5_MAINPLL_MEM); clock = si_pmu5_clock(sih, cc, pll, PMU5_MAINPLL_MEM);
/* Return to original core */ /* Return to original core */
si_setcoreidx(sih, origidx); si_setcoreidx(sih, origidx);
} else { } else {
clock = si_pmu_si_clock(sih, osh); clock = si_pmu_si_clock(sih);
} }
return clock; return clock;
...@@ -1844,7 +1838,7 @@ u32 si_pmu_mem_clock(si_t *sih, struct osl_info *osh) ...@@ -1844,7 +1838,7 @@ u32 si_pmu_mem_clock(si_t *sih, struct osl_info *osh)
static u32 ilpcycles_per_sec; static u32 ilpcycles_per_sec;
u32 si_pmu_ilp_clock(si_t *sih, struct osl_info *osh) u32 si_pmu_ilp_clock(si_t *sih)
{ {
if (ISSIM_ENAB(sih)) if (ISSIM_ENAB(sih))
return ILP_CLOCK; return ILP_CLOCK;
...@@ -1908,8 +1902,7 @@ static const sdiod_drive_str_t sdiod_drive_strength_tab3[] = { ...@@ -1908,8 +1902,7 @@ static const sdiod_drive_str_t sdiod_drive_strength_tab3[] = {
#define SDIOD_DRVSTR_KEY(chip, pmu) (((chip) << 16) | (pmu)) #define SDIOD_DRVSTR_KEY(chip, pmu) (((chip) << 16) | (pmu))
void void
si_sdiod_drive_strength_init(si_t *sih, struct osl_info *osh, si_sdiod_drive_strength_init(si_t *sih, u32 drivestrength) {
u32 drivestrength) {
chipcregs_t *cc; chipcregs_t *cc;
uint origidx, intr_val = 0; uint origidx, intr_val = 0;
sdiod_drive_str_t *str_tab = NULL; sdiod_drive_str_t *str_tab = NULL;
...@@ -1979,7 +1972,7 @@ si_sdiod_drive_strength_init(si_t *sih, struct osl_info *osh, ...@@ -1979,7 +1972,7 @@ si_sdiod_drive_strength_init(si_t *sih, struct osl_info *osh,
} }
/* initialize PMU */ /* initialize PMU */
void si_pmu_init(si_t *sih, struct osl_info *osh) void si_pmu_init(si_t *sih)
{ {
chipcregs_t *cc; chipcregs_t *cc;
uint origidx; uint origidx;
...@@ -2011,8 +2004,7 @@ void si_pmu_init(si_t *sih, struct osl_info *osh) ...@@ -2011,8 +2004,7 @@ void si_pmu_init(si_t *sih, struct osl_info *osh)
/* Return up time in ILP cycles for the given resource. */ /* Return up time in ILP cycles for the given resource. */
static uint static uint
si_pmu_res_uptime(si_t *sih, struct osl_info *osh, chipcregs_t *cc, si_pmu_res_uptime(si_t *sih, chipcregs_t *cc, u8 rsrc) {
u8 rsrc) {
u32 deps; u32 deps;
uint up, i, dup, dmax; uint up, i, dup, dmax;
u32 min_mask = 0, max_mask = 0; u32 min_mask = 0, max_mask = 0;
...@@ -2022,11 +2014,11 @@ si_pmu_res_uptime(si_t *sih, struct osl_info *osh, chipcregs_t *cc, ...@@ -2022,11 +2014,11 @@ si_pmu_res_uptime(si_t *sih, struct osl_info *osh, chipcregs_t *cc,
up = (R_REG(&cc->res_updn_timer) >> 8) & 0xff; up = (R_REG(&cc->res_updn_timer) >> 8) & 0xff;
/* direct dependancies of resource 'rsrc' */ /* direct dependancies of resource 'rsrc' */
deps = si_pmu_res_deps(sih, osh, cc, PMURES_BIT(rsrc), false); deps = si_pmu_res_deps(sih, cc, PMURES_BIT(rsrc), false);
for (i = 0; i <= PMURES_MAX_RESNUM; i++) { for (i = 0; i <= PMURES_MAX_RESNUM; i++) {
if (!(deps & PMURES_BIT(i))) if (!(deps & PMURES_BIT(i)))
continue; continue;
deps &= ~si_pmu_res_deps(sih, osh, cc, PMURES_BIT(i), true); deps &= ~si_pmu_res_deps(sih, cc, PMURES_BIT(i), true);
} }
si_pmu_res_masks(sih, &min_mask, &max_mask); si_pmu_res_masks(sih, &min_mask, &max_mask);
deps &= ~min_mask; deps &= ~min_mask;
...@@ -2036,7 +2028,7 @@ si_pmu_res_uptime(si_t *sih, struct osl_info *osh, chipcregs_t *cc, ...@@ -2036,7 +2028,7 @@ si_pmu_res_uptime(si_t *sih, struct osl_info *osh, chipcregs_t *cc,
for (i = 0; i <= PMURES_MAX_RESNUM; i++) { for (i = 0; i <= PMURES_MAX_RESNUM; i++) {
if (!(deps & PMURES_BIT(i))) if (!(deps & PMURES_BIT(i)))
continue; continue;
dup = si_pmu_res_uptime(sih, osh, cc, (u8) i); dup = si_pmu_res_uptime(sih, cc, (u8) i);
if (dmax < dup) if (dmax < dup)
dmax = dup; dmax = dup;
} }
...@@ -2048,7 +2040,7 @@ si_pmu_res_uptime(si_t *sih, struct osl_info *osh, chipcregs_t *cc, ...@@ -2048,7 +2040,7 @@ si_pmu_res_uptime(si_t *sih, struct osl_info *osh, chipcregs_t *cc,
/* Return dependancies (direct or all/indirect) for the given resources */ /* Return dependancies (direct or all/indirect) for the given resources */
static u32 static u32
si_pmu_res_deps(si_t *sih, struct osl_info *osh, chipcregs_t *cc, u32 rsrcs, si_pmu_res_deps(si_t *sih, chipcregs_t *cc, u32 rsrcs,
bool all) bool all)
{ {
u32 deps = 0; u32 deps = 0;
...@@ -2063,12 +2055,12 @@ si_pmu_res_deps(si_t *sih, struct osl_info *osh, chipcregs_t *cc, u32 rsrcs, ...@@ -2063,12 +2055,12 @@ si_pmu_res_deps(si_t *sih, struct osl_info *osh, chipcregs_t *cc, u32 rsrcs,
return !all ? deps : (deps return !all ? deps : (deps
? (deps | ? (deps |
si_pmu_res_deps(sih, osh, cc, deps, si_pmu_res_deps(sih, cc, deps,
true)) : 0); true)) : 0);
} }
/* power up/down OTP through PMU resources */ /* power up/down OTP through PMU resources */
void si_pmu_otp_power(si_t *sih, struct osl_info *osh, bool on) void si_pmu_otp_power(si_t *sih, bool on)
{ {
chipcregs_t *cc; chipcregs_t *cc;
uint origidx; uint origidx;
...@@ -2108,7 +2100,7 @@ void si_pmu_otp_power(si_t *sih, struct osl_info *osh, bool on) ...@@ -2108,7 +2100,7 @@ void si_pmu_otp_power(si_t *sih, struct osl_info *osh, bool on)
u32 otps; u32 otps;
/* Figure out the dependancies (exclude min_res_mask) */ /* Figure out the dependancies (exclude min_res_mask) */
u32 deps = si_pmu_res_deps(sih, osh, cc, rsrcs, true); u32 deps = si_pmu_res_deps(sih, cc, rsrcs, true);
u32 min_mask = 0, max_mask = 0; u32 min_mask = 0, max_mask = 0;
si_pmu_res_masks(sih, &min_mask, &max_mask); si_pmu_res_masks(sih, &min_mask, &max_mask);
deps &= ~min_mask; deps &= ~min_mask;
...@@ -2138,7 +2130,7 @@ void si_pmu_otp_power(si_t *sih, struct osl_info *osh, bool on) ...@@ -2138,7 +2130,7 @@ void si_pmu_otp_power(si_t *sih, struct osl_info *osh, bool on)
si_setcoreidx(sih, origidx); si_setcoreidx(sih, origidx);
} }
void si_pmu_rcal(si_t *sih, struct osl_info *osh) void si_pmu_rcal(si_t *sih)
{ {
chipcregs_t *cc; chipcregs_t *cc;
uint origidx; uint origidx;
...@@ -2217,7 +2209,7 @@ void si_pmu_rcal(si_t *sih, struct osl_info *osh) ...@@ -2217,7 +2209,7 @@ void si_pmu_rcal(si_t *sih, struct osl_info *osh)
si_setcoreidx(sih, origidx); si_setcoreidx(sih, origidx);
} }
void si_pmu_spuravoid(si_t *sih, struct osl_info *osh, u8 spuravoid) void si_pmu_spuravoid(si_t *sih, u8 spuravoid)
{ {
chipcregs_t *cc; chipcregs_t *cc;
uint origidx, intr_val; uint origidx, intr_val;
...@@ -2240,7 +2232,7 @@ void si_pmu_spuravoid(si_t *sih, struct osl_info *osh, u8 spuravoid) ...@@ -2240,7 +2232,7 @@ void si_pmu_spuravoid(si_t *sih, struct osl_info *osh, u8 spuravoid)
} }
/* update the pll changes */ /* update the pll changes */
si_pmu_spuravoid_pllupdate(sih, cc, osh, spuravoid); si_pmu_spuravoid_pllupdate(sih, cc, spuravoid);
/* enable HT back on */ /* enable HT back on */
if (sih->chip == BCM4336_CHIP_ID) { if (sih->chip == BCM4336_CHIP_ID) {
...@@ -2254,8 +2246,7 @@ void si_pmu_spuravoid(si_t *sih, struct osl_info *osh, u8 spuravoid) ...@@ -2254,8 +2246,7 @@ void si_pmu_spuravoid(si_t *sih, struct osl_info *osh, u8 spuravoid)
} }
static void static void
si_pmu_spuravoid_pllupdate(si_t *sih, chipcregs_t *cc, struct osl_info *osh, si_pmu_spuravoid_pllupdate(si_t *sih, chipcregs_t *cc, u8 spuravoid)
u8 spuravoid)
{ {
u32 tmp = 0; u32 tmp = 0;
u8 phypll_offset = 0; u8 phypll_offset = 0;
...@@ -2450,7 +2441,7 @@ si_pmu_spuravoid_pllupdate(si_t *sih, chipcregs_t *cc, struct osl_info *osh, ...@@ -2450,7 +2441,7 @@ si_pmu_spuravoid_pllupdate(si_t *sih, chipcregs_t *cc, struct osl_info *osh,
W_REG(&cc->pmucontrol, tmp); W_REG(&cc->pmucontrol, tmp);
} }
bool si_pmu_is_otp_powered(si_t *sih, struct osl_info *osh) bool si_pmu_is_otp_powered(si_t *sih)
{ {
uint idx; uint idx;
chipcregs_t *cc; chipcregs_t *cc;
...@@ -2500,7 +2491,7 @@ bool si_pmu_is_otp_powered(si_t *sih, struct osl_info *osh) ...@@ -2500,7 +2491,7 @@ bool si_pmu_is_otp_powered(si_t *sih, struct osl_info *osh)
return st; return st;
} }
void si_pmu_sprom_enable(si_t *sih, struct osl_info *osh, bool enable) void si_pmu_sprom_enable(si_t *sih, bool enable)
{ {
chipcregs_t *cc; chipcregs_t *cc;
uint origidx; uint origidx;
...@@ -2515,7 +2506,7 @@ void si_pmu_sprom_enable(si_t *sih, struct osl_info *osh, bool enable) ...@@ -2515,7 +2506,7 @@ void si_pmu_sprom_enable(si_t *sih, struct osl_info *osh, bool enable)
} }
/* initialize PMU chip controls and other chip level stuff */ /* initialize PMU chip controls and other chip level stuff */
void si_pmu_chip_init(si_t *sih, struct osl_info *osh) void si_pmu_chip_init(si_t *sih)
{ {
uint origidx; uint origidx;
...@@ -2527,7 +2518,7 @@ void si_pmu_chip_init(si_t *sih, struct osl_info *osh) ...@@ -2527,7 +2518,7 @@ void si_pmu_chip_init(si_t *sih, struct osl_info *osh)
#endif /* CHIPC_UART_ALWAYS_ON */ #endif /* CHIPC_UART_ALWAYS_ON */
/* Gate off SPROM clock and chip select signals */ /* Gate off SPROM clock and chip select signals */
si_pmu_sprom_enable(sih, osh, false); si_pmu_sprom_enable(sih, false);
/* Remember original core */ /* Remember original core */
origidx = si_coreidx(sih); origidx = si_coreidx(sih);
...@@ -2537,26 +2528,26 @@ void si_pmu_chip_init(si_t *sih, struct osl_info *osh) ...@@ -2537,26 +2528,26 @@ void si_pmu_chip_init(si_t *sih, struct osl_info *osh)
} }
/* initialize PMU switch/regulators */ /* initialize PMU switch/regulators */
void si_pmu_swreg_init(si_t *sih, struct osl_info *osh) void si_pmu_swreg_init(si_t *sih)
{ {
ASSERT(sih->cccaps & CC_CAP_PMU); ASSERT(sih->cccaps & CC_CAP_PMU);
switch (sih->chip) { switch (sih->chip) {
case BCM4336_CHIP_ID: case BCM4336_CHIP_ID:
/* Reduce CLDO PWM output voltage to 1.2V */ /* Reduce CLDO PWM output voltage to 1.2V */
si_pmu_set_ldo_voltage(sih, osh, SET_LDO_VOLTAGE_CLDO_PWM, 0xe); si_pmu_set_ldo_voltage(sih, SET_LDO_VOLTAGE_CLDO_PWM, 0xe);
/* Reduce CLDO BURST output voltage to 1.2V */ /* Reduce CLDO BURST output voltage to 1.2V */
si_pmu_set_ldo_voltage(sih, osh, SET_LDO_VOLTAGE_CLDO_BURST, si_pmu_set_ldo_voltage(sih, SET_LDO_VOLTAGE_CLDO_BURST,
0xe); 0xe);
/* Reduce LNLDO1 output voltage to 1.2V */ /* Reduce LNLDO1 output voltage to 1.2V */
si_pmu_set_ldo_voltage(sih, osh, SET_LDO_VOLTAGE_LNLDO1, 0xe); si_pmu_set_ldo_voltage(sih, SET_LDO_VOLTAGE_LNLDO1, 0xe);
if (sih->chiprev == 0) if (sih->chiprev == 0)
si_pmu_regcontrol(sih, 2, 0x400000, 0x400000); si_pmu_regcontrol(sih, 2, 0x400000, 0x400000);
break; break;
case BCM4330_CHIP_ID: case BCM4330_CHIP_ID:
/* CBUCK Voltage is 1.8 by default and set that to 1.5 */ /* CBUCK Voltage is 1.8 by default and set that to 1.5 */
si_pmu_set_ldo_voltage(sih, osh, SET_LDO_VOLTAGE_CBUCK_PWM, 0); si_pmu_set_ldo_voltage(sih, SET_LDO_VOLTAGE_CBUCK_PWM, 0);
break; break;
default: default:
break; break;
...@@ -2581,8 +2572,7 @@ void si_pmu_radio_enable(si_t *sih, bool enable) ...@@ -2581,8 +2572,7 @@ void si_pmu_radio_enable(si_t *sih, bool enable)
/* Wait for a particular clock level to be on the backplane */ /* Wait for a particular clock level to be on the backplane */
u32 u32
si_pmu_waitforclk_on_backplane(si_t *sih, struct osl_info *osh, u32 clk, si_pmu_waitforclk_on_backplane(si_t *sih, u32 clk, u32 delay)
u32 delay)
{ {
chipcregs_t *cc; chipcregs_t *cc;
uint origidx; uint origidx;
...@@ -2610,7 +2600,7 @@ si_pmu_waitforclk_on_backplane(si_t *sih, struct osl_info *osh, u32 clk, ...@@ -2610,7 +2600,7 @@ si_pmu_waitforclk_on_backplane(si_t *sih, struct osl_info *osh, u32 clk,
#define EXT_ILP_HZ 32768 #define EXT_ILP_HZ 32768
u32 si_pmu_measure_alpclk(si_t *sih, struct osl_info *osh) u32 si_pmu_measure_alpclk(si_t *sih)
{ {
chipcregs_t *cc; chipcregs_t *cc;
uint origidx; uint origidx;
......
drivers/staging/brcm80211/util/nicpci.c
浏览文件 @ 26bcc181
...@@ -37,7 +37,6 @@ typedef struct { ...@@ -37,7 +37,6 @@ typedef struct {
si_t *sih; /* System interconnect handle */ si_t *sih; /* System interconnect handle */
struct pci_dev *dev; struct pci_dev *dev;
struct osl_info *osh; /* OSL handle */
u8 pciecap_lcreg_offset; /* PCIE capability LCreg offset in the config space */ u8 pciecap_lcreg_offset; /* PCIE capability LCreg offset in the config space */
bool pcie_pr42767; bool pcie_pr42767;
u8 pcie_polarity; u8 pcie_polarity;
...@@ -81,7 +80,7 @@ static bool pcicore_pmecap(pcicore_info_t *pi); ...@@ -81,7 +80,7 @@ static bool pcicore_pmecap(pcicore_info_t *pi);
/* Initialize the PCI core. It's caller's responsibility to make sure that this is done /* Initialize the PCI core. It's caller's responsibility to make sure that this is done
* only once * only once
*/ */
void *pcicore_init(si_t *sih, struct osl_info *osh, void *regs) void *pcicore_init(si_t *sih, void *pdev, void *regs)
{ {
pcicore_info_t *pi; pcicore_info_t *pi;
...@@ -95,8 +94,7 @@ void *pcicore_init(si_t *sih, struct osl_info *osh, void *regs) ...@@ -95,8 +94,7 @@ void *pcicore_init(si_t *sih, struct osl_info *osh, void *regs)
} }
pi->sih = sih; pi->sih = sih;
pi->osh = osh; pi->dev = pdev;
pi->dev = osh->pdev;
if (sih->buscoretype == PCIE_CORE_ID) { if (sih->buscoretype == PCIE_CORE_ID) {
u8 cap_ptr; u8 cap_ptr;
...@@ -185,7 +183,7 @@ pcicore_find_pci_capability(void *dev, u8 req_cap_id, ...@@ -185,7 +183,7 @@ pcicore_find_pci_capability(void *dev, u8 req_cap_id,
/* ***** Register Access API */ /* ***** Register Access API */
uint uint
pcie_readreg(struct osl_info *osh, sbpcieregs_t *pcieregs, uint addrtype, pcie_readreg(sbpcieregs_t *pcieregs, uint addrtype,
uint offset) uint offset)
{ {
uint retval = 0xFFFFFFFF; uint retval = 0xFFFFFFFF;
...@@ -212,7 +210,7 @@ pcie_readreg(struct osl_info *osh, sbpcieregs_t *pcieregs, uint addrtype, ...@@ -212,7 +210,7 @@ pcie_readreg(struct osl_info *osh, sbpcieregs_t *pcieregs, uint addrtype,
} }
uint uint
pcie_writereg(struct osl_info *osh, sbpcieregs_t *pcieregs, uint addrtype, pcie_writereg(sbpcieregs_t *pcieregs, uint addrtype,
uint offset, uint val) uint offset, uint val)
{ {
ASSERT(pcieregs != NULL); ASSERT(pcieregs != NULL);
...@@ -369,19 +367,18 @@ static void pcie_extendL1timer(pcicore_info_t *pi, bool extend) ...@@ -369,19 +367,18 @@ static void pcie_extendL1timer(pcicore_info_t *pi, bool extend)
{ {
u32 w; u32 w;
si_t *sih = pi->sih; si_t *sih = pi->sih;
struct osl_info *osh = pi->osh;
sbpcieregs_t *pcieregs = pi->regs.pcieregs; sbpcieregs_t *pcieregs = pi->regs.pcieregs;
if (!PCIE_PUB(sih) || sih->buscorerev < 7) if (!PCIE_PUB(sih) || sih->buscorerev < 7)
return; return;
w = pcie_readreg(osh, pcieregs, PCIE_PCIEREGS, PCIE_DLLP_PMTHRESHREG); w = pcie_readreg(pcieregs, PCIE_PCIEREGS, PCIE_DLLP_PMTHRESHREG);
if (extend) if (extend)
w |= PCIE_ASPMTIMER_EXTEND; w |= PCIE_ASPMTIMER_EXTEND;
else else
w &= ~PCIE_ASPMTIMER_EXTEND; w &= ~PCIE_ASPMTIMER_EXTEND;
pcie_writereg(osh, pcieregs, PCIE_PCIEREGS, PCIE_DLLP_PMTHRESHREG, w); pcie_writereg(pcieregs, PCIE_PCIEREGS, PCIE_DLLP_PMTHRESHREG, w);
w = pcie_readreg(osh, pcieregs, PCIE_PCIEREGS, PCIE_DLLP_PMTHRESHREG); w = pcie_readreg(pcieregs, PCIE_PCIEREGS, PCIE_DLLP_PMTHRESHREG);
} }
/* centralized clkreq control policy */ /* centralized clkreq control policy */
...@@ -434,7 +431,7 @@ static void pcie_war_polarity(pcicore_info_t *pi) ...@@ -434,7 +431,7 @@ static void pcie_war_polarity(pcicore_info_t *pi)
if (pi->pcie_polarity != 0) if (pi->pcie_polarity != 0)
return; return;
w = pcie_readreg(pi->osh, pi->regs.pcieregs, PCIE_PCIEREGS, w = pcie_readreg(pi->regs.pcieregs, PCIE_PCIEREGS,
PCIE_PLP_STATUSREG); PCIE_PLP_STATUSREG);
/* Detect the current polarity at attach and force that polarity and /* Detect the current polarity at attach and force that polarity and
...@@ -553,22 +550,21 @@ static void pcie_war_noplldown(pcicore_info_t *pi) ...@@ -553,22 +550,21 @@ static void pcie_war_noplldown(pcicore_info_t *pi)
static void pcie_war_pci_setup(pcicore_info_t *pi) static void pcie_war_pci_setup(pcicore_info_t *pi)
{ {
si_t *sih = pi->sih; si_t *sih = pi->sih;
struct osl_info *osh = pi->osh;
sbpcieregs_t *pcieregs = pi->regs.pcieregs; sbpcieregs_t *pcieregs = pi->regs.pcieregs;
u32 w; u32 w;
if ((sih->buscorerev == 0) || (sih->buscorerev == 1)) { if ((sih->buscorerev == 0) || (sih->buscorerev == 1)) {
w = pcie_readreg(osh, pcieregs, PCIE_PCIEREGS, w = pcie_readreg(pcieregs, PCIE_PCIEREGS,
PCIE_TLP_WORKAROUNDSREG); PCIE_TLP_WORKAROUNDSREG);
w |= 0x8; w |= 0x8;
pcie_writereg(osh, pcieregs, PCIE_PCIEREGS, pcie_writereg(pcieregs, PCIE_PCIEREGS,
PCIE_TLP_WORKAROUNDSREG, w); PCIE_TLP_WORKAROUNDSREG, w);
} }
if (sih->buscorerev == 1) { if (sih->buscorerev == 1) {
w = pcie_readreg(osh, pcieregs, PCIE_PCIEREGS, PCIE_DLLP_LCREG); w = pcie_readreg(pcieregs, PCIE_PCIEREGS, PCIE_DLLP_LCREG);
w |= (0x40); w |= (0x40);
pcie_writereg(osh, pcieregs, PCIE_PCIEREGS, PCIE_DLLP_LCREG, w); pcie_writereg(pcieregs, PCIE_PCIEREGS, PCIE_DLLP_LCREG, w);
} }
if (sih->buscorerev == 0) { if (sih->buscorerev == 0) {
...@@ -577,11 +573,11 @@ static void pcie_war_pci_setup(pcicore_info_t *pi) ...@@ -577,11 +573,11 @@ static void pcie_war_pci_setup(pcicore_info_t *pi)
pcie_mdiowrite(pi, MDIODATA_DEV_RX, SERDES_RX_CDRBW, 0x1466); pcie_mdiowrite(pi, MDIODATA_DEV_RX, SERDES_RX_CDRBW, 0x1466);
} else if (PCIE_ASPM(sih)) { } else if (PCIE_ASPM(sih)) {
/* Change the L1 threshold for better performance */ /* Change the L1 threshold for better performance */
w = pcie_readreg(osh, pcieregs, PCIE_PCIEREGS, w = pcie_readreg(pcieregs, PCIE_PCIEREGS,
PCIE_DLLP_PMTHRESHREG); PCIE_DLLP_PMTHRESHREG);
w &= ~(PCIE_L1THRESHOLDTIME_MASK); w &= ~(PCIE_L1THRESHOLDTIME_MASK);
w |= (PCIE_L1THRESHOLD_WARVAL << PCIE_L1THRESHOLDTIME_SHIFT); w |= (PCIE_L1THRESHOLD_WARVAL << PCIE_L1THRESHOLDTIME_SHIFT);
pcie_writereg(osh, pcieregs, PCIE_PCIEREGS, pcie_writereg(pcieregs, PCIE_PCIEREGS,
PCIE_DLLP_PMTHRESHREG, w); PCIE_DLLP_PMTHRESHREG, w);
pcie_war_serdes(pi); pcie_war_serdes(pi);
...@@ -818,11 +814,10 @@ pcicore_pciereg(void *pch, u32 offset, u32 mask, u32 val, uint type) ...@@ -818,11 +814,10 @@ pcicore_pciereg(void *pch, u32 offset, u32 mask, u32 val, uint type)
u32 reg_val = 0; u32 reg_val = 0;
pcicore_info_t *pi = (pcicore_info_t *) pch; pcicore_info_t *pi = (pcicore_info_t *) pch;
sbpcieregs_t *pcieregs = pi->regs.pcieregs; sbpcieregs_t *pcieregs = pi->regs.pcieregs;
struct osl_info *osh = pi->osh;
if (mask) { if (mask) {
PCI_ERROR(("PCIEREG: 0x%x writeval 0x%x\n", offset, val)); PCI_ERROR(("PCIEREG: 0x%x writeval 0x%x\n", offset, val));
pcie_writereg(osh, pcieregs, type, offset, val); pcie_writereg(pcieregs, type, offset, val);
} }
/* Should not read register 0x154 */ /* Should not read register 0x154 */
...@@ -830,7 +825,7 @@ pcicore_pciereg(void *pch, u32 offset, u32 mask, u32 val, uint type) ...@@ -830,7 +825,7 @@ pcicore_pciereg(void *pch, u32 offset, u32 mask, u32 val, uint type)
&& type == PCIE_PCIEREGS) && type == PCIE_PCIEREGS)
return reg_val; return reg_val;
reg_val = pcie_readreg(osh, pcieregs, type, offset); reg_val = pcie_readreg(pcieregs, type, offset);
PCI_ERROR(("PCIEREG: 0x%x readval is 0x%x\n", offset, reg_val)); PCI_ERROR(("PCIEREG: 0x%x readval is 0x%x\n", offset, reg_val));
return reg_val; return reg_val;
......
drivers/staging/brcm80211/util/siutils.c
浏览文件 @ 26bcc181
...@@ -55,8 +55,8 @@ ...@@ -55,8 +55,8 @@
#endif #endif
/* local prototypes */ /* local prototypes */
static si_info_t *si_doattach(si_info_t *sii, uint devid, struct osl_info *osh, static si_info_t *si_doattach(si_info_t *sii, uint devid, void *regs,
void *regs, uint bustype, void *sdh, char **vars, uint bustype, void *sdh, char **vars,
uint *varsz); uint *varsz);
static bool si_buscore_prep(si_info_t *sii, uint bustype, uint devid, static bool si_buscore_prep(si_info_t *sii, uint bustype, uint devid,
void *sdh); void *sdh);
...@@ -83,7 +83,7 @@ static u32 si_gpioreservation; ...@@ -83,7 +83,7 @@ static u32 si_gpioreservation;
* vars - pointer to a pointer area for "environment" variables * vars - pointer to a pointer area for "environment" variables
* varsz - pointer to int to return the size of the vars * varsz - pointer to int to return the size of the vars
*/ */
si_t *si_attach(uint devid, struct osl_info *osh, void *regs, uint bustype, si_t *si_attach(uint devid, void *regs, uint bustype,
void *sdh, char **vars, uint *varsz) void *sdh, char **vars, uint *varsz)
{ {
si_info_t *sii; si_info_t *sii;
...@@ -95,7 +95,7 @@ si_t *si_attach(uint devid, struct osl_info *osh, void *regs, uint bustype, ...@@ -95,7 +95,7 @@ si_t *si_attach(uint devid, struct osl_info *osh, void *regs, uint bustype,
return NULL; return NULL;
} }
if (si_doattach(sii, devid, osh, regs, bustype, sdh, vars, varsz) == if (si_doattach(sii, devid, regs, bustype, sdh, vars, varsz) ==
NULL) { NULL) {
kfree(sii); kfree(sii);
return NULL; return NULL;
...@@ -287,7 +287,7 @@ static bool si_buscore_setup(si_info_t *sii, chipcregs_t *cc, uint bustype, ...@@ -287,7 +287,7 @@ static bool si_buscore_setup(si_info_t *sii, chipcregs_t *cc, uint bustype,
if (SI_FAST(sii)) { if (SI_FAST(sii)) {
if (!sii->pch) { if (!sii->pch) {
sii->pch = (void *)pcicore_init( sii->pch = (void *)pcicore_init(
&sii->pub, sii->osh, &sii->pub, sii->pbus,
(void *)PCIEREGS(sii)); (void *)PCIEREGS(sii));
if (sii->pch == NULL) if (sii->pch == NULL)
return false; return false;
...@@ -366,7 +366,7 @@ static __used void si_nvram_process(si_info_t *sii, char *pvars) ...@@ -366,7 +366,7 @@ static __used void si_nvram_process(si_info_t *sii, char *pvars)
/* this is will make Sonics calls directly, since Sonics is no longer supported in the Si abstraction */ /* this is will make Sonics calls directly, since Sonics is no longer supported in the Si abstraction */
/* this has been customized for the bcm 4329 ONLY */ /* this has been customized for the bcm 4329 ONLY */
#ifdef BCMSDIO #ifdef BCMSDIO
static si_info_t *si_doattach(si_info_t *sii, uint devid, struct osl_info *osh, static si_info_t *si_doattach(si_info_t *sii, uint devid,
void *regs, uint bustype, void *pbus, void *regs, uint bustype, void *pbus,
char **vars, uint *varsz) char **vars, uint *varsz)
{ {
...@@ -386,7 +386,6 @@ static si_info_t *si_doattach(si_info_t *sii, uint devid, struct osl_info *osh, ...@@ -386,7 +386,6 @@ static si_info_t *si_doattach(si_info_t *sii, uint devid, struct osl_info *osh,
sii->curmap = regs; sii->curmap = regs;
sii->pbus = pbus; sii->pbus = pbus;
sii->osh = osh;
/* find Chipcommon address */ /* find Chipcommon address */
cc = (chipcregs_t *) sii->curmap; cc = (chipcregs_t *) sii->curmap;
...@@ -466,15 +465,15 @@ static si_info_t *si_doattach(si_info_t *sii, uint devid, struct osl_info *osh, ...@@ -466,15 +465,15 @@ static si_info_t *si_doattach(si_info_t *sii, uint devid, struct osl_info *osh,
/* PMU specific initializations */ /* PMU specific initializations */
if (PMUCTL_ENAB(sih)) { if (PMUCTL_ENAB(sih)) {
u32 xtalfreq; u32 xtalfreq;
si_pmu_init(sih, sii->osh); si_pmu_init(sih);
si_pmu_chip_init(sih, sii->osh); si_pmu_chip_init(sih);
xtalfreq = getintvar(pvars, "xtalfreq"); xtalfreq = getintvar(pvars, "xtalfreq");
/* If xtalfreq var not available, try to measure it */ /* If xtalfreq var not available, try to measure it */
if (xtalfreq == 0) if (xtalfreq == 0)
xtalfreq = si_pmu_measure_alpclk(sih, sii->osh); xtalfreq = si_pmu_measure_alpclk(sih);
si_pmu_pll_init(sih, sii->osh, xtalfreq); si_pmu_pll_init(sih, xtalfreq);
si_pmu_res_init(sih, sii->osh); si_pmu_res_init(sih);
si_pmu_swreg_init(sih, sii->osh); si_pmu_swreg_init(sih);
} }
/* setup the GPIO based LED powersave register */ /* setup the GPIO based LED powersave register */
...@@ -496,7 +495,7 @@ static si_info_t *si_doattach(si_info_t *sii, uint devid, struct osl_info *osh, ...@@ -496,7 +495,7 @@ static si_info_t *si_doattach(si_info_t *sii, uint devid, struct osl_info *osh,
} }
#else /* BCMSDIO */ #else /* BCMSDIO */
static si_info_t *si_doattach(si_info_t *sii, uint devid, struct osl_info *osh, static si_info_t *si_doattach(si_info_t *sii, uint devid,
void *regs, uint bustype, void *pbus, void *regs, uint bustype, void *pbus,
char **vars, uint *varsz) char **vars, uint *varsz)
{ {
...@@ -516,7 +515,6 @@ static si_info_t *si_doattach(si_info_t *sii, uint devid, struct osl_info *osh, ...@@ -516,7 +515,6 @@ static si_info_t *si_doattach(si_info_t *sii, uint devid, struct osl_info *osh,
sii->curmap = regs; sii->curmap = regs;
sii->pbus = pbus; sii->pbus = pbus;
sii->osh = osh;
/* check to see if we are a si core mimic'ing a pci core */ /* check to see if we are a si core mimic'ing a pci core */
if (bustype == PCI_BUS) { if (bustype == PCI_BUS) {
...@@ -609,7 +607,7 @@ static si_info_t *si_doattach(si_info_t *sii, uint devid, struct osl_info *osh, ...@@ -609,7 +607,7 @@ static si_info_t *si_doattach(si_info_t *sii, uint devid, struct osl_info *osh,
/* Init nvram from sprom/otp if they exist */ /* Init nvram from sprom/otp if they exist */
if (srom_var_init if (srom_var_init
(&sii->pub, bustype, regs, sii->osh, vars, varsz)) { (&sii->pub, bustype, regs, vars, varsz)) {
SI_ERROR(("si_doattach: srom_var_init failed: bad srom\n")); SI_ERROR(("si_doattach: srom_var_init failed: bad srom\n"));
goto exit; goto exit;
} }
...@@ -625,15 +623,15 @@ static si_info_t *si_doattach(si_info_t *sii, uint devid, struct osl_info *osh, ...@@ -625,15 +623,15 @@ static si_info_t *si_doattach(si_info_t *sii, uint devid, struct osl_info *osh,
/* PMU specific initializations */ /* PMU specific initializations */
if (PMUCTL_ENAB(sih)) { if (PMUCTL_ENAB(sih)) {
u32 xtalfreq; u32 xtalfreq;
si_pmu_init(sih, sii->osh); si_pmu_init(sih);
si_pmu_chip_init(sih, sii->osh); si_pmu_chip_init(sih);
xtalfreq = getintvar(pvars, "xtalfreq"); xtalfreq = getintvar(pvars, "xtalfreq");
/* If xtalfreq var not available, try to measure it */ /* If xtalfreq var not available, try to measure it */
if (xtalfreq == 0) if (xtalfreq == 0)
xtalfreq = si_pmu_measure_alpclk(sih, sii->osh); xtalfreq = si_pmu_measure_alpclk(sih);
si_pmu_pll_init(sih, sii->osh, xtalfreq); si_pmu_pll_init(sih, xtalfreq);
si_pmu_res_init(sih, sii->osh); si_pmu_res_init(sih);
si_pmu_swreg_init(sih, sii->osh); si_pmu_swreg_init(sih);
} }
/* setup the GPIO based LED powersave register */ /* setup the GPIO based LED powersave register */
...@@ -726,14 +724,6 @@ void si_detach(si_t *sih) ...@@ -726,14 +724,6 @@ void si_detach(si_t *sih)
kfree(sii); kfree(sii);
} }
struct osl_info *si_osh(si_t *sih)
{
si_info_t *sii;
sii = SI_INFO(sih);
return sii->osh;
}
/* register driver interrupt disabling and restoring callback functions */ /* register driver interrupt disabling and restoring callback functions */
void void
si_register_intr_callback(si_t *sih, void *intrsoff_fn, void *intrsrestore_fn, si_register_intr_callback(si_t *sih, void *intrsoff_fn, void *intrsrestore_fn,
...@@ -993,7 +983,7 @@ void si_core_reset(si_t *sih, u32 bits, u32 resetbits) ...@@ -993,7 +983,7 @@ void si_core_reset(si_t *sih, u32 bits, u32 resetbits)
u32 si_alp_clock(si_t *sih) u32 si_alp_clock(si_t *sih)
{ {
if (PMUCTL_ENAB(sih)) if (PMUCTL_ENAB(sih))
return si_pmu_alp_clock(sih, si_osh(sih)); return si_pmu_alp_clock(sih);
return ALP_CLOCK; return ALP_CLOCK;
} }
...@@ -1001,7 +991,7 @@ u32 si_alp_clock(si_t *sih) ...@@ -1001,7 +991,7 @@ u32 si_alp_clock(si_t *sih)
u32 si_ilp_clock(si_t *sih) u32 si_ilp_clock(si_t *sih)
{ {
if (PMUCTL_ENAB(sih)) if (PMUCTL_ENAB(sih))
return si_pmu_ilp_clock(sih, si_osh(sih)); return si_pmu_ilp_clock(sih);
return ILP_CLOCK; return ILP_CLOCK;
} }
...@@ -1219,7 +1209,7 @@ u16 si_clkctl_fast_pwrup_delay(si_t *sih) ...@@ -1219,7 +1209,7 @@ u16 si_clkctl_fast_pwrup_delay(si_t *sih)
sii = SI_INFO(sih); sii = SI_INFO(sih);
if (PMUCTL_ENAB(sih)) { if (PMUCTL_ENAB(sih)) {
INTR_OFF(sii, intr_val); INTR_OFF(sii, intr_val);
fpdelay = si_pmu_fast_pwrup_delay(sih, sii->osh); fpdelay = si_pmu_fast_pwrup_delay(sih);
INTR_RESTORE(sii, intr_val); INTR_RESTORE(sii, intr_val);
return fpdelay; return fpdelay;
} }
...@@ -1461,7 +1451,7 @@ int si_devpath(si_t *sih, char *path, int size) ...@@ -1461,7 +1451,7 @@ int si_devpath(si_t *sih, char *path, int size)
slen = snprintf(path, (size_t) size, "sb/%u/", si_coreidx(sih)); slen = snprintf(path, (size_t) size, "sb/%u/", si_coreidx(sih));
break; break;
case PCI_BUS: case PCI_BUS:
ASSERT((SI_INFO(sih))->osh != NULL); ASSERT((SI_INFO(sih))->pbus != NULL);
slen = snprintf(path, (size_t) size, "pci/%u/%u/", slen = snprintf(path, (size_t) size, "pci/%u/%u/",
((struct pci_dev *)((SI_INFO(sih))->pbus))->bus->number, ((struct pci_dev *)((SI_INFO(sih))->pbus))->bus->number,
PCI_SLOT( PCI_SLOT(
...@@ -1927,7 +1917,7 @@ bool si_deviceremoved(si_t *sih) ...@@ -1927,7 +1917,7 @@ bool si_deviceremoved(si_t *sih)
switch (sih->bustype) { switch (sih->bustype) {
case PCI_BUS: case PCI_BUS:
ASSERT(sii->osh != NULL); ASSERT(sii->pbus != NULL);
pci_read_config_dword(sii->pbus, PCI_CFG_VID, &w); pci_read_config_dword(sii->pbus, PCI_CFG_VID, &w);
if ((w & 0xFFFF) != VENDOR_BROADCOM) if ((w & 0xFFFF) != VENDOR_BROADCOM)
return true; return true;
...@@ -2004,14 +1994,14 @@ bool si_is_otp_disabled(si_t *sih) ...@@ -2004,14 +1994,14 @@ bool si_is_otp_disabled(si_t *sih)
bool si_is_otp_powered(si_t *sih) bool si_is_otp_powered(si_t *sih)
{ {
if (PMUCTL_ENAB(sih)) if (PMUCTL_ENAB(sih))
return si_pmu_is_otp_powered(sih, si_osh(sih)); return si_pmu_is_otp_powered(sih);
return true; return true;
} }
void si_otp_power(si_t *sih, bool on) void si_otp_power(si_t *sih, bool on)
{ {
if (PMUCTL_ENAB(sih)) if (PMUCTL_ENAB(sih))
si_pmu_otp_power(sih, si_osh(sih), on); si_pmu_otp_power(sih, on);
udelay(1000); udelay(1000);
} }
Markdown is supported
0% 或 .
You are about to add 0 people to the discussion. Proceed with caution.
先完成此消息的编辑！
想要评论请 注册 或