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    powerpc/fsl-booke: Add B4_QDS board support · af7837c7
    Shaveta Leekha 提交于
    - Add support for B4 board in board file b4_qds.c,
      It is common for B4860, B4420 and B4220QDS as they share same QDS board
    - Add B4QDS support in Kconfig and Makefile
    
    B4860QDS is a high-performance computing evaluation, development and
    test platform supporting the B4860 QorIQ Power Architecture processor,
    with following major features:
    
        - Four dual-threaded e6500 Power Architecture processors
          organized in one cluster-each core runs up to 1.8 GHz
        - Two DDR3/3L controllers for high-speed memory interface each
          runs at up to 1866.67 MHz
        - CoreNet fabric that fully supports coherency using MESI protocol
          between the e6500 cores, SC3900 FVP cores, memories and
          external interfaces.
        - Data Path Acceleration Architecture having FMAN, QMan, BMan,
          SEC 5.3 and RMAN
        - Large internal cache memory with snooping and stashing capabilities
        - Sixteen 10-GHz SerDes lanes that serve:
            - Two SRIO interfaces. Each supports up to 4 lanes and
              a total of up to 8 lanes
            - Up to 8-lanes Common Public Radio Interface (CPRI) controller
              for glue-less antenna connection
            - Two 10-Gbit Ethernet controllers (10GEC)
            - Six 1G/2.5-Gbit Ethernet controllers for network communications
            - PCI Express controller
            - Debug (Aurora)
        - Various system peripherals
    
    B4420 and B4220 have some differences in comparison to B4860 with fewer
    core/clusters(both SC3900 and e6500), fewer DDR controllers,
    fewer serdes lanes, fewer SGMII interfaces and reduced target frequencies.
    
    Key differences between B4860 and B4420:
    B4420 has:
        - Fewer e6500 cores:
            1 cluster with 2 e6500 cores
        - Fewer SC3900 cores/clusters:
            1 cluster with 2 SC3900 cores per cluster
        - Single DDRC @ 1.6GHz
        - 2 X 4 lane serdes
        - 3 SGMII interfaces
        - no sRIO
        - no 10G
    
    Key differences between B4860 and B4220:
    B4220 has:
        - Fewer e6500 cores:
            1 cluster with 1 e6500 core
        - Fewer SC3900 cores/clusters:
            1 cluster with 2 SC3900 cores per cluster
        - Single DDRC @ 1.33GHz
        - 2 X 2 lane serdes
        - 2 SGMII interfaces
        - no sRIO
        - no 10G
    Signed-off-by: NShaveta Leekha <shaveta@freescale.com>
    Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
    af7837c7
b4_qds.c 2.6 KB