eeh.c 26.2 KB
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/*
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 * Copyright IBM Corporation 2001, 2005, 2006
 * Copyright Dave Engebretsen & Todd Inglett 2001
 * Copyright Linas Vepstas 2005, 2006
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 * Copyright 2001-2012 IBM Corporation.
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 *
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 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
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 *
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 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
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 *
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 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
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 *
 * Please address comments and feedback to Linas Vepstas <linas@austin.ibm.com>
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 */

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#include <linux/delay.h>
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#include <linux/sched.h>
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#include <linux/init.h>
#include <linux/list.h>
#include <linux/pci.h>
#include <linux/proc_fs.h>
#include <linux/rbtree.h>
#include <linux/seq_file.h>
#include <linux/spinlock.h>
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#include <linux/export.h>
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#include <linux/of.h>

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#include <linux/atomic.h>
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#include <asm/eeh.h>
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#include <asm/eeh_event.h>
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#include <asm/io.h>
#include <asm/machdep.h>
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#include <asm/ppc-pci.h>
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#include <asm/rtas.h>


/** Overview:
 *  EEH, or "Extended Error Handling" is a PCI bridge technology for
 *  dealing with PCI bus errors that can't be dealt with within the
 *  usual PCI framework, except by check-stopping the CPU.  Systems
 *  that are designed for high-availability/reliability cannot afford
 *  to crash due to a "mere" PCI error, thus the need for EEH.
 *  An EEH-capable bridge operates by converting a detected error
 *  into a "slot freeze", taking the PCI adapter off-line, making
 *  the slot behave, from the OS'es point of view, as if the slot
 *  were "empty": all reads return 0xff's and all writes are silently
 *  ignored.  EEH slot isolation events can be triggered by parity
 *  errors on the address or data busses (e.g. during posted writes),
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 *  which in turn might be caused by low voltage on the bus, dust,
 *  vibration, humidity, radioactivity or plain-old failed hardware.
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 *
 *  Note, however, that one of the leading causes of EEH slot
 *  freeze events are buggy device drivers, buggy device microcode,
 *  or buggy device hardware.  This is because any attempt by the
 *  device to bus-master data to a memory address that is not
 *  assigned to the device will trigger a slot freeze.   (The idea
 *  is to prevent devices-gone-wild from corrupting system memory).
 *  Buggy hardware/drivers will have a miserable time co-existing
 *  with EEH.
 *
 *  Ideally, a PCI device driver, when suspecting that an isolation
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 *  event has occurred (e.g. by reading 0xff's), will then ask EEH
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 *  whether this is the case, and then take appropriate steps to
 *  reset the PCI slot, the PCI device, and then resume operations.
 *  However, until that day,  the checking is done here, with the
 *  eeh_check_failure() routine embedded in the MMIO macros.  If
 *  the slot is found to be isolated, an "EEH Event" is synthesized
 *  and sent out for processing.
 */

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/* If a device driver keeps reading an MMIO register in an interrupt
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 * handler after a slot isolation event, it might be broken.
 * This sets the threshold for how many read attempts we allow
 * before printing an error message.
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 */
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#define EEH_MAX_FAILS	2100000
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/* Time to wait for a PCI slot to report status, in milliseconds */
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#define PCI_BUS_RESET_WAIT_MSEC (60*1000)

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/* Platform dependent EEH operations */
struct eeh_ops *eeh_ops = NULL;

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int eeh_subsystem_enabled;
EXPORT_SYMBOL(eeh_subsystem_enabled);
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/*
 * EEH probe mode support. The intention is to support multiple
 * platforms for EEH. Some platforms like pSeries do PCI emunation
 * based on device tree. However, other platforms like powernv probe
 * PCI devices from hardware. The flag is used to distinguish that.
 * In addition, struct eeh_ops::probe would be invoked for particular
 * OF node or PCI device so that the corresponding PE would be created
 * there.
 */
int eeh_probe_mode;

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/* Global EEH mutex */
DEFINE_MUTEX(eeh_mutex);

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/* Lock to avoid races due to multiple reports of an error */
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static DEFINE_RAW_SPINLOCK(confirm_error_lock);
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/* Buffer for reporting pci register dumps. Its here in BSS, and
 * not dynamically alloced, so that it ends up in RMO where RTAS
 * can access it.
 */
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#define EEH_PCI_REGS_LOG_LEN 4096
static unsigned char pci_regs_buf[EEH_PCI_REGS_LOG_LEN];

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/*
 * The struct is used to maintain the EEH global statistic
 * information. Besides, the EEH global statistics will be
 * exported to user space through procfs
 */
struct eeh_stats {
	u64 no_device;		/* PCI device not found		*/
	u64 no_dn;		/* OF node not found		*/
	u64 no_cfg_addr;	/* Config address not found	*/
	u64 ignored_check;	/* EEH check skipped		*/
	u64 total_mmio_ffs;	/* Total EEH checks		*/
	u64 false_positives;	/* Unnecessary EEH checks	*/
	u64 slot_resets;	/* PE reset			*/
};

static struct eeh_stats eeh_stats;
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#define IS_BRIDGE(class_code) (((class_code)<<16) == PCI_BASE_CLASS_BRIDGE)

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/**
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 * eeh_gather_pci_data - Copy assorted PCI config space registers to buff
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 * @edev: device to report data for
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 * @buf: point to buffer in which to log
 * @len: amount of room in buffer
 *
 * This routine captures assorted PCI configuration space data,
 * and puts them into a buffer for RTAS error logging.
 */
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static size_t eeh_gather_pci_data(struct eeh_dev *edev, char * buf, size_t len)
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{
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	struct device_node *dn = eeh_dev_to_of_node(edev);
	struct pci_dev *dev = eeh_dev_to_pci_dev(edev);
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	u32 cfg;
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	int cap, i;
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	int n = 0;

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	n += scnprintf(buf+n, len-n, "%s\n", dn->full_name);
	printk(KERN_WARNING "EEH: of node=%s\n", dn->full_name);
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	eeh_ops->read_config(dn, PCI_VENDOR_ID, 4, &cfg);
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	n += scnprintf(buf+n, len-n, "dev/vend:%08x\n", cfg);
	printk(KERN_WARNING "EEH: PCI device/vendor: %08x\n", cfg);

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	eeh_ops->read_config(dn, PCI_COMMAND, 4, &cfg);
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	n += scnprintf(buf+n, len-n, "cmd/stat:%x\n", cfg);
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	printk(KERN_WARNING "EEH: PCI cmd/status register: %08x\n", cfg);

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	if (!dev) {
		printk(KERN_WARNING "EEH: no PCI device for this of node\n");
		return n;
	}

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	/* Gather bridge-specific registers */
	if (dev->class >> 16 == PCI_BASE_CLASS_BRIDGE) {
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		eeh_ops->read_config(dn, PCI_SEC_STATUS, 2, &cfg);
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		n += scnprintf(buf+n, len-n, "sec stat:%x\n", cfg);
		printk(KERN_WARNING "EEH: Bridge secondary status: %04x\n", cfg);

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		eeh_ops->read_config(dn, PCI_BRIDGE_CONTROL, 2, &cfg);
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		n += scnprintf(buf+n, len-n, "brdg ctl:%x\n", cfg);
		printk(KERN_WARNING "EEH: Bridge control: %04x\n", cfg);
	}

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	/* Dump out the PCI-X command and status regs */
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	cap = pci_find_capability(dev, PCI_CAP_ID_PCIX);
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	if (cap) {
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		eeh_ops->read_config(dn, cap, 4, &cfg);
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		n += scnprintf(buf+n, len-n, "pcix-cmd:%x\n", cfg);
		printk(KERN_WARNING "EEH: PCI-X cmd: %08x\n", cfg);

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		eeh_ops->read_config(dn, cap+4, 4, &cfg);
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		n += scnprintf(buf+n, len-n, "pcix-stat:%x\n", cfg);
		printk(KERN_WARNING "EEH: PCI-X status: %08x\n", cfg);
	}

	/* If PCI-E capable, dump PCI-E cap 10, and the AER */
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	cap = pci_find_capability(dev, PCI_CAP_ID_EXP);
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	if (cap) {
		n += scnprintf(buf+n, len-n, "pci-e cap10:\n");
		printk(KERN_WARNING
		       "EEH: PCI-E capabilities and status follow:\n");

		for (i=0; i<=8; i++) {
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			eeh_ops->read_config(dn, cap+4*i, 4, &cfg);
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			n += scnprintf(buf+n, len-n, "%02x:%x\n", 4*i, cfg);
			printk(KERN_WARNING "EEH: PCI-E %02x: %08x\n", i, cfg);
		}

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		cap = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_ERR);
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		if (cap) {
			n += scnprintf(buf+n, len-n, "pci-e AER:\n");
			printk(KERN_WARNING
			       "EEH: PCI-E AER capability register set follows:\n");

			for (i=0; i<14; i++) {
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				eeh_ops->read_config(dn, cap+4*i, 4, &cfg);
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				n += scnprintf(buf+n, len-n, "%02x:%x\n", 4*i, cfg);
				printk(KERN_WARNING "EEH: PCI-E AER %02x: %08x\n", i, cfg);
			}
		}
	}
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	return n;
}

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/**
 * eeh_slot_error_detail - Generate combined log including driver log and error log
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 * @pe: EEH PE
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 * @severity: temporary or permanent error log
 *
 * This routine should be called to generate the combined log, which
 * is comprised of driver log and error log. The driver log is figured
 * out from the config space of the corresponding PCI device, while
 * the error log is fetched through platform dependent function call.
 */
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void eeh_slot_error_detail(struct eeh_pe *pe, int severity)
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{
	size_t loglen = 0;
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	struct eeh_dev *edev;
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	eeh_pci_enable(pe, EEH_OPT_THAW_MMIO);
	eeh_ops->configure_bridge(pe);
	eeh_pe_restore_bars(pe);
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	pci_regs_buf[0] = 0;
	eeh_pe_for_each_dev(pe, edev) {
		loglen += eeh_gather_pci_data(edev, pci_regs_buf,
				EEH_PCI_REGS_LOG_LEN);
        }

	eeh_ops->get_log(pe, severity, pci_regs_buf, loglen);
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}

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/**
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 * eeh_token_to_phys - Convert EEH address token to phys address
 * @token: I/O token, should be address in the form 0xA....
 *
 * This routine should be called to convert virtual I/O address
 * to physical one.
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 */
static inline unsigned long eeh_token_to_phys(unsigned long token)
{
	pte_t *ptep;
	unsigned long pa;

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	ptep = find_linux_pte(init_mm.pgd, token);
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	if (!ptep)
		return token;
	pa = pte_pfn(*ptep) << PAGE_SHIFT;

	return pa | (token & (PAGE_SIZE-1));
}

/**
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 * eeh_dev_check_failure - Check if all 1's data is due to EEH slot freeze
 * @edev: eeh device
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 *
 * Check for an EEH failure for the given device node.  Call this
 * routine if the result of a read was all 0xff's and you want to
 * find out if this is due to an EEH slot freeze.  This routine
 * will query firmware for the EEH status.
 *
 * Returns 0 if there has not been an EEH error; otherwise returns
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 * a non-zero value and queues up a slot isolation event notification.
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 *
 * It is safe to call this routine in an interrupt context.
 */
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int eeh_dev_check_failure(struct eeh_dev *edev)
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{
	int ret;
	unsigned long flags;
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	struct device_node *dn;
	struct pci_dev *dev;
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	struct eeh_pe *pe;
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	int rc = 0;
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	const char *location;
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	eeh_stats.total_mmio_ffs++;
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	if (!eeh_subsystem_enabled)
		return 0;

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	if (!edev) {
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		eeh_stats.no_dn++;
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		return 0;
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	}
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	dn = eeh_dev_to_of_node(edev);
	dev = eeh_dev_to_pci_dev(edev);
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	pe = edev->pe;
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	/* Access to IO BARs might get this far and still not want checking. */
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	if (!pe) {
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		eeh_stats.ignored_check++;
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		pr_debug("EEH: Ignored check for %s %s\n",
			eeh_pci_name(dev), dn->full_name);
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		return 0;
	}

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	if (!pe->addr && !pe->config_addr) {
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		eeh_stats.no_cfg_addr++;
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		return 0;
	}

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	/* If we already have a pending isolation event for this
	 * slot, we know it's bad already, we don't need to check.
	 * Do this checking under a lock; as multiple PCI devices
	 * in one slot might report errors simultaneously, and we
	 * only want one error recovery routine running.
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	 */
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	raw_spin_lock_irqsave(&confirm_error_lock, flags);
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	rc = 1;
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	if (pe->state & EEH_PE_ISOLATED) {
		pe->check_count++;
		if (pe->check_count % EEH_MAX_FAILS == 0) {
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			location = of_get_property(dn, "ibm,loc-code", NULL);
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			printk(KERN_ERR "EEH: %d reads ignored for recovering device at "
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				"location=%s driver=%s pci addr=%s\n",
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				pe->check_count, location,
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				eeh_driver_name(dev), eeh_pci_name(dev));
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			printk(KERN_ERR "EEH: Might be infinite loop in %s driver\n",
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				eeh_driver_name(dev));
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			dump_stack();
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		}
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		goto dn_unlock;
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	}

	/*
	 * Now test for an EEH failure.  This is VERY expensive.
	 * Note that the eeh_config_addr may be a parent device
	 * in the case of a device behind a bridge, or it may be
	 * function zero of a multi-function device.
	 * In any case they must share a common PHB.
	 */
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	ret = eeh_ops->get_state(pe, NULL);
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	/* Note that config-io to empty slots may fail;
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	 * they are empty when they don't have children.
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	 * We will punt with the following conditions: Failure to get
	 * PE's state, EEH not support and Permanently unavailable
	 * state, PE is in good state.
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	 */
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	if ((ret < 0) ||
	    (ret == EEH_STATE_NOT_SUPPORT) ||
	    (ret & (EEH_STATE_MMIO_ACTIVE | EEH_STATE_DMA_ACTIVE)) ==
	    (EEH_STATE_MMIO_ACTIVE | EEH_STATE_DMA_ACTIVE)) {
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		eeh_stats.false_positives++;
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		pe->false_positives++;
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		rc = 0;
		goto dn_unlock;
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	}

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	eeh_stats.slot_resets++;
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	/* Avoid repeated reports of this failure, including problems
	 * with other functions on this device, and functions under
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	 * bridges.
	 */
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	eeh_pe_state_mark(pe, EEH_PE_ISOLATED);
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	raw_spin_unlock_irqrestore(&confirm_error_lock, flags);
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	eeh_send_failure_event(pe);
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	/* Most EEH events are due to device driver bugs.  Having
	 * a stack trace will help the device-driver authors figure
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	 * out what happened.  So print that out.
	 */
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	WARN(1, "EEH: failure detected\n");
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	return 1;

dn_unlock:
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	raw_spin_unlock_irqrestore(&confirm_error_lock, flags);
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	return rc;
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}

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EXPORT_SYMBOL_GPL(eeh_dev_check_failure);
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/**
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 * eeh_check_failure - Check if all 1's data is due to EEH slot freeze
 * @token: I/O token, should be address in the form 0xA....
 * @val: value, should be all 1's (XXX why do we need this arg??)
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 *
 * Check for an EEH failure at the given token address.  Call this
 * routine if the result of a read was all 0xff's and you want to
 * find out if this is due to an EEH slot freeze event.  This routine
 * will query firmware for the EEH status.
 *
 * Note this routine is safe to call in an interrupt context.
 */
unsigned long eeh_check_failure(const volatile void __iomem *token, unsigned long val)
{
	unsigned long addr;
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	struct eeh_dev *edev;
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	/* Finding the phys addr + pci device; this is pretty quick. */
	addr = eeh_token_to_phys((unsigned long __force) token);
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	edev = pci_addr_cache_get_device(addr);
	if (!edev) {
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		eeh_stats.no_device++;
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		return val;
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	}
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	eeh_dev_check_failure(edev);
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	pci_dev_put(eeh_dev_to_pci_dev(edev));
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	return val;
}

EXPORT_SYMBOL(eeh_check_failure);

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/**
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 * eeh_pci_enable - Enable MMIO or DMA transfers for this slot
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 * @pe: EEH PE
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 *
 * This routine should be called to reenable frozen MMIO or DMA
 * so that it would work correctly again. It's useful while doing
 * recovery or log collection on the indicated device.
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 */
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int eeh_pci_enable(struct eeh_pe *pe, int function)
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{
	int rc;

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	rc = eeh_ops->set_option(pe, function);
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	if (rc)
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		pr_warning("%s: Unexpected state change %d on PHB#%d-PE#%x, err=%d\n",
			__func__, function, pe->phb->global_number, pe->addr, rc);
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	rc = eeh_ops->wait_state(pe, PCI_BUS_RESET_WAIT_MSEC);
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	if (rc > 0 && (rc & EEH_STATE_MMIO_ENABLED) &&
	   (function == EEH_OPT_THAW_MMIO))
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		return 0;

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	return rc;
}

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/**
 * pcibios_set_pcie_slot_reset - Set PCI-E reset state
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 * @dev: pci device struct
 * @state: reset state to enter
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 *
 * Return value:
 * 	0 if success
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 */
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int pcibios_set_pcie_reset_state(struct pci_dev *dev, enum pcie_reset_state state)
{
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	struct eeh_dev *edev = pci_dev_to_eeh_dev(dev);
	struct eeh_pe *pe = edev->pe;

	if (!pe) {
		pr_err("%s: No PE found on PCI device %s\n",
			__func__, pci_name(dev));
		return -EINVAL;
	}
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	switch (state) {
	case pcie_deassert_reset:
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		eeh_ops->reset(pe, EEH_RESET_DEACTIVATE);
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		break;
	case pcie_hot_reset:
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		eeh_ops->reset(pe, EEH_RESET_HOT);
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		break;
	case pcie_warm_reset:
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		eeh_ops->reset(pe, EEH_RESET_FUNDAMENTAL);
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		break;
	default:
		return -EINVAL;
	};

	return 0;
}

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/**
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 * eeh_set_pe_freset - Check the required reset for the indicated device
 * @data: EEH device
 * @flag: return value
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 *
 * Each device might have its preferred reset type: fundamental or
 * hot reset. The routine is used to collected the information for
 * the indicated device and its children so that the bunch of the
 * devices could be reset properly.
 */
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static void *eeh_set_dev_freset(void *data, void *flag)
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{
	struct pci_dev *dev;
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	unsigned int *freset = (unsigned int *)flag;
	struct eeh_dev *edev = (struct eeh_dev *)data;
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	dev = eeh_dev_to_pci_dev(edev);
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	if (dev)
		*freset |= dev->needs_freset;

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	return NULL;
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}

/**
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 * eeh_reset_pe_once - Assert the pci #RST line for 1/4 second
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 * @pe: EEH PE
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 *
 * Assert the PCI #RST line for 1/4 second.
 */
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static void eeh_reset_pe_once(struct eeh_pe *pe)
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{
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	unsigned int freset = 0;
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	/* Determine type of EEH reset required for
	 * Partitionable Endpoint, a hot-reset (1)
	 * or a fundamental reset (3).
	 * A fundamental reset required by any device under
	 * Partitionable Endpoint trumps hot-reset.
  	 */
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	eeh_pe_dev_traverse(pe, eeh_set_dev_freset, &freset);
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	if (freset)
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		eeh_ops->reset(pe, EEH_RESET_FUNDAMENTAL);
533
	else
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		eeh_ops->reset(pe, EEH_RESET_HOT);
535 536

	/* The PCI bus requires that the reset be held high for at least
537 538
	 * a 100 milliseconds. We wait a bit longer 'just in case'.
	 */
539
#define PCI_BUS_RST_HOLD_TIME_MSEC 250
540
	msleep(PCI_BUS_RST_HOLD_TIME_MSEC);
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	/* We might get hit with another EEH freeze as soon as the 
	 * pci slot reset line is dropped. Make sure we don't miss
544 545
	 * these, and clear the flag now.
	 */
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	eeh_pe_state_clear(pe, EEH_PE_ISOLATED);
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	eeh_ops->reset(pe, EEH_RESET_DEACTIVATE);
549 550 551

	/* After a PCI slot has been reset, the PCI Express spec requires
	 * a 1.5 second idle time for the bus to stabilize, before starting
552 553
	 * up traffic.
	 */
554
#define PCI_BUS_SETTLE_TIME_MSEC 1800
555
	msleep(PCI_BUS_SETTLE_TIME_MSEC);
556 557
}

558
/**
559
 * eeh_reset_pe - Reset the indicated PE
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 * @pe: EEH PE
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 *
 * This routine should be called to reset indicated device, including
 * PE. A PE might include multiple PCI devices and sometimes PCI bridges
 * might be involved as well.
 */
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int eeh_reset_pe(struct eeh_pe *pe)
567 568 569
{
	int i, rc;

570 571
	/* Take three shots at resetting the bus */
	for (i=0; i<3; i++) {
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		eeh_reset_pe_once(pe);
573

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		rc = eeh_ops->wait_state(pe, PCI_BUS_RESET_WAIT_MSEC);
575
		if (rc == (EEH_STATE_MMIO_ACTIVE | EEH_STATE_DMA_ACTIVE))
576
			return 0;
577 578

		if (rc < 0) {
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			pr_err("%s: Unrecoverable slot failure on PHB#%d-PE#%x",
				__func__, pe->phb->global_number, pe->addr);
581
			return -1;
582
		}
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		pr_err("EEH: bus reset %d failed on PHB#%d-PE#%x, rc=%d\n",
			i+1, pe->phb->global_number, pe->addr, rc);
585
	}
586

587
	return -1;
588 589
}

590
/**
591
 * eeh_save_bars - Save device bars
592
 * @edev: PCI device associated EEH device
593 594 595
 *
 * Save the values of the device bars. Unlike the restore
 * routine, this routine is *not* recursive. This is because
596
 * PCI devices are added individually; but, for the restore,
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 * an entire slot is reset at a time.
 */
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void eeh_save_bars(struct eeh_dev *edev)
600 601
{
	int i;
602
	struct device_node *dn;
603

604
	if (!edev)
605
		return;
606
	dn = eeh_dev_to_of_node(edev);
607 608
	
	for (i = 0; i < 16; i++)
609
		eeh_ops->read_config(dn, i * 4, 4, &edev->config_space[i]);
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}

612 613 614 615 616 617 618 619 620 621 622 623 624 625 626 627 628 629 630 631 632 633 634 635 636 637 638 639 640 641 642 643 644 645 646 647 648 649 650 651 652 653 654 655 656 657 658 659 660 661
/**
 * eeh_ops_register - Register platform dependent EEH operations
 * @ops: platform dependent EEH operations
 *
 * Register the platform dependent EEH operation callback
 * functions. The platform should call this function before
 * any other EEH operations.
 */
int __init eeh_ops_register(struct eeh_ops *ops)
{
	if (!ops->name) {
		pr_warning("%s: Invalid EEH ops name for %p\n",
			__func__, ops);
		return -EINVAL;
	}

	if (eeh_ops && eeh_ops != ops) {
		pr_warning("%s: EEH ops of platform %s already existing (%s)\n",
			__func__, eeh_ops->name, ops->name);
		return -EEXIST;
	}

	eeh_ops = ops;

	return 0;
}

/**
 * eeh_ops_unregister - Unreigster platform dependent EEH operations
 * @name: name of EEH platform operations
 *
 * Unregister the platform dependent EEH operation callback
 * functions.
 */
int __exit eeh_ops_unregister(const char *name)
{
	if (!name || !strlen(name)) {
		pr_warning("%s: Invalid EEH ops name\n",
			__func__);
		return -EINVAL;
	}

	if (eeh_ops && !strcmp(eeh_ops->name, name)) {
		eeh_ops = NULL;
		return 0;
	}

	return -EEXIST;
}

662 663 664
/**
 * eeh_init - EEH initialization
 *
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 * Initialize EEH by trying to enable it for all of the adapters in the system.
 * As a side effect we can determine here if eeh is supported at all.
 * Note that we leave EEH on so failed config cycles won't cause a machine
 * check.  If a user turns off EEH for a particular adapter they are really
 * telling Linux to ignore errors.  Some hardware (e.g. POWER5) won't
 * grant access to a slot if EEH isn't enabled, and so we always enable
 * EEH for all slots/all devices.
 *
 * The eeh-force-off option disables EEH checking globally, for all slots.
 * Even if force-off is set, the EEH hardware is still enabled, so that
 * newer systems can boot.
 */
677
static int __init eeh_init(void)
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{
679 680
	struct pci_controller *hose, *tmp;
	struct device_node *phb;
681 682 683 684 685 686
	int ret;

	/* call platform initialization function */
	if (!eeh_ops) {
		pr_warning("%s: Platform EEH operation not found\n",
			__func__);
687
		return -EEXIST;
688 689 690
	} else if ((ret = eeh_ops->init())) {
		pr_warning("%s: Failed to call platform init function (%d)\n",
			__func__, ret);
691
		return ret;
692
	}
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694
	raw_spin_lock_init(&confirm_error_lock);
695

696
	/* Enable EEH for all adapters */
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	if (eeh_probe_mode_devtree()) {
		list_for_each_entry_safe(hose, tmp,
			&hose_list, list_node) {
			phb = hose->dn;
			traverse_pci_devices(phb, eeh_ops->of_probe, NULL);
		}
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	}

	if (eeh_subsystem_enabled)
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		pr_info("EEH: PCI Enhanced I/O Error Handling Enabled\n");
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	else
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		pr_warning("EEH: No capable adapters found\n");
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	return ret;
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}

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core_initcall_sync(eeh_init);

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/**
716
 * eeh_add_device_early - Enable EEH for the indicated device_node
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 * @dn: device node for which to set up EEH
 *
 * This routine must be used to perform EEH initialization for PCI
 * devices that were added after system boot (e.g. hotplug, dlpar).
 * This routine must be called before any i/o is performed to the
 * adapter (inluding any config-space i/o).
 * Whether this actually enables EEH or not for this device depends
 * on the CEC architecture, type of the device, on earlier boot
 * command-line arguments & etc.
 */
727
static void eeh_add_device_early(struct device_node *dn)
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{
	struct pci_controller *phb;

731
	if (!dn || !of_node_to_eeh_dev(dn))
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		return;
733
	phb = of_node_to_eeh_dev(dn)->phb;
734 735 736

	/* USB Bus children of PCI devices will not have BUID's */
	if (NULL == phb || 0 == phb->buid)
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		return;

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	/* FIXME: hotplug support on POWERNV */
	eeh_ops->of_probe(dn, NULL);
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}

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/**
 * eeh_add_device_tree_early - Enable EEH for the indicated device
 * @dn: device node
 *
 * This routine must be used to perform EEH initialization for the
 * indicated PCI device that was added after system boot (e.g.
 * hotplug, dlpar).
 */
751 752 753
void eeh_add_device_tree_early(struct device_node *dn)
{
	struct device_node *sib;
754 755

	for_each_child_of_node(dn, sib)
756 757 758 759 760
		eeh_add_device_tree_early(sib);
	eeh_add_device_early(dn);
}
EXPORT_SYMBOL_GPL(eeh_add_device_tree_early);

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/**
762
 * eeh_add_device_late - Perform EEH initialization for the indicated pci device
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 * @dev: pci device for which to set up EEH
 *
 * This routine must be used to complete EEH initialization for PCI
 * devices that were added after system boot (e.g. hotplug, dlpar).
 */
768
static void eeh_add_device_late(struct pci_dev *dev)
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{
770
	struct device_node *dn;
771
	struct eeh_dev *edev;
772

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	if (!dev || !eeh_subsystem_enabled)
		return;

776
	pr_debug("EEH: Adding device %s\n", pci_name(dev));
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778
	dn = pci_device_to_OF_node(dev);
779
	edev = of_node_to_eeh_dev(dn);
780
	if (edev->pdev == dev) {
781 782 783
		pr_debug("EEH: Already referenced !\n");
		return;
	}
784
	WARN_ON(edev->pdev);
785

786
	pci_dev_get(dev);
787 788
	edev->pdev = dev;
	dev->dev.archdata.edev = edev;
789

790 791
	pci_addr_cache_insert_device(dev);
	eeh_sysfs_add_device(dev);
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}
793

794 795 796 797 798 799 800 801
/**
 * eeh_add_device_tree_late - Perform EEH initialization for the indicated PCI bus
 * @bus: PCI bus
 *
 * This routine must be used to perform EEH initialization for PCI
 * devices which are attached to the indicated PCI bus. The PCI bus
 * is added after system boot through hotplug or dlpar.
 */
802 803 804 805 806 807 808 809 810 811 812 813 814 815
void eeh_add_device_tree_late(struct pci_bus *bus)
{
	struct pci_dev *dev;

	list_for_each_entry(dev, &bus->devices, bus_list) {
 		eeh_add_device_late(dev);
 		if (dev->hdr_type == PCI_HEADER_TYPE_BRIDGE) {
 			struct pci_bus *subbus = dev->subordinate;
 			if (subbus)
 				eeh_add_device_tree_late(subbus);
 		}
	}
}
EXPORT_SYMBOL_GPL(eeh_add_device_tree_late);
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/**
818
 * eeh_remove_device - Undo EEH setup for the indicated pci device
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 * @dev: pci device to be removed
 *
821 822 823 824 825
 * This routine should be called when a device is removed from
 * a running system (e.g. by hotplug or dlpar).  It unregisters
 * the PCI device from the EEH subsystem.  I/O errors affecting
 * this device will no longer be detected after this call; thus,
 * i/o errors affecting this slot may leave this device unusable.
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 */
827
static void eeh_remove_device(struct pci_dev *dev)
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{
829 830
	struct eeh_dev *edev;

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	if (!dev || !eeh_subsystem_enabled)
		return;
833
	edev = pci_dev_to_eeh_dev(dev);
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	/* Unregister the device with the EEH/PCI address search system */
836
	pr_debug("EEH: Removing device %s\n", pci_name(dev));
837

838
	if (!edev || !edev->pdev) {
839 840
		pr_debug("EEH: Not referenced !\n");
		return;
841
	}
842 843
	edev->pdev = NULL;
	dev->dev.archdata.edev = NULL;
844
	pci_dev_put(dev);
845

846
	eeh_rmv_from_parent_pe(edev);
847 848
	pci_addr_cache_remove_device(dev);
	eeh_sysfs_remove_device(dev);
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}

851 852 853 854 855 856 857 858
/**
 * eeh_remove_bus_device - Undo EEH setup for the indicated PCI device
 * @dev: PCI device
 *
 * This routine must be called when a device is removed from the
 * running system through hotplug or dlpar. The corresponding
 * PCI address cache will be removed.
 */
859 860
void eeh_remove_bus_device(struct pci_dev *dev)
{
861 862 863
	struct pci_bus *bus = dev->subordinate;
	struct pci_dev *child, *tmp;

864
	eeh_remove_device(dev);
865 866 867 868

	if (bus && dev->hdr_type == PCI_HEADER_TYPE_BRIDGE) {
		list_for_each_entry_safe(child, tmp, &bus->devices, bus_list)
			 eeh_remove_bus_device(child);
869 870 871 872
	}
}
EXPORT_SYMBOL_GPL(eeh_remove_bus_device);

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static int proc_eeh_show(struct seq_file *m, void *v)
{
	if (0 == eeh_subsystem_enabled) {
		seq_printf(m, "EEH Subsystem is globally disabled\n");
877
		seq_printf(m, "eeh_total_mmio_ffs=%llu\n", eeh_stats.total_mmio_ffs);
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	} else {
		seq_printf(m, "EEH Subsystem is enabled\n");
880
		seq_printf(m,
881 882 883 884 885 886 887 888 889 890 891 892 893 894
				"no device=%llu\n"
				"no device node=%llu\n"
				"no config address=%llu\n"
				"check not wanted=%llu\n"
				"eeh_total_mmio_ffs=%llu\n"
				"eeh_false_positives=%llu\n"
				"eeh_slot_resets=%llu\n",
				eeh_stats.no_device,
				eeh_stats.no_dn,
				eeh_stats.no_cfg_addr,
				eeh_stats.ignored_check,
				eeh_stats.total_mmio_ffs,
				eeh_stats.false_positives,
				eeh_stats.slot_resets);
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	}

	return 0;
}

static int proc_eeh_open(struct inode *inode, struct file *file)
{
	return single_open(file, proc_eeh_show, NULL);
}

905
static const struct file_operations proc_eeh_operations = {
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	.open      = proc_eeh_open,
	.read      = seq_read,
	.llseek    = seq_lseek,
	.release   = single_release,
};

static int __init eeh_init_proc(void)
{
914
	if (machine_is(pseries))
915
		proc_create("powerpc/eeh", 0, NULL, &proc_eeh_operations);
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	return 0;
}
__initcall(eeh_init_proc);