r8169.c 128.0 KB
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/*
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 * r8169.c: RealTek 8169/8168/8101 ethernet driver.
 *
 * Copyright (c) 2002 ShuChen <shuchen@realtek.com.tw>
 * Copyright (c) 2003 - 2007 Francois Romieu <romieu@fr.zoreil.com>
 * Copyright (c) a lot of people too. Please respect their work.
 *
 * See MAINTAINERS file for support contact information.
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 */

#include <linux/module.h>
#include <linux/moduleparam.h>
#include <linux/pci.h>
#include <linux/netdevice.h>
#include <linux/etherdevice.h>
#include <linux/delay.h>
#include <linux/ethtool.h>
#include <linux/mii.h>
#include <linux/if_vlan.h>
#include <linux/crc32.h>
#include <linux/in.h>
#include <linux/ip.h>
#include <linux/tcp.h>
#include <linux/init.h>
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#include <linux/interrupt.h>
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#include <linux/dma-mapping.h>
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#include <linux/pm_runtime.h>
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#include <linux/firmware.h>
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#include <linux/pci-aspm.h>
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#include <linux/prefetch.h>
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#include <asm/system.h>
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#include <asm/io.h>
#include <asm/irq.h>

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#define RTL8169_VERSION "2.3LK-NAPI"
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#define MODULENAME "r8169"
#define PFX MODULENAME ": "

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#define FIRMWARE_8168D_1	"rtl_nic/rtl8168d-1.fw"
#define FIRMWARE_8168D_2	"rtl_nic/rtl8168d-2.fw"
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#define FIRMWARE_8168E_1	"rtl_nic/rtl8168e-1.fw"
#define FIRMWARE_8168E_2	"rtl_nic/rtl8168e-2.fw"
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#define FIRMWARE_8105E_1	"rtl_nic/rtl8105e-1.fw"
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#ifdef RTL8169_DEBUG
#define assert(expr) \
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	if (!(expr)) {					\
		printk( "Assertion failed! %s,%s,%s,line=%d\n",	\
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		#expr,__FILE__,__func__,__LINE__);		\
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	}
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#define dprintk(fmt, args...) \
	do { printk(KERN_DEBUG PFX fmt, ## args); } while (0)
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#else
#define assert(expr) do {} while (0)
#define dprintk(fmt, args...)	do {} while (0)
#endif /* RTL8169_DEBUG */

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#define R8169_MSG_DEFAULT \
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	(NETIF_MSG_DRV | NETIF_MSG_PROBE | NETIF_MSG_IFUP | NETIF_MSG_IFDOWN)
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#define TX_BUFFS_AVAIL(tp) \
	(tp->dirty_tx + NUM_TX_DESC - tp->cur_tx - 1)

/* Maximum number of multicast addresses to filter (vs. Rx-all-multicast).
   The RTL chips use a 64 element hash table based on the Ethernet CRC. */
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static const int multicast_filter_limit = 32;
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/* MAC address length */
#define MAC_ADDR_LEN	6

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#define MAX_READ_REQUEST_SHIFT	12
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#define RX_FIFO_THRESH	7	/* 7 means NO threshold, Rx buffer level before first PCI xfer. */
#define RX_DMA_BURST	6	/* Maximum PCI burst, '6' is 1024 */
#define TX_DMA_BURST	6	/* Maximum PCI burst, '6' is 1024 */
#define SafeMtu		0x1c20	/* ... actually life sucks beyond ~7k */
#define InterFrameGap	0x03	/* 3 means InterFrameGap = the shortest one */

#define R8169_REGS_SIZE		256
#define R8169_NAPI_WEIGHT	64
#define NUM_TX_DESC	64	/* Number of Tx descriptor registers */
#define NUM_RX_DESC	256	/* Number of Rx descriptor registers */
#define RX_BUF_SIZE	1536	/* Rx Buffer size */
#define R8169_TX_RING_BYTES	(NUM_TX_DESC * sizeof(struct TxDesc))
#define R8169_RX_RING_BYTES	(NUM_RX_DESC * sizeof(struct RxDesc))

#define RTL8169_TX_TIMEOUT	(6*HZ)
#define RTL8169_PHY_TIMEOUT	(10*HZ)

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#define RTL_EEPROM_SIG		cpu_to_le32(0x8129)
#define RTL_EEPROM_SIG_MASK	cpu_to_le32(0xffff)
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#define RTL_EEPROM_SIG_ADDR	0x0000

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/* write/read MMIO register */
#define RTL_W8(reg, val8)	writeb ((val8), ioaddr + (reg))
#define RTL_W16(reg, val16)	writew ((val16), ioaddr + (reg))
#define RTL_W32(reg, val32)	writel ((val32), ioaddr + (reg))
#define RTL_R8(reg)		readb (ioaddr + (reg))
#define RTL_R16(reg)		readw (ioaddr + (reg))
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#define RTL_R32(reg)		readl (ioaddr + (reg))
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enum mac_version {
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	RTL_GIGA_MAC_VER_01 = 0,
	RTL_GIGA_MAC_VER_02,
	RTL_GIGA_MAC_VER_03,
	RTL_GIGA_MAC_VER_04,
	RTL_GIGA_MAC_VER_05,
	RTL_GIGA_MAC_VER_06,
	RTL_GIGA_MAC_VER_07,
	RTL_GIGA_MAC_VER_08,
	RTL_GIGA_MAC_VER_09,
	RTL_GIGA_MAC_VER_10,
	RTL_GIGA_MAC_VER_11,
	RTL_GIGA_MAC_VER_12,
	RTL_GIGA_MAC_VER_13,
	RTL_GIGA_MAC_VER_14,
	RTL_GIGA_MAC_VER_15,
	RTL_GIGA_MAC_VER_16,
	RTL_GIGA_MAC_VER_17,
	RTL_GIGA_MAC_VER_18,
	RTL_GIGA_MAC_VER_19,
	RTL_GIGA_MAC_VER_20,
	RTL_GIGA_MAC_VER_21,
	RTL_GIGA_MAC_VER_22,
	RTL_GIGA_MAC_VER_23,
	RTL_GIGA_MAC_VER_24,
	RTL_GIGA_MAC_VER_25,
	RTL_GIGA_MAC_VER_26,
	RTL_GIGA_MAC_VER_27,
	RTL_GIGA_MAC_VER_28,
	RTL_GIGA_MAC_VER_29,
	RTL_GIGA_MAC_VER_30,
	RTL_GIGA_MAC_VER_31,
	RTL_GIGA_MAC_VER_32,
	RTL_GIGA_MAC_VER_33,
	RTL_GIGA_MAC_NONE   = 0xff,
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};

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enum rtl_tx_desc_version {
	RTL_TD_0	= 0,
	RTL_TD_1	= 1,
};

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#define _R(NAME,TD,FW) \
	{ .name = NAME, .txd_version = TD, .fw_name = FW }
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static const struct {
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	const char *name;
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	enum rtl_tx_desc_version txd_version;
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	const char *fw_name;
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} rtl_chip_infos[] = {
	/* PCI devices. */
	[RTL_GIGA_MAC_VER_01] =
		_R("RTL8169",		RTL_TD_0, NULL),
	[RTL_GIGA_MAC_VER_02] =
		_R("RTL8169s",		RTL_TD_0, NULL),
	[RTL_GIGA_MAC_VER_03] =
		_R("RTL8110s",		RTL_TD_0, NULL),
	[RTL_GIGA_MAC_VER_04] =
		_R("RTL8169sb/8110sb",	RTL_TD_0, NULL),
	[RTL_GIGA_MAC_VER_05] =
		_R("RTL8169sc/8110sc",	RTL_TD_0, NULL),
	[RTL_GIGA_MAC_VER_06] =
		_R("RTL8169sc/8110sc",	RTL_TD_0, NULL),
	/* PCI-E devices. */
	[RTL_GIGA_MAC_VER_07] =
		_R("RTL8102e",		RTL_TD_1, NULL),
	[RTL_GIGA_MAC_VER_08] =
		_R("RTL8102e",		RTL_TD_1, NULL),
	[RTL_GIGA_MAC_VER_09] =
		_R("RTL8102e",		RTL_TD_1, NULL),
	[RTL_GIGA_MAC_VER_10] =
		_R("RTL8101e",		RTL_TD_0, NULL),
	[RTL_GIGA_MAC_VER_11] =
		_R("RTL8168b/8111b",	RTL_TD_0, NULL),
	[RTL_GIGA_MAC_VER_12] =
		_R("RTL8168b/8111b",	RTL_TD_0, NULL),
	[RTL_GIGA_MAC_VER_13] =
		_R("RTL8101e",		RTL_TD_0, NULL),
	[RTL_GIGA_MAC_VER_14] =
		_R("RTL8100e",		RTL_TD_0, NULL),
	[RTL_GIGA_MAC_VER_15] =
		_R("RTL8100e",		RTL_TD_0, NULL),
	[RTL_GIGA_MAC_VER_16] =
		_R("RTL8101e",		RTL_TD_0, NULL),
	[RTL_GIGA_MAC_VER_17] =
		_R("RTL8168b/8111b",	RTL_TD_0, NULL),
	[RTL_GIGA_MAC_VER_18] =
		_R("RTL8168cp/8111cp",	RTL_TD_1, NULL),
	[RTL_GIGA_MAC_VER_19] =
		_R("RTL8168c/8111c",	RTL_TD_1, NULL),
	[RTL_GIGA_MAC_VER_20] =
		_R("RTL8168c/8111c",	RTL_TD_1, NULL),
	[RTL_GIGA_MAC_VER_21] =
		_R("RTL8168c/8111c",	RTL_TD_1, NULL),
	[RTL_GIGA_MAC_VER_22] =
		_R("RTL8168c/8111c",	RTL_TD_1, NULL),
	[RTL_GIGA_MAC_VER_23] =
		_R("RTL8168cp/8111cp",	RTL_TD_1, NULL),
	[RTL_GIGA_MAC_VER_24] =
		_R("RTL8168cp/8111cp",	RTL_TD_1, NULL),
	[RTL_GIGA_MAC_VER_25] =
		_R("RTL8168d/8111d",	RTL_TD_1, FIRMWARE_8168D_1),
	[RTL_GIGA_MAC_VER_26] =
		_R("RTL8168d/8111d",	RTL_TD_1, FIRMWARE_8168D_2),
	[RTL_GIGA_MAC_VER_27] =
		_R("RTL8168dp/8111dp",	RTL_TD_1, NULL),
	[RTL_GIGA_MAC_VER_28] =
		_R("RTL8168dp/8111dp",	RTL_TD_1, NULL),
	[RTL_GIGA_MAC_VER_29] =
		_R("RTL8105e",		RTL_TD_1, FIRMWARE_8105E_1),
	[RTL_GIGA_MAC_VER_30] =
		_R("RTL8105e",		RTL_TD_1, FIRMWARE_8105E_1),
	[RTL_GIGA_MAC_VER_31] =
		_R("RTL8168dp/8111dp",	RTL_TD_1, NULL),
	[RTL_GIGA_MAC_VER_32] =
		_R("RTL8168e/8111e",	RTL_TD_1, FIRMWARE_8168E_1),
	[RTL_GIGA_MAC_VER_33] =
		_R("RTL8168e/8111e",	RTL_TD_1, FIRMWARE_8168E_2)
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};
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#undef _R
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enum cfg_version {
	RTL_CFG_0 = 0x00,
	RTL_CFG_1,
	RTL_CFG_2
};

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static void rtl_hw_start_8169(struct net_device *);
static void rtl_hw_start_8168(struct net_device *);
static void rtl_hw_start_8101(struct net_device *);

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static DEFINE_PCI_DEVICE_TABLE(rtl8169_pci_tbl) = {
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	{ PCI_DEVICE(PCI_VENDOR_ID_REALTEK,	0x8129), 0, 0, RTL_CFG_0 },
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	{ PCI_DEVICE(PCI_VENDOR_ID_REALTEK,	0x8136), 0, 0, RTL_CFG_2 },
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	{ PCI_DEVICE(PCI_VENDOR_ID_REALTEK,	0x8167), 0, 0, RTL_CFG_0 },
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	{ PCI_DEVICE(PCI_VENDOR_ID_REALTEK,	0x8168), 0, 0, RTL_CFG_1 },
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	{ PCI_DEVICE(PCI_VENDOR_ID_REALTEK,	0x8169), 0, 0, RTL_CFG_0 },
	{ PCI_DEVICE(PCI_VENDOR_ID_DLINK,	0x4300), 0, 0, RTL_CFG_0 },
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	{ PCI_DEVICE(PCI_VENDOR_ID_AT,		0xc107), 0, 0, RTL_CFG_0 },
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	{ PCI_DEVICE(0x16ec,			0x0116), 0, 0, RTL_CFG_0 },
	{ PCI_VENDOR_ID_LINKSYS,		0x1032,
		PCI_ANY_ID, 0x0024, 0, 0, RTL_CFG_0 },
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	{ 0x0001,				0x8168,
		PCI_ANY_ID, 0x2410, 0, 0, RTL_CFG_2 },
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	{0,},
};

MODULE_DEVICE_TABLE(pci, rtl8169_pci_tbl);

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static int rx_buf_sz = 16383;
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static int use_dac;
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static struct {
	u32 msg_enable;
} debug = { -1 };
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enum rtl_registers {
	MAC0		= 0,	/* Ethernet hardware address. */
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	MAC4		= 4,
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	MAR0		= 8,	/* Multicast filter. */
	CounterAddrLow		= 0x10,
	CounterAddrHigh		= 0x14,
	TxDescStartAddrLow	= 0x20,
	TxDescStartAddrHigh	= 0x24,
	TxHDescStartAddrLow	= 0x28,
	TxHDescStartAddrHigh	= 0x2c,
	FLASH		= 0x30,
	ERSR		= 0x36,
	ChipCmd		= 0x37,
	TxPoll		= 0x38,
	IntrMask	= 0x3c,
	IntrStatus	= 0x3e,
	TxConfig	= 0x40,
	RxConfig	= 0x44,
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#define RTL_RX_CONFIG_MASK		0xff7e1880u

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	RxMissed	= 0x4c,
	Cfg9346		= 0x50,
	Config0		= 0x51,
	Config1		= 0x52,
	Config2		= 0x53,
	Config3		= 0x54,
	Config4		= 0x55,
	Config5		= 0x56,
	MultiIntr	= 0x5c,
	PHYAR		= 0x60,
	PHYstatus	= 0x6c,
	RxMaxSize	= 0xda,
	CPlusCmd	= 0xe0,
	IntrMitigate	= 0xe2,
	RxDescAddrLow	= 0xe4,
	RxDescAddrHigh	= 0xe8,
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	EarlyTxThres	= 0xec,	/* 8169. Unit of 32 bytes. */

#define NoEarlyTx	0x3f	/* Max value : no early transmit. */

	MaxTxPacketSize	= 0xec,	/* 8101/8168. Unit of 128 bytes. */

#define TxPacketMax	(8064 >> 7)

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	FuncEvent	= 0xf0,
	FuncEventMask	= 0xf4,
	FuncPresetState	= 0xf8,
	FuncForceEvent	= 0xfc,
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};

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enum rtl8110_registers {
	TBICSR			= 0x64,
	TBI_ANAR		= 0x68,
	TBI_LPAR		= 0x6a,
};

enum rtl8168_8101_registers {
	CSIDR			= 0x64,
	CSIAR			= 0x68,
#define	CSIAR_FLAG			0x80000000
#define	CSIAR_WRITE_CMD			0x80000000
#define	CSIAR_BYTE_ENABLE		0x0f
#define	CSIAR_BYTE_ENABLE_SHIFT		12
#define	CSIAR_ADDR_MASK			0x0fff
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	PMCH			= 0x6f,
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	EPHYAR			= 0x80,
#define	EPHYAR_FLAG			0x80000000
#define	EPHYAR_WRITE_CMD		0x80000000
#define	EPHYAR_REG_MASK			0x1f
#define	EPHYAR_REG_SHIFT		16
#define	EPHYAR_DATA_MASK		0xffff
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	DLLPR			= 0xd0,
#define	PM_SWITCH			(1 << 6)
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	DBG_REG			= 0xd1,
#define	FIX_NAK_1			(1 << 4)
#define	FIX_NAK_2			(1 << 3)
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	TWSI			= 0xd2,
	MCU			= 0xd3,
#define	EN_NDP				(1 << 3)
#define	EN_OOB_RESET			(1 << 2)
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	EFUSEAR			= 0xdc,
#define	EFUSEAR_FLAG			0x80000000
#define	EFUSEAR_WRITE_CMD		0x80000000
#define	EFUSEAR_READ_CMD		0x00000000
#define	EFUSEAR_REG_MASK		0x03ff
#define	EFUSEAR_REG_SHIFT		8
#define	EFUSEAR_DATA_MASK		0xff
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};

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enum rtl8168_registers {
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	ERIDR			= 0x70,
	ERIAR			= 0x74,
#define ERIAR_FLAG			0x80000000
#define ERIAR_WRITE_CMD			0x80000000
#define ERIAR_READ_CMD			0x00000000
#define ERIAR_ADDR_BYTE_ALIGN		4
#define ERIAR_EXGMAC			0
#define ERIAR_MSIX			1
#define ERIAR_ASF			2
#define ERIAR_TYPE_SHIFT		16
#define ERIAR_BYTEEN			0x0f
#define ERIAR_BYTEEN_SHIFT		12
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	EPHY_RXER_NUM		= 0x7c,
	OCPDR			= 0xb0,	/* OCP GPHY access */
#define OCPDR_WRITE_CMD			0x80000000
#define OCPDR_READ_CMD			0x00000000
#define OCPDR_REG_MASK			0x7f
#define OCPDR_GPHY_REG_SHIFT		16
#define OCPDR_DATA_MASK			0xffff
	OCPAR			= 0xb4,
#define OCPAR_FLAG			0x80000000
#define OCPAR_GPHY_WRITE_CMD		0x8000f060
#define OCPAR_GPHY_READ_CMD		0x0000f060
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	RDSAR1			= 0xd0,	/* 8168c only. Undocumented on 8168dp */
	MISC			= 0xf0,	/* 8168e only. */
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#define TXPLA_RST			(1 << 29)
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};

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enum rtl_register_content {
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	/* InterruptStatusBits */
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	SYSErr		= 0x8000,
	PCSTimeout	= 0x4000,
	SWInt		= 0x0100,
	TxDescUnavail	= 0x0080,
	RxFIFOOver	= 0x0040,
	LinkChg		= 0x0020,
	RxOverflow	= 0x0010,
	TxErr		= 0x0008,
	TxOK		= 0x0004,
	RxErr		= 0x0002,
	RxOK		= 0x0001,
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	/* RxStatusDesc */
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	RxFOVF	= (1 << 23),
	RxRWT	= (1 << 22),
	RxRES	= (1 << 21),
	RxRUNT	= (1 << 20),
	RxCRC	= (1 << 19),
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	/* ChipCmdBits */
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	CmdReset	= 0x10,
	CmdRxEnb	= 0x08,
	CmdTxEnb	= 0x04,
	RxBufEmpty	= 0x01,
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	/* TXPoll register p.5 */
	HPQ		= 0x80,		/* Poll cmd on the high prio queue */
	NPQ		= 0x40,		/* Poll cmd on the low prio queue */
	FSWInt		= 0x01,		/* Forced software interrupt */

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	/* Cfg9346Bits */
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	Cfg9346_Lock	= 0x00,
	Cfg9346_Unlock	= 0xc0,
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	/* rx_mode_bits */
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	AcceptErr	= 0x20,
	AcceptRunt	= 0x10,
	AcceptBroadcast	= 0x08,
	AcceptMulticast	= 0x04,
	AcceptMyPhys	= 0x02,
	AcceptAllPhys	= 0x01,
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	/* RxConfigBits */
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	RxCfgFIFOShift	= 13,
	RxCfgDMAShift	=  8,
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	/* TxConfigBits */
	TxInterFrameGapShift = 24,
	TxDMAShift = 8,	/* DMA burst value (0-7) is shift this many bits */

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	/* Config1 register p.24 */
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	LEDS1		= (1 << 7),
	LEDS0		= (1 << 6),
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	MSIEnable	= (1 << 5),	/* Enable Message Signaled Interrupt */
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	Speed_down	= (1 << 4),
	MEMMAP		= (1 << 3),
	IOMAP		= (1 << 2),
	VPD		= (1 << 1),
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	PMEnable	= (1 << 0),	/* Power Management Enable */

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	/* Config2 register p. 25 */
	PCI_Clock_66MHz = 0x01,
	PCI_Clock_33MHz = 0x00,

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	/* Config3 register p.25 */
	MagicPacket	= (1 << 5),	/* Wake up when receives a Magic Packet */
	LinkUp		= (1 << 4),	/* Wake up when the cable connection is re-established */
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	Beacon_en	= (1 << 0),	/* 8168 only. Reserved in the 8168b */
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	/* Config5 register p.27 */
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	BWF		= (1 << 6),	/* Accept Broadcast wakeup frame */
	MWF		= (1 << 5),	/* Accept Multicast wakeup frame */
	UWF		= (1 << 4),	/* Accept Unicast wakeup frame */
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	Spi_en		= (1 << 3),
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	LanWake		= (1 << 1),	/* LanWake enable/disable */
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	PMEStatus	= (1 << 0),	/* PME status can be reset by PCI RST# */

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	/* TBICSR p.28 */
	TBIReset	= 0x80000000,
	TBILoopback	= 0x40000000,
	TBINwEnable	= 0x20000000,
	TBINwRestart	= 0x10000000,
	TBILinkOk	= 0x02000000,
	TBINwComplete	= 0x01000000,

	/* CPlusCmd p.31 */
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	EnableBist	= (1 << 15),	// 8168 8101
	Mac_dbgo_oe	= (1 << 14),	// 8168 8101
	Normal_mode	= (1 << 13),	// unused
	Force_half_dup	= (1 << 12),	// 8168 8101
	Force_rxflow_en	= (1 << 11),	// 8168 8101
	Force_txflow_en	= (1 << 10),	// 8168 8101
	Cxpl_dbg_sel	= (1 << 9),	// 8168 8101
	ASF		= (1 << 8),	// 8168 8101
	PktCntrDisable	= (1 << 7),	// 8168 8101
	Mac_dbgo_sel	= 0x001c,	// 8168
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	RxVlan		= (1 << 6),
	RxChkSum	= (1 << 5),
	PCIDAC		= (1 << 4),
	PCIMulRW	= (1 << 3),
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	INTT_0		= 0x0000,	// 8168
	INTT_1		= 0x0001,	// 8168
	INTT_2		= 0x0002,	// 8168
	INTT_3		= 0x0003,	// 8168
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	/* rtl8169_PHYstatus */
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	TBI_Enable	= 0x80,
	TxFlowCtrl	= 0x40,
	RxFlowCtrl	= 0x20,
	_1000bpsF	= 0x10,
	_100bps		= 0x08,
	_10bps		= 0x04,
	LinkStatus	= 0x02,
	FullDup		= 0x01,
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	/* _TBICSRBit */
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	TBILinkOK	= 0x02000000,
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	/* DumpCounterCommand */
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	CounterDump	= 0x8,
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};

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enum rtl_desc_bit {
	/* First doubleword. */
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	DescOwn		= (1 << 31), /* Descriptor is owned by NIC */
	RingEnd		= (1 << 30), /* End of descriptor ring */
	FirstFrag	= (1 << 29), /* First segment of a packet */
	LastFrag	= (1 << 28), /* Final segment of a packet */
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};

/* Generic case. */
enum rtl_tx_desc_bit {
	/* First doubleword. */
	TD_LSO		= (1 << 27),		/* Large Send Offload */
#define TD_MSS_MAX			0x07ffu	/* MSS value */
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	/* Second doubleword. */
	TxVlanTag	= (1 << 17),		/* Add VLAN tag */
};

/* 8169, 8168b and 810x except 8102e. */
enum rtl_tx_desc_bit_0 {
	/* First doubleword. */
#define TD0_MSS_SHIFT			16	/* MSS position (11 bits) */
	TD0_TCP_CS	= (1 << 16),		/* Calculate TCP/IP checksum */
	TD0_UDP_CS	= (1 << 17),		/* Calculate UDP/IP checksum */
	TD0_IP_CS	= (1 << 18),		/* Calculate IP checksum */
};

/* 8102e, 8168c and beyond. */
enum rtl_tx_desc_bit_1 {
	/* Second doubleword. */
#define TD1_MSS_SHIFT			18	/* MSS position (11 bits) */
	TD1_IP_CS	= (1 << 29),		/* Calculate IP checksum */
	TD1_TCP_CS	= (1 << 30),		/* Calculate TCP/IP checksum */
	TD1_UDP_CS	= (1 << 31),		/* Calculate UDP/IP checksum */
};
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static const struct rtl_tx_desc_info {
	struct {
		u32 udp;
		u32 tcp;
	} checksum;
	u16 mss_shift;
	u16 opts_offset;
} tx_desc_info [] = {
	[RTL_TD_0] = {
		.checksum = {
			.udp	= TD0_IP_CS | TD0_UDP_CS,
			.tcp	= TD0_IP_CS | TD0_TCP_CS
		},
		.mss_shift	= TD0_MSS_SHIFT,
		.opts_offset	= 0
	},
	[RTL_TD_1] = {
		.checksum = {
			.udp	= TD1_IP_CS | TD1_UDP_CS,
			.tcp	= TD1_IP_CS | TD1_TCP_CS
		},
		.mss_shift	= TD1_MSS_SHIFT,
		.opts_offset	= 1
	}
};

enum rtl_rx_desc_bit {
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	/* Rx private */
	PID1		= (1 << 18), /* Protocol ID bit 1/2 */
	PID0		= (1 << 17), /* Protocol ID bit 2/2 */

#define RxProtoUDP	(PID1)
#define RxProtoTCP	(PID0)
#define RxProtoIP	(PID1 | PID0)
#define RxProtoMask	RxProtoIP

	IPFail		= (1 << 16), /* IP checksum failed */
	UDPFail		= (1 << 15), /* UDP/IP checksum failed */
	TCPFail		= (1 << 14), /* TCP/IP checksum failed */
	RxVlanTag	= (1 << 16), /* VLAN tag available */
};

#define RsvdMask	0x3fffc000

struct TxDesc {
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	__le32 opts1;
	__le32 opts2;
	__le64 addr;
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};

struct RxDesc {
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	__le32 opts1;
	__le32 opts2;
	__le64 addr;
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};

struct ring_info {
	struct sk_buff	*skb;
	u32		len;
	u8		__pad[sizeof(void *) - sizeof(u32)];
};

598
enum features {
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	RTL_FEATURE_WOL		= (1 << 0),
	RTL_FEATURE_MSI		= (1 << 1),
	RTL_FEATURE_GMII	= (1 << 2),
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};

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struct rtl8169_counters {
	__le64	tx_packets;
	__le64	rx_packets;
	__le64	tx_errors;
	__le32	rx_errors;
	__le16	rx_missed;
	__le16	align_errors;
	__le32	tx_one_collision;
	__le32	tx_multi_collision;
	__le64	rx_unicast;
	__le64	rx_broadcast;
	__le32	rx_multicast;
	__le16	tx_aborted;
	__le16	tx_underun;
};

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struct rtl8169_private {
	void __iomem *mmio_addr;	/* memory map physical address */
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	struct pci_dev *pci_dev;
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	struct net_device *dev;
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	struct napi_struct napi;
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	spinlock_t lock;
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	u32 msg_enable;
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	u16 txd_version;
	u16 mac_version;
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	u32 cur_rx; /* Index into the Rx descriptor buffer of next Rx pkt. */
	u32 cur_tx; /* Index into the Tx descriptor buffer of next Rx pkt. */
	u32 dirty_rx;
	u32 dirty_tx;
	struct TxDesc *TxDescArray;	/* 256-aligned Tx descriptor ring */
	struct RxDesc *RxDescArray;	/* 256-aligned Rx descriptor ring */
	dma_addr_t TxPhyAddr;
	dma_addr_t RxPhyAddr;
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	void *Rx_databuff[NUM_RX_DESC];	/* Rx data buffers */
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	struct ring_info tx_skb[NUM_TX_DESC];	/* Tx data buffers */
	struct timer_list timer;
	u16 cp_cmd;
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	u16 intr_event;
	u16 napi_event;
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	u16 intr_mask;
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	struct mdio_ops {
		void (*write)(void __iomem *, int, int);
		int (*read)(void __iomem *, int);
	} mdio_ops;

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	struct pll_power_ops {
		void (*down)(struct rtl8169_private *);
		void (*up)(struct rtl8169_private *);
	} pll_power_ops;

655
	int (*set_speed)(struct net_device *, u8 aneg, u16 sp, u8 dpx, u32 adv);
656
	int (*get_settings)(struct net_device *, struct ethtool_cmd *);
657
	void (*phy_reset_enable)(struct rtl8169_private *tp);
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	void (*hw_start)(struct net_device *);
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	unsigned int (*phy_reset_pending)(struct rtl8169_private *tp);
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	unsigned int (*link_ok)(void __iomem *);
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	int (*do_ioctl)(struct rtl8169_private *tp, struct mii_ioctl_data *data, int cmd);
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	int pcie_cap;
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	struct delayed_work task;
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	unsigned features;
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	struct mii_if_info mii;
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	struct rtl8169_counters counters;
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	u32 saved_wolopts;
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	const struct firmware *fw;
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#define RTL_FIRMWARE_UNKNOWN	ERR_PTR(-EAGAIN);
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};

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MODULE_AUTHOR("Realtek and the Linux r8169 crew <netdev@vger.kernel.org>");
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MODULE_DESCRIPTION("RealTek RTL-8169 Gigabit Ethernet driver");
module_param(use_dac, int, 0);
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MODULE_PARM_DESC(use_dac, "Enable PCI DAC. Unsafe on 32 bit PCI slot.");
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module_param_named(debug, debug.msg_enable, int, 0);
MODULE_PARM_DESC(debug, "Debug verbosity level (0=none, ..., 16=all)");
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MODULE_LICENSE("GPL");
MODULE_VERSION(RTL8169_VERSION);
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MODULE_FIRMWARE(FIRMWARE_8168D_1);
MODULE_FIRMWARE(FIRMWARE_8168D_2);
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MODULE_FIRMWARE(FIRMWARE_8168E_1);
MODULE_FIRMWARE(FIRMWARE_8168E_2);
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MODULE_FIRMWARE(FIRMWARE_8105E_1);
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static int rtl8169_open(struct net_device *dev);
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static netdev_tx_t rtl8169_start_xmit(struct sk_buff *skb,
				      struct net_device *dev);
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static irqreturn_t rtl8169_interrupt(int irq, void *dev_instance);
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static int rtl8169_init_ring(struct net_device *dev);
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static void rtl_hw_start(struct net_device *dev);
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static int rtl8169_close(struct net_device *dev);
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static void rtl_set_rx_mode(struct net_device *dev);
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static void rtl8169_tx_timeout(struct net_device *dev);
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static struct net_device_stats *rtl8169_get_stats(struct net_device *dev);
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static int rtl8169_rx_interrupt(struct net_device *, struct rtl8169_private *,
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				void __iomem *, u32 budget);
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static int rtl8169_change_mtu(struct net_device *dev, int new_mtu);
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static void rtl8169_down(struct net_device *dev);
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static void rtl8169_rx_clear(struct rtl8169_private *tp);
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static int rtl8169_poll(struct napi_struct *napi, int budget);
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static const unsigned int rtl8169_rx_config =
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	(RX_FIFO_THRESH << RxCfgFIFOShift) | (RX_DMA_BURST << RxCfgDMAShift);
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static u32 ocp_read(struct rtl8169_private *tp, u8 mask, u16 reg)
{
	void __iomem *ioaddr = tp->mmio_addr;
	int i;

	RTL_W32(OCPAR, ((u32)mask & 0x0f) << 12 | (reg & 0x0fff));
	for (i = 0; i < 20; i++) {
		udelay(100);
		if (RTL_R32(OCPAR) & OCPAR_FLAG)
			break;
	}
	return RTL_R32(OCPDR);
}

static void ocp_write(struct rtl8169_private *tp, u8 mask, u16 reg, u32 data)
{
	void __iomem *ioaddr = tp->mmio_addr;
	int i;

	RTL_W32(OCPDR, data);
	RTL_W32(OCPAR, OCPAR_FLAG | ((u32)mask & 0x0f) << 12 | (reg & 0x0fff));
	for (i = 0; i < 20; i++) {
		udelay(100);
		if ((RTL_R32(OCPAR) & OCPAR_FLAG) == 0)
			break;
	}
}

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static void rtl8168_oob_notify(struct rtl8169_private *tp, u8 cmd)
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{
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	void __iomem *ioaddr = tp->mmio_addr;
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	int i;

	RTL_W8(ERIDR, cmd);
	RTL_W32(ERIAR, 0x800010e8);
	msleep(2);
	for (i = 0; i < 5; i++) {
		udelay(100);
		if (!(RTL_R32(ERIDR) & ERIAR_FLAG))
			break;
	}

750
	ocp_write(tp, 0x1, 0x30, 0x00000001);
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}

#define OOB_CMD_RESET		0x00
#define OOB_CMD_DRIVER_START	0x05
#define OOB_CMD_DRIVER_STOP	0x06

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static u16 rtl8168_get_ocp_reg(struct rtl8169_private *tp)
{
	return (tp->mac_version == RTL_GIGA_MAC_VER_31) ? 0xb8 : 0x10;
}

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static void rtl8168_driver_start(struct rtl8169_private *tp)
{
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	u16 reg;
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	int i;

	rtl8168_oob_notify(tp, OOB_CMD_DRIVER_START);

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	reg = rtl8168_get_ocp_reg(tp);
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	for (i = 0; i < 10; i++) {
		msleep(10);
773
		if (ocp_read(tp, 0x0f, reg) & 0x00000800)
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			break;
	}
}

static void rtl8168_driver_stop(struct rtl8169_private *tp)
{
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	u16 reg;
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	int i;

	rtl8168_oob_notify(tp, OOB_CMD_DRIVER_STOP);

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	reg = rtl8168_get_ocp_reg(tp);
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	for (i = 0; i < 10; i++) {
		msleep(10);
789
		if ((ocp_read(tp, 0x0f, reg) & 0x00000800) == 0)
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			break;
	}
}

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static int r8168dp_check_dash(struct rtl8169_private *tp)
{
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	u16 reg = rtl8168_get_ocp_reg(tp);
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	return (ocp_read(tp, 0x0f, reg) & 0x00008000) ? 1 : 0;
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}
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801
static void r8169_mdio_write(void __iomem *ioaddr, int reg_addr, int value)
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{
	int i;

805
	RTL_W32(PHYAR, 0x80000000 | (reg_addr & 0x1f) << 16 | (value & 0xffff));
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807
	for (i = 20; i > 0; i--) {
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		/*
		 * Check if the RTL8169 has completed writing to the specified
		 * MII register.
		 */
812
		if (!(RTL_R32(PHYAR) & 0x80000000))
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			break;
814
		udelay(25);
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	}
816
	/*
817 818
	 * According to hardware specs a 20us delay is required after write
	 * complete indication, but before sending next command.
819
	 */
820
	udelay(20);
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}

823
static int r8169_mdio_read(void __iomem *ioaddr, int reg_addr)
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{
	int i, value = -1;

827
	RTL_W32(PHYAR, 0x0 | (reg_addr & 0x1f) << 16);
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829
	for (i = 20; i > 0; i--) {
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		/*
		 * Check if the RTL8169 has completed retrieving data from
		 * the specified MII register.
		 */
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		if (RTL_R32(PHYAR) & 0x80000000) {
835
			value = RTL_R32(PHYAR) & 0xffff;
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			break;
		}
838
		udelay(25);
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	}
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	/*
	 * According to hardware specs a 20us delay is required after read
	 * complete indication, but before sending next command.
	 */
	udelay(20);

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	return value;
}

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static void r8168dp_1_mdio_access(void __iomem *ioaddr, int reg_addr, u32 data)
{
	int i;

	RTL_W32(OCPDR, data |
		((reg_addr & OCPDR_REG_MASK) << OCPDR_GPHY_REG_SHIFT));
	RTL_W32(OCPAR, OCPAR_GPHY_WRITE_CMD);
	RTL_W32(EPHY_RXER_NUM, 0);

	for (i = 0; i < 100; i++) {
		mdelay(1);
		if (!(RTL_R32(OCPAR) & OCPAR_FLAG))
			break;
	}
}

static void r8168dp_1_mdio_write(void __iomem *ioaddr, int reg_addr, int value)
{
	r8168dp_1_mdio_access(ioaddr, reg_addr, OCPDR_WRITE_CMD |
		(value & OCPDR_DATA_MASK));
}

static int r8168dp_1_mdio_read(void __iomem *ioaddr, int reg_addr)
{
	int i;

	r8168dp_1_mdio_access(ioaddr, reg_addr, OCPDR_READ_CMD);

	mdelay(1);
	RTL_W32(OCPAR, OCPAR_GPHY_READ_CMD);
	RTL_W32(EPHY_RXER_NUM, 0);

	for (i = 0; i < 100; i++) {
		mdelay(1);
		if (RTL_R32(OCPAR) & OCPAR_FLAG)
			break;
	}

	return RTL_R32(OCPDR) & OCPDR_DATA_MASK;
}

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#define R8168DP_1_MDIO_ACCESS_BIT	0x00020000

static void r8168dp_2_mdio_start(void __iomem *ioaddr)
{
	RTL_W32(0xd0, RTL_R32(0xd0) & ~R8168DP_1_MDIO_ACCESS_BIT);
}

static void r8168dp_2_mdio_stop(void __iomem *ioaddr)
{
	RTL_W32(0xd0, RTL_R32(0xd0) | R8168DP_1_MDIO_ACCESS_BIT);
}

static void r8168dp_2_mdio_write(void __iomem *ioaddr, int reg_addr, int value)
{
	r8168dp_2_mdio_start(ioaddr);

	r8169_mdio_write(ioaddr, reg_addr, value);

	r8168dp_2_mdio_stop(ioaddr);
}

static int r8168dp_2_mdio_read(void __iomem *ioaddr, int reg_addr)
{
	int value;

	r8168dp_2_mdio_start(ioaddr);

	value = r8169_mdio_read(ioaddr, reg_addr);

	r8168dp_2_mdio_stop(ioaddr);

	return value;
}

924
static void rtl_writephy(struct rtl8169_private *tp, int location, u32 val)
925
{
926
	tp->mdio_ops.write(tp->mmio_addr, location, val);
927 928
}

929 930
static int rtl_readphy(struct rtl8169_private *tp, int location)
{
931
	return tp->mdio_ops.read(tp->mmio_addr, location);
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}

static void rtl_patchphy(struct rtl8169_private *tp, int reg_addr, int value)
{
	rtl_writephy(tp, reg_addr, rtl_readphy(tp, reg_addr) | value);
}

static void rtl_w1w0_phy(struct rtl8169_private *tp, int reg_addr, int p, int m)
940 941 942
{
	int val;

943 944
	val = rtl_readphy(tp, reg_addr);
	rtl_writephy(tp, reg_addr, (val | p) & ~m);
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}

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static void rtl_mdio_write(struct net_device *dev, int phy_id, int location,
			   int val)
{
	struct rtl8169_private *tp = netdev_priv(dev);

952
	rtl_writephy(tp, location, val);
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}

static int rtl_mdio_read(struct net_device *dev, int phy_id, int location)
{
	struct rtl8169_private *tp = netdev_priv(dev);

959
	return rtl_readphy(tp, location);
960 961
}

962 963 964 965 966 967 968 969 970 971 972 973 974 975 976 977 978 979 980 981 982 983 984 985 986 987 988 989 990 991 992 993 994 995 996 997 998 999 1000 1001 1002 1003 1004 1005 1006 1007 1008 1009 1010 1011 1012 1013 1014 1015 1016 1017 1018 1019 1020 1021 1022 1023 1024 1025 1026 1027
static void rtl_ephy_write(void __iomem *ioaddr, int reg_addr, int value)
{
	unsigned int i;

	RTL_W32(EPHYAR, EPHYAR_WRITE_CMD | (value & EPHYAR_DATA_MASK) |
		(reg_addr & EPHYAR_REG_MASK) << EPHYAR_REG_SHIFT);

	for (i = 0; i < 100; i++) {
		if (!(RTL_R32(EPHYAR) & EPHYAR_FLAG))
			break;
		udelay(10);
	}
}

static u16 rtl_ephy_read(void __iomem *ioaddr, int reg_addr)
{
	u16 value = 0xffff;
	unsigned int i;

	RTL_W32(EPHYAR, (reg_addr & EPHYAR_REG_MASK) << EPHYAR_REG_SHIFT);

	for (i = 0; i < 100; i++) {
		if (RTL_R32(EPHYAR) & EPHYAR_FLAG) {
			value = RTL_R32(EPHYAR) & EPHYAR_DATA_MASK;
			break;
		}
		udelay(10);
	}

	return value;
}

static void rtl_csi_write(void __iomem *ioaddr, int addr, int value)
{
	unsigned int i;

	RTL_W32(CSIDR, value);
	RTL_W32(CSIAR, CSIAR_WRITE_CMD | (addr & CSIAR_ADDR_MASK) |
		CSIAR_BYTE_ENABLE << CSIAR_BYTE_ENABLE_SHIFT);

	for (i = 0; i < 100; i++) {
		if (!(RTL_R32(CSIAR) & CSIAR_FLAG))
			break;
		udelay(10);
	}
}

static u32 rtl_csi_read(void __iomem *ioaddr, int addr)
{
	u32 value = ~0x00;
	unsigned int i;

	RTL_W32(CSIAR, (addr & CSIAR_ADDR_MASK) |
		CSIAR_BYTE_ENABLE << CSIAR_BYTE_ENABLE_SHIFT);

	for (i = 0; i < 100; i++) {
		if (RTL_R32(CSIAR) & CSIAR_FLAG) {
			value = RTL_R32(CSIDR);
			break;
		}
		udelay(10);
	}

	return value;
}

1028 1029 1030 1031 1032 1033 1034 1035 1036 1037 1038 1039 1040 1041 1042 1043 1044 1045
static u8 rtl8168d_efuse_read(void __iomem *ioaddr, int reg_addr)
{
	u8 value = 0xff;
	unsigned int i;

	RTL_W32(EFUSEAR, (reg_addr & EFUSEAR_REG_MASK) << EFUSEAR_REG_SHIFT);

	for (i = 0; i < 300; i++) {
		if (RTL_R32(EFUSEAR) & EFUSEAR_FLAG) {
			value = RTL_R32(EFUSEAR) & EFUSEAR_DATA_MASK;
			break;
		}
		udelay(100);
	}

	return value;
}

L
Linus Torvalds 已提交
1046 1047 1048 1049 1050 1051 1052 1053 1054 1055 1056 1057 1058 1059
static void rtl8169_irq_mask_and_ack(void __iomem *ioaddr)
{
	RTL_W16(IntrMask, 0x0000);

	RTL_W16(IntrStatus, 0xffff);
}

static void rtl8169_asic_down(void __iomem *ioaddr)
{
	RTL_W8(ChipCmd, 0x00);
	rtl8169_irq_mask_and_ack(ioaddr);
	RTL_R16(CPlusCmd);
}

1060
static unsigned int rtl8169_tbi_reset_pending(struct rtl8169_private *tp)
L
Linus Torvalds 已提交
1061
{
1062 1063
	void __iomem *ioaddr = tp->mmio_addr;

L
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1064 1065 1066
	return RTL_R32(TBICSR) & TBIReset;
}

1067
static unsigned int rtl8169_xmii_reset_pending(struct rtl8169_private *tp)
L
Linus Torvalds 已提交
1068
{
1069
	return rtl_readphy(tp, MII_BMCR) & BMCR_RESET;
L
Linus Torvalds 已提交
1070 1071 1072 1073 1074 1075 1076 1077 1078 1079 1080 1081
}

static unsigned int rtl8169_tbi_link_ok(void __iomem *ioaddr)
{
	return RTL_R32(TBICSR) & TBILinkOk;
}

static unsigned int rtl8169_xmii_link_ok(void __iomem *ioaddr)
{
	return RTL_R8(PHYstatus) & LinkStatus;
}

1082
static void rtl8169_tbi_reset_enable(struct rtl8169_private *tp)
L
Linus Torvalds 已提交
1083
{
1084 1085
	void __iomem *ioaddr = tp->mmio_addr;

L
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1086 1087 1088
	RTL_W32(TBICSR, RTL_R32(TBICSR) | TBIReset);
}

1089
static void rtl8169_xmii_reset_enable(struct rtl8169_private *tp)
L
Linus Torvalds 已提交
1090 1091 1092
{
	unsigned int val;

1093 1094
	val = rtl_readphy(tp, MII_BMCR) | BMCR_RESET;
	rtl_writephy(tp, MII_BMCR, val & 0xffff);
L
Linus Torvalds 已提交
1095 1096
}

1097
static void __rtl8169_check_link_status(struct net_device *dev,
F
Francois Romieu 已提交
1098 1099
					struct rtl8169_private *tp,
					void __iomem *ioaddr, bool pm)
L
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1100 1101 1102 1103 1104
{
	unsigned long flags;

	spin_lock_irqsave(&tp->lock, flags);
	if (tp->link_ok(ioaddr)) {
1105
		/* This is to cancel a scheduled suspend if there's one. */
1106 1107
		if (pm)
			pm_request_resume(&tp->pci_dev->dev);
L
Linus Torvalds 已提交
1108
		netif_carrier_on(dev);
1109 1110
		if (net_ratelimit())
			netif_info(tp, ifup, dev, "link up\n");
1111
	} else {
L
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1112
		netif_carrier_off(dev);
1113
		netif_info(tp, ifdown, dev, "link down\n");
1114 1115
		if (pm)
			pm_schedule_suspend(&tp->pci_dev->dev, 100);
1116
	}
L
Linus Torvalds 已提交
1117 1118 1119
	spin_unlock_irqrestore(&tp->lock, flags);
}

1120 1121 1122 1123 1124 1125 1126
static void rtl8169_check_link_status(struct net_device *dev,
				      struct rtl8169_private *tp,
				      void __iomem *ioaddr)
{
	__rtl8169_check_link_status(dev, tp, ioaddr, false);
}

1127 1128 1129
#define WAKE_ANY (WAKE_PHY | WAKE_MAGIC | WAKE_UCAST | WAKE_BCAST | WAKE_MCAST)

static u32 __rtl8169_get_wol(struct rtl8169_private *tp)
F
Francois Romieu 已提交
1130 1131 1132
{
	void __iomem *ioaddr = tp->mmio_addr;
	u8 options;
1133
	u32 wolopts = 0;
F
Francois Romieu 已提交
1134 1135 1136

	options = RTL_R8(Config1);
	if (!(options & PMEnable))
1137
		return 0;
F
Francois Romieu 已提交
1138 1139 1140

	options = RTL_R8(Config3);
	if (options & LinkUp)
1141
		wolopts |= WAKE_PHY;
F
Francois Romieu 已提交
1142
	if (options & MagicPacket)
1143
		wolopts |= WAKE_MAGIC;
F
Francois Romieu 已提交
1144 1145 1146

	options = RTL_R8(Config5);
	if (options & UWF)
1147
		wolopts |= WAKE_UCAST;
F
Francois Romieu 已提交
1148
	if (options & BWF)
1149
		wolopts |= WAKE_BCAST;
F
Francois Romieu 已提交
1150
	if (options & MWF)
1151
		wolopts |= WAKE_MCAST;
F
Francois Romieu 已提交
1152

1153
	return wolopts;
F
Francois Romieu 已提交
1154 1155
}

1156
static void rtl8169_get_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
F
Francois Romieu 已提交
1157 1158
{
	struct rtl8169_private *tp = netdev_priv(dev);
1159 1160 1161 1162 1163 1164 1165 1166 1167 1168 1169

	spin_lock_irq(&tp->lock);

	wol->supported = WAKE_ANY;
	wol->wolopts = __rtl8169_get_wol(tp);

	spin_unlock_irq(&tp->lock);
}

static void __rtl8169_set_wol(struct rtl8169_private *tp, u32 wolopts)
{
F
Francois Romieu 已提交
1170
	void __iomem *ioaddr = tp->mmio_addr;
F
Francois Romieu 已提交
1171
	unsigned int i;
1172
	static const struct {
F
Francois Romieu 已提交
1173 1174 1175 1176 1177 1178 1179 1180 1181 1182 1183 1184 1185 1186 1187 1188 1189
		u32 opt;
		u16 reg;
		u8  mask;
	} cfg[] = {
		{ WAKE_ANY,   Config1, PMEnable },
		{ WAKE_PHY,   Config3, LinkUp },
		{ WAKE_MAGIC, Config3, MagicPacket },
		{ WAKE_UCAST, Config5, UWF },
		{ WAKE_BCAST, Config5, BWF },
		{ WAKE_MCAST, Config5, MWF },
		{ WAKE_ANY,   Config5, LanWake }
	};

	RTL_W8(Cfg9346, Cfg9346_Unlock);

	for (i = 0; i < ARRAY_SIZE(cfg); i++) {
		u8 options = RTL_R8(cfg[i].reg) & ~cfg[i].mask;
1190
		if (wolopts & cfg[i].opt)
F
Francois Romieu 已提交
1191 1192 1193 1194 1195
			options |= cfg[i].mask;
		RTL_W8(cfg[i].reg, options);
	}

	RTL_W8(Cfg9346, Cfg9346_Lock);
1196 1197 1198 1199 1200 1201 1202
}

static int rtl8169_set_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
{
	struct rtl8169_private *tp = netdev_priv(dev);

	spin_lock_irq(&tp->lock);
F
Francois Romieu 已提交
1203

1204 1205 1206 1207
	if (wol->wolopts)
		tp->features |= RTL_FEATURE_WOL;
	else
		tp->features &= ~RTL_FEATURE_WOL;
1208
	__rtl8169_set_wol(tp, wol->wolopts);
F
Francois Romieu 已提交
1209 1210
	spin_unlock_irq(&tp->lock);

1211 1212
	device_set_wakeup_enable(&tp->pci_dev->dev, wol->wolopts);

F
Francois Romieu 已提交
1213 1214 1215
	return 0;
}

1216 1217
static const char *rtl_lookup_firmware_name(struct rtl8169_private *tp)
{
1218
	return rtl_chip_infos[tp->mac_version].fw_name;
1219 1220
}

L
Linus Torvalds 已提交
1221 1222 1223 1224 1225 1226 1227 1228
static void rtl8169_get_drvinfo(struct net_device *dev,
				struct ethtool_drvinfo *info)
{
	struct rtl8169_private *tp = netdev_priv(dev);

	strcpy(info->driver, MODULENAME);
	strcpy(info->version, RTL8169_VERSION);
	strcpy(info->bus_info, pci_name(tp->pci_dev));
1229 1230
	strncpy(info->fw_version, IS_ERR_OR_NULL(tp->fw) ? "N/A" :
		rtl_lookup_firmware_name(tp), sizeof(info->fw_version) - 1);
L
Linus Torvalds 已提交
1231 1232 1233 1234 1235 1236 1237 1238
}

static int rtl8169_get_regs_len(struct net_device *dev)
{
	return R8169_REGS_SIZE;
}

static int rtl8169_set_speed_tbi(struct net_device *dev,
1239
				 u8 autoneg, u16 speed, u8 duplex, u32 ignored)
L
Linus Torvalds 已提交
1240 1241 1242 1243 1244 1245 1246 1247 1248 1249 1250 1251 1252
{
	struct rtl8169_private *tp = netdev_priv(dev);
	void __iomem *ioaddr = tp->mmio_addr;
	int ret = 0;
	u32 reg;

	reg = RTL_R32(TBICSR);
	if ((autoneg == AUTONEG_DISABLE) && (speed == SPEED_1000) &&
	    (duplex == DUPLEX_FULL)) {
		RTL_W32(TBICSR, reg & ~(TBINwEnable | TBINwRestart));
	} else if (autoneg == AUTONEG_ENABLE)
		RTL_W32(TBICSR, reg | TBINwEnable | TBINwRestart);
	else {
1253 1254
		netif_warn(tp, link, dev,
			   "incorrect speed setting refused in TBI mode\n");
L
Linus Torvalds 已提交
1255 1256 1257 1258 1259 1260 1261
		ret = -EOPNOTSUPP;
	}

	return ret;
}

static int rtl8169_set_speed_xmii(struct net_device *dev,
1262
				  u8 autoneg, u16 speed, u8 duplex, u32 adv)
L
Linus Torvalds 已提交
1263 1264
{
	struct rtl8169_private *tp = netdev_priv(dev);
1265
	int giga_ctrl, bmcr;
1266
	int rc = -EINVAL;
L
Linus Torvalds 已提交
1267

1268
	rtl_writephy(tp, 0x1f, 0x0000);
L
Linus Torvalds 已提交
1269 1270

	if (autoneg == AUTONEG_ENABLE) {
1271 1272
		int auto_nego;

1273
		auto_nego = rtl_readphy(tp, MII_ADVERTISE);
1274 1275 1276 1277 1278 1279 1280 1281 1282 1283 1284 1285
		auto_nego &= ~(ADVERTISE_10HALF | ADVERTISE_10FULL |
				ADVERTISE_100HALF | ADVERTISE_100FULL);

		if (adv & ADVERTISED_10baseT_Half)
			auto_nego |= ADVERTISE_10HALF;
		if (adv & ADVERTISED_10baseT_Full)
			auto_nego |= ADVERTISE_10FULL;
		if (adv & ADVERTISED_100baseT_Half)
			auto_nego |= ADVERTISE_100HALF;
		if (adv & ADVERTISED_100baseT_Full)
			auto_nego |= ADVERTISE_100FULL;

1286
		auto_nego |= ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM;
L
Linus Torvalds 已提交
1287

1288
		giga_ctrl = rtl_readphy(tp, MII_CTRL1000);
1289
		giga_ctrl &= ~(ADVERTISE_1000FULL | ADVERTISE_1000HALF);
1290

1291
		/* The 8100e/8101e/8102e do Fast Ethernet only. */
1292
		if (tp->mii.supports_gmii) {
1293 1294 1295 1296 1297 1298
			if (adv & ADVERTISED_1000baseT_Half)
				giga_ctrl |= ADVERTISE_1000HALF;
			if (adv & ADVERTISED_1000baseT_Full)
				giga_ctrl |= ADVERTISE_1000FULL;
		} else if (adv & (ADVERTISED_1000baseT_Half |
				  ADVERTISED_1000baseT_Full)) {
1299 1300
			netif_info(tp, link, dev,
				   "PHY does not support 1000Mbps\n");
1301
			goto out;
1302
		}
L
Linus Torvalds 已提交
1303

1304 1305
		bmcr = BMCR_ANENABLE | BMCR_ANRESTART;

1306 1307
		rtl_writephy(tp, MII_ADVERTISE, auto_nego);
		rtl_writephy(tp, MII_CTRL1000, giga_ctrl);
1308 1309 1310 1311 1312 1313 1314 1315
	} else {
		giga_ctrl = 0;

		if (speed == SPEED_10)
			bmcr = 0;
		else if (speed == SPEED_100)
			bmcr = BMCR_SPEED100;
		else
1316
			goto out;
1317 1318 1319

		if (duplex == DUPLEX_FULL)
			bmcr |= BMCR_FULLDPLX;
R
Roger So 已提交
1320 1321
	}

1322
	rtl_writephy(tp, MII_BMCR, bmcr);
1323

F
Francois Romieu 已提交
1324 1325
	if (tp->mac_version == RTL_GIGA_MAC_VER_02 ||
	    tp->mac_version == RTL_GIGA_MAC_VER_03) {
1326
		if ((speed == SPEED_100) && (autoneg != AUTONEG_ENABLE)) {
1327 1328
			rtl_writephy(tp, 0x17, 0x2138);
			rtl_writephy(tp, 0x0e, 0x0260);
1329
		} else {
1330 1331
			rtl_writephy(tp, 0x17, 0x2108);
			rtl_writephy(tp, 0x0e, 0x0000);
1332 1333 1334
		}
	}

1335 1336 1337
	rc = 0;
out:
	return rc;
L
Linus Torvalds 已提交
1338 1339 1340
}

static int rtl8169_set_speed(struct net_device *dev,
1341
			     u8 autoneg, u16 speed, u8 duplex, u32 advertising)
L
Linus Torvalds 已提交
1342 1343 1344 1345
{
	struct rtl8169_private *tp = netdev_priv(dev);
	int ret;

1346
	ret = tp->set_speed(dev, autoneg, speed, duplex, advertising);
1347 1348
	if (ret < 0)
		goto out;
L
Linus Torvalds 已提交
1349

1350 1351
	if (netif_running(dev) && (autoneg == AUTONEG_ENABLE) &&
	    (advertising & ADVERTISED_1000baseT_Full)) {
L
Linus Torvalds 已提交
1352
		mod_timer(&tp->timer, jiffies + RTL8169_PHY_TIMEOUT);
1353 1354
	}
out:
L
Linus Torvalds 已提交
1355 1356 1357 1358 1359 1360 1361 1362 1363
	return ret;
}

static int rtl8169_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)
{
	struct rtl8169_private *tp = netdev_priv(dev);
	unsigned long flags;
	int ret;

1364 1365
	del_timer_sync(&tp->timer);

L
Linus Torvalds 已提交
1366
	spin_lock_irqsave(&tp->lock, flags);
F
Francois Romieu 已提交
1367
	ret = rtl8169_set_speed(dev, cmd->autoneg, ethtool_cmd_speed(cmd),
1368
				cmd->duplex, cmd->advertising);
L
Linus Torvalds 已提交
1369
	spin_unlock_irqrestore(&tp->lock, flags);
1370

L
Linus Torvalds 已提交
1371 1372 1373
	return ret;
}

1374
static u32 rtl8169_fix_features(struct net_device *dev, u32 features)
L
Linus Torvalds 已提交
1375
{
F
Francois Romieu 已提交
1376
	if (dev->mtu > TD_MSS_MAX)
1377
		features &= ~NETIF_F_ALL_TSO;
L
Linus Torvalds 已提交
1378

1379
	return features;
L
Linus Torvalds 已提交
1380 1381
}

1382
static int rtl8169_set_features(struct net_device *dev, u32 features)
L
Linus Torvalds 已提交
1383 1384 1385 1386 1387 1388 1389
{
	struct rtl8169_private *tp = netdev_priv(dev);
	void __iomem *ioaddr = tp->mmio_addr;
	unsigned long flags;

	spin_lock_irqsave(&tp->lock, flags);

1390
	if (features & NETIF_F_RXCSUM)
L
Linus Torvalds 已提交
1391 1392 1393 1394
		tp->cp_cmd |= RxChkSum;
	else
		tp->cp_cmd &= ~RxChkSum;

1395 1396 1397 1398 1399
	if (dev->features & NETIF_F_HW_VLAN_RX)
		tp->cp_cmd |= RxVlan;
	else
		tp->cp_cmd &= ~RxVlan;

L
Linus Torvalds 已提交
1400 1401 1402 1403 1404 1405 1406 1407 1408 1409 1410
	RTL_W16(CPlusCmd, tp->cp_cmd);
	RTL_R16(CPlusCmd);

	spin_unlock_irqrestore(&tp->lock, flags);

	return 0;
}

static inline u32 rtl8169_tx_vlan_tag(struct rtl8169_private *tp,
				      struct sk_buff *skb)
{
1411
	return (vlan_tx_tag_present(skb)) ?
L
Linus Torvalds 已提交
1412 1413 1414
		TxVlanTag | swab16(vlan_tx_tag_get(skb)) : 0x00;
}

1415
static void rtl8169_rx_vlan_tag(struct RxDesc *desc, struct sk_buff *skb)
L
Linus Torvalds 已提交
1416 1417 1418
{
	u32 opts2 = le32_to_cpu(desc->opts2);

1419 1420
	if (opts2 & RxVlanTag)
		__vlan_hwaccel_put_tag(skb, swab16(opts2 & 0xffff));
E
Eric Dumazet 已提交
1421

L
Linus Torvalds 已提交
1422 1423 1424
	desc->opts2 = 0;
}

1425
static int rtl8169_gset_tbi(struct net_device *dev, struct ethtool_cmd *cmd)
L
Linus Torvalds 已提交
1426 1427 1428 1429 1430 1431 1432 1433 1434 1435 1436 1437 1438 1439
{
	struct rtl8169_private *tp = netdev_priv(dev);
	void __iomem *ioaddr = tp->mmio_addr;
	u32 status;

	cmd->supported =
		SUPPORTED_1000baseT_Full | SUPPORTED_Autoneg | SUPPORTED_FIBRE;
	cmd->port = PORT_FIBRE;
	cmd->transceiver = XCVR_INTERNAL;

	status = RTL_R32(TBICSR);
	cmd->advertising = (status & TBINwEnable) ?  ADVERTISED_Autoneg : 0;
	cmd->autoneg = !!(status & TBINwEnable);

1440
	ethtool_cmd_speed_set(cmd, SPEED_1000);
L
Linus Torvalds 已提交
1441
	cmd->duplex = DUPLEX_FULL; /* Always set */
1442 1443

	return 0;
L
Linus Torvalds 已提交
1444 1445
}

1446
static int rtl8169_gset_xmii(struct net_device *dev, struct ethtool_cmd *cmd)
L
Linus Torvalds 已提交
1447 1448
{
	struct rtl8169_private *tp = netdev_priv(dev);
1449 1450

	return mii_ethtool_gset(&tp->mii, cmd);
L
Linus Torvalds 已提交
1451 1452 1453 1454 1455 1456
}

static int rtl8169_get_settings(struct net_device *dev, struct ethtool_cmd *cmd)
{
	struct rtl8169_private *tp = netdev_priv(dev);
	unsigned long flags;
1457
	int rc;
L
Linus Torvalds 已提交
1458 1459 1460

	spin_lock_irqsave(&tp->lock, flags);

1461
	rc = tp->get_settings(dev, cmd);
L
Linus Torvalds 已提交
1462 1463

	spin_unlock_irqrestore(&tp->lock, flags);
1464
	return rc;
L
Linus Torvalds 已提交
1465 1466 1467 1468 1469
}

static void rtl8169_get_regs(struct net_device *dev, struct ethtool_regs *regs,
			     void *p)
{
1470 1471
	struct rtl8169_private *tp = netdev_priv(dev);
	unsigned long flags;
L
Linus Torvalds 已提交
1472

1473 1474
	if (regs->len > R8169_REGS_SIZE)
		regs->len = R8169_REGS_SIZE;
L
Linus Torvalds 已提交
1475

1476 1477 1478
	spin_lock_irqsave(&tp->lock, flags);
	memcpy_fromio(p, tp->mmio_addr, regs->len);
	spin_unlock_irqrestore(&tp->lock, flags);
L
Linus Torvalds 已提交
1479 1480
}

1481 1482 1483 1484 1485 1486 1487 1488 1489 1490 1491 1492 1493 1494
static u32 rtl8169_get_msglevel(struct net_device *dev)
{
	struct rtl8169_private *tp = netdev_priv(dev);

	return tp->msg_enable;
}

static void rtl8169_set_msglevel(struct net_device *dev, u32 value)
{
	struct rtl8169_private *tp = netdev_priv(dev);

	tp->msg_enable = value;
}

1495 1496 1497 1498 1499 1500 1501 1502 1503 1504 1505 1506 1507 1508 1509 1510
static const char rtl8169_gstrings[][ETH_GSTRING_LEN] = {
	"tx_packets",
	"rx_packets",
	"tx_errors",
	"rx_errors",
	"rx_missed",
	"align_errors",
	"tx_single_collisions",
	"tx_multi_collisions",
	"unicast",
	"broadcast",
	"multicast",
	"tx_aborted",
	"tx_underrun",
};

1511
static int rtl8169_get_sset_count(struct net_device *dev, int sset)
1512
{
1513 1514 1515 1516 1517 1518
	switch (sset) {
	case ETH_SS_STATS:
		return ARRAY_SIZE(rtl8169_gstrings);
	default:
		return -EOPNOTSUPP;
	}
1519 1520
}

1521
static void rtl8169_update_counters(struct net_device *dev)
1522 1523 1524
{
	struct rtl8169_private *tp = netdev_priv(dev);
	void __iomem *ioaddr = tp->mmio_addr;
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1525
	struct device *d = &tp->pci_dev->dev;
1526 1527 1528
	struct rtl8169_counters *counters;
	dma_addr_t paddr;
	u32 cmd;
1529
	int wait = 1000;
1530

1531 1532 1533 1534 1535 1536
	/*
	 * Some chips are unable to dump tally counters when the receiver
	 * is disabled.
	 */
	if ((RTL_R8(ChipCmd) & CmdRxEnb) == 0)
		return;
1537

1538
	counters = dma_alloc_coherent(d, sizeof(*counters), &paddr, GFP_KERNEL);
1539 1540 1541 1542
	if (!counters)
		return;

	RTL_W32(CounterAddrHigh, (u64)paddr >> 32);
1543
	cmd = (u64)paddr & DMA_BIT_MASK(32);
1544 1545 1546
	RTL_W32(CounterAddrLow, cmd);
	RTL_W32(CounterAddrLow, cmd | CounterDump);

1547 1548 1549
	while (wait--) {
		if ((RTL_R32(CounterAddrLow) & CounterDump) == 0) {
			memcpy(&tp->counters, counters, sizeof(*counters));
1550
			break;
1551 1552
		}
		udelay(10);
1553 1554 1555 1556 1557
	}

	RTL_W32(CounterAddrLow, 0);
	RTL_W32(CounterAddrHigh, 0);

1558
	dma_free_coherent(d, sizeof(*counters), counters, paddr);
1559 1560
}

1561 1562 1563 1564 1565 1566 1567 1568 1569 1570 1571 1572 1573 1574 1575 1576 1577 1578 1579 1580 1581 1582 1583 1584
static void rtl8169_get_ethtool_stats(struct net_device *dev,
				      struct ethtool_stats *stats, u64 *data)
{
	struct rtl8169_private *tp = netdev_priv(dev);

	ASSERT_RTNL();

	rtl8169_update_counters(dev);

	data[0] = le64_to_cpu(tp->counters.tx_packets);
	data[1] = le64_to_cpu(tp->counters.rx_packets);
	data[2] = le64_to_cpu(tp->counters.tx_errors);
	data[3] = le32_to_cpu(tp->counters.rx_errors);
	data[4] = le16_to_cpu(tp->counters.rx_missed);
	data[5] = le16_to_cpu(tp->counters.align_errors);
	data[6] = le32_to_cpu(tp->counters.tx_one_collision);
	data[7] = le32_to_cpu(tp->counters.tx_multi_collision);
	data[8] = le64_to_cpu(tp->counters.rx_unicast);
	data[9] = le64_to_cpu(tp->counters.rx_broadcast);
	data[10] = le32_to_cpu(tp->counters.rx_multicast);
	data[11] = le16_to_cpu(tp->counters.tx_aborted);
	data[12] = le16_to_cpu(tp->counters.tx_underun);
}

1585 1586 1587 1588 1589 1590 1591 1592 1593
static void rtl8169_get_strings(struct net_device *dev, u32 stringset, u8 *data)
{
	switch(stringset) {
	case ETH_SS_STATS:
		memcpy(data, *rtl8169_gstrings, sizeof(rtl8169_gstrings));
		break;
	}
}

1594
static const struct ethtool_ops rtl8169_ethtool_ops = {
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1595 1596 1597 1598 1599
	.get_drvinfo		= rtl8169_get_drvinfo,
	.get_regs_len		= rtl8169_get_regs_len,
	.get_link		= ethtool_op_get_link,
	.get_settings		= rtl8169_get_settings,
	.set_settings		= rtl8169_set_settings,
1600 1601
	.get_msglevel		= rtl8169_get_msglevel,
	.set_msglevel		= rtl8169_set_msglevel,
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	.get_regs		= rtl8169_get_regs,
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1603 1604
	.get_wol		= rtl8169_get_wol,
	.set_wol		= rtl8169_set_wol,
1605
	.get_strings		= rtl8169_get_strings,
1606
	.get_sset_count		= rtl8169_get_sset_count,
1607
	.get_ethtool_stats	= rtl8169_get_ethtool_stats,
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1608 1609
};

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1610
static void rtl8169_get_mac_version(struct rtl8169_private *tp,
1611
				    struct net_device *dev, u8 default_version)
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1612
{
1613
	void __iomem *ioaddr = tp->mmio_addr;
1614 1615 1616 1617 1618 1619
	/*
	 * The driver currently handles the 8168Bf and the 8168Be identically
	 * but they can be identified more specifically through the test below
	 * if needed:
	 *
	 * (RTL_R32(TxConfig) & 0x700000) == 0x500000 ? 8168Bf : 8168Be
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1620 1621 1622 1623
	 *
	 * Same thing for the 8101Eb and the 8101Ec:
	 *
	 * (RTL_R32(TxConfig) & 0x700000) == 0x200000 ? 8101Eb : 8101Ec
1624
	 */
1625
	static const struct {
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1626
		u32 mask;
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1627
		u32 val;
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1628 1629
		int mac_version;
	} mac_info[] = {
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1630 1631 1632 1633 1634
		/* 8168E family. */
		{ 0x7cf00000, 0x2c200000,	RTL_GIGA_MAC_VER_33 },
		{ 0x7cf00000, 0x2c100000,	RTL_GIGA_MAC_VER_32 },
		{ 0x7c800000, 0x2c000000,	RTL_GIGA_MAC_VER_33 },

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1635
		/* 8168D family. */
1636 1637 1638
		{ 0x7cf00000, 0x28300000,	RTL_GIGA_MAC_VER_26 },
		{ 0x7cf00000, 0x28100000,	RTL_GIGA_MAC_VER_25 },
		{ 0x7c800000, 0x28000000,	RTL_GIGA_MAC_VER_26 },
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1639

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1640 1641 1642
		/* 8168DP family. */
		{ 0x7cf00000, 0x28800000,	RTL_GIGA_MAC_VER_27 },
		{ 0x7cf00000, 0x28a00000,	RTL_GIGA_MAC_VER_28 },
1643
		{ 0x7cf00000, 0x28b00000,	RTL_GIGA_MAC_VER_31 },
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1645
		/* 8168C family. */
1646
		{ 0x7cf00000, 0x3cb00000,	RTL_GIGA_MAC_VER_24 },
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		{ 0x7cf00000, 0x3c900000,	RTL_GIGA_MAC_VER_23 },
1648
		{ 0x7cf00000, 0x3c800000,	RTL_GIGA_MAC_VER_18 },
1649
		{ 0x7c800000, 0x3c800000,	RTL_GIGA_MAC_VER_24 },
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		{ 0x7cf00000, 0x3c000000,	RTL_GIGA_MAC_VER_19 },
		{ 0x7cf00000, 0x3c200000,	RTL_GIGA_MAC_VER_20 },
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		{ 0x7cf00000, 0x3c300000,	RTL_GIGA_MAC_VER_21 },
1653
		{ 0x7cf00000, 0x3c400000,	RTL_GIGA_MAC_VER_22 },
1654
		{ 0x7c800000, 0x3c000000,	RTL_GIGA_MAC_VER_22 },
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1655 1656 1657 1658 1659 1660 1661 1662

		/* 8168B family. */
		{ 0x7cf00000, 0x38000000,	RTL_GIGA_MAC_VER_12 },
		{ 0x7cf00000, 0x38500000,	RTL_GIGA_MAC_VER_17 },
		{ 0x7c800000, 0x38000000,	RTL_GIGA_MAC_VER_17 },
		{ 0x7c800000, 0x30000000,	RTL_GIGA_MAC_VER_11 },

		/* 8101 family. */
1663
		{ 0x7cf00000, 0x40b00000,	RTL_GIGA_MAC_VER_30 },
1664 1665 1666
		{ 0x7cf00000, 0x40a00000,	RTL_GIGA_MAC_VER_30 },
		{ 0x7cf00000, 0x40900000,	RTL_GIGA_MAC_VER_29 },
		{ 0x7c800000, 0x40800000,	RTL_GIGA_MAC_VER_30 },
1667 1668 1669 1670 1671 1672
		{ 0x7cf00000, 0x34a00000,	RTL_GIGA_MAC_VER_09 },
		{ 0x7cf00000, 0x24a00000,	RTL_GIGA_MAC_VER_09 },
		{ 0x7cf00000, 0x34900000,	RTL_GIGA_MAC_VER_08 },
		{ 0x7cf00000, 0x24900000,	RTL_GIGA_MAC_VER_08 },
		{ 0x7cf00000, 0x34800000,	RTL_GIGA_MAC_VER_07 },
		{ 0x7cf00000, 0x24800000,	RTL_GIGA_MAC_VER_07 },
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		{ 0x7cf00000, 0x34000000,	RTL_GIGA_MAC_VER_13 },
1674
		{ 0x7cf00000, 0x34300000,	RTL_GIGA_MAC_VER_10 },
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1675
		{ 0x7cf00000, 0x34200000,	RTL_GIGA_MAC_VER_16 },
1676 1677
		{ 0x7c800000, 0x34800000,	RTL_GIGA_MAC_VER_09 },
		{ 0x7c800000, 0x24800000,	RTL_GIGA_MAC_VER_09 },
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1678 1679 1680 1681 1682 1683 1684 1685 1686 1687 1688 1689 1690
		{ 0x7c800000, 0x34000000,	RTL_GIGA_MAC_VER_16 },
		/* FIXME: where did these entries come from ? -- FR */
		{ 0xfc800000, 0x38800000,	RTL_GIGA_MAC_VER_15 },
		{ 0xfc800000, 0x30800000,	RTL_GIGA_MAC_VER_14 },

		/* 8110 family. */
		{ 0xfc800000, 0x98000000,	RTL_GIGA_MAC_VER_06 },
		{ 0xfc800000, 0x18000000,	RTL_GIGA_MAC_VER_05 },
		{ 0xfc800000, 0x10000000,	RTL_GIGA_MAC_VER_04 },
		{ 0xfc800000, 0x04000000,	RTL_GIGA_MAC_VER_03 },
		{ 0xfc800000, 0x00800000,	RTL_GIGA_MAC_VER_02 },
		{ 0xfc800000, 0x00000000,	RTL_GIGA_MAC_VER_01 },

1691 1692
		/* Catch-all */
		{ 0x00000000, 0x00000000,	RTL_GIGA_MAC_NONE   }
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1693 1694 1695
	}, *p = mac_info;
	u32 reg;

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1696 1697
	reg = RTL_R32(TxConfig);
	while ((reg & p->mask) != p->val)
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1698 1699
		p++;
	tp->mac_version = p->mac_version;
1700 1701 1702 1703 1704 1705

	if (tp->mac_version == RTL_GIGA_MAC_NONE) {
		netif_notice(tp, probe, dev,
			     "unknown MAC, using family default\n");
		tp->mac_version = default_version;
	}
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}

static void rtl8169_print_mac_version(struct rtl8169_private *tp)
{
1710
	dprintk("mac_version = 0x%02x\n", tp->mac_version);
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1711 1712
}

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struct phy_reg {
	u16 reg;
	u16 val;
};

1718 1719
static void rtl_writephy_batch(struct rtl8169_private *tp,
			       const struct phy_reg *regs, int len)
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1720 1721
{
	while (len-- > 0) {
1722
		rtl_writephy(tp, regs->reg, regs->val);
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		regs++;
	}
}

1727 1728 1729 1730 1731 1732 1733 1734 1735 1736 1737 1738 1739 1740 1741 1742 1743 1744 1745 1746 1747 1748
#define PHY_READ		0x00000000
#define PHY_DATA_OR		0x10000000
#define PHY_DATA_AND		0x20000000
#define PHY_BJMPN		0x30000000
#define PHY_READ_EFUSE		0x40000000
#define PHY_READ_MAC_BYTE	0x50000000
#define PHY_WRITE_MAC_BYTE	0x60000000
#define PHY_CLEAR_READCOUNT	0x70000000
#define PHY_WRITE		0x80000000
#define PHY_READCOUNT_EQ_SKIP	0x90000000
#define PHY_COMP_EQ_SKIPN	0xa0000000
#define PHY_COMP_NEQ_SKIPN	0xb0000000
#define PHY_WRITE_PREVIOUS	0xc0000000
#define PHY_SKIPN		0xd0000000
#define PHY_DELAY_MS		0xe0000000
#define PHY_WRITE_ERI_WORD	0xf0000000

static void
rtl_phy_write_fw(struct rtl8169_private *tp, const struct firmware *fw)
{
	__le32 *phytable = (__le32 *)fw->data;
	struct net_device *dev = tp->dev;
1749 1750
	size_t index, fw_size = fw->size / sizeof(*phytable);
	u32 predata, count;
1751 1752 1753 1754 1755 1756

	if (fw->size % sizeof(*phytable)) {
		netif_err(tp, probe, dev, "odd sized firmware %zd\n", fw->size);
		return;
	}

1757 1758 1759
	for (index = 0; index < fw_size; index++) {
		u32 action = le32_to_cpu(phytable[index]);
		u32 regno = (action & 0x0fff0000) >> 16;
1760

1761 1762 1763 1764 1765 1766 1767 1768 1769 1770 1771 1772 1773 1774
		switch(action & 0xf0000000) {
		case PHY_READ:
		case PHY_DATA_OR:
		case PHY_DATA_AND:
		case PHY_READ_EFUSE:
		case PHY_CLEAR_READCOUNT:
		case PHY_WRITE:
		case PHY_WRITE_PREVIOUS:
		case PHY_DELAY_MS:
			break;

		case PHY_BJMPN:
			if (regno > index) {
				netif_err(tp, probe, tp->dev,
F
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1775
					  "Out of range of firmware\n");
1776 1777 1778 1779 1780 1781
				return;
			}
			break;
		case PHY_READCOUNT_EQ_SKIP:
			if (index + 2 >= fw_size) {
				netif_err(tp, probe, tp->dev,
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1782
					  "Out of range of firmware\n");
1783 1784 1785 1786 1787 1788 1789 1790
				return;
			}
			break;
		case PHY_COMP_EQ_SKIPN:
		case PHY_COMP_NEQ_SKIPN:
		case PHY_SKIPN:
			if (index + 1 + regno >= fw_size) {
				netif_err(tp, probe, tp->dev,
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1791
					  "Out of range of firmware\n");
1792 1793
				return;
			}
1794 1795
			break;

1796 1797 1798 1799 1800 1801
		case PHY_READ_MAC_BYTE:
		case PHY_WRITE_MAC_BYTE:
		case PHY_WRITE_ERI_WORD:
		default:
			netif_err(tp, probe, tp->dev,
				  "Invalid action 0x%08x\n", action);
1802 1803 1804 1805
			return;
		}
	}

1806 1807 1808 1809 1810
	predata = 0;
	count = 0;

	for (index = 0; index < fw_size; ) {
		u32 action = le32_to_cpu(phytable[index]);
1811
		u32 data = action & 0x0000ffff;
1812 1813 1814 1815
		u32 regno = (action & 0x0fff0000) >> 16;

		if (!action)
			break;
1816 1817

		switch(action & 0xf0000000) {
1818 1819 1820 1821 1822 1823 1824 1825 1826 1827 1828 1829 1830 1831 1832 1833 1834 1835 1836 1837 1838 1839 1840 1841
		case PHY_READ:
			predata = rtl_readphy(tp, regno);
			count++;
			index++;
			break;
		case PHY_DATA_OR:
			predata |= data;
			index++;
			break;
		case PHY_DATA_AND:
			predata &= data;
			index++;
			break;
		case PHY_BJMPN:
			index -= regno;
			break;
		case PHY_READ_EFUSE:
			predata = rtl8168d_efuse_read(tp->mmio_addr, regno);
			index++;
			break;
		case PHY_CLEAR_READCOUNT:
			count = 0;
			index++;
			break;
1842
		case PHY_WRITE:
1843 1844 1845 1846
			rtl_writephy(tp, regno, data);
			index++;
			break;
		case PHY_READCOUNT_EQ_SKIP:
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			index += (count == data) ? 2 : 1;
1848
			break;
1849 1850 1851 1852 1853 1854 1855 1856 1857 1858 1859 1860 1861 1862 1863 1864 1865 1866 1867 1868 1869 1870 1871 1872 1873
		case PHY_COMP_EQ_SKIPN:
			if (predata == data)
				index += regno;
			index++;
			break;
		case PHY_COMP_NEQ_SKIPN:
			if (predata != data)
				index += regno;
			index++;
			break;
		case PHY_WRITE_PREVIOUS:
			rtl_writephy(tp, regno, predata);
			index++;
			break;
		case PHY_SKIPN:
			index += regno + 1;
			break;
		case PHY_DELAY_MS:
			mdelay(data);
			index++;
			break;

		case PHY_READ_MAC_BYTE:
		case PHY_WRITE_MAC_BYTE:
		case PHY_WRITE_ERI_WORD:
1874 1875 1876 1877 1878 1879
		default:
			BUG();
		}
	}
}

1880 1881
static void rtl_release_firmware(struct rtl8169_private *tp)
{
1882 1883 1884
	if (!IS_ERR_OR_NULL(tp->fw))
		release_firmware(tp->fw);
	tp->fw = RTL_FIRMWARE_UNKNOWN;
1885 1886
}

1887
static void rtl_apply_firmware(struct rtl8169_private *tp)
1888
{
1889
	const struct firmware *fw = tp->fw;
1890 1891

	/* TODO: release firmware once rtl_phy_write_fw signals failures. */
1892 1893 1894 1895 1896 1897 1898 1899 1900 1901
	if (!IS_ERR_OR_NULL(fw))
		rtl_phy_write_fw(tp, fw);
}

static void rtl_apply_firmware_cond(struct rtl8169_private *tp, u8 reg, u16 val)
{
	if (rtl_readphy(tp, reg) != val)
		netif_warn(tp, hw, tp->dev, "chipset not ready for firmware\n");
	else
		rtl_apply_firmware(tp);
1902 1903
}

1904
static void rtl8169s_hw_phy_config(struct rtl8169_private *tp)
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{
1906
	static const struct phy_reg phy_reg_init[] = {
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1907 1908 1909 1910 1911
		{ 0x1f, 0x0001 },
		{ 0x06, 0x006e },
		{ 0x08, 0x0708 },
		{ 0x15, 0x4000 },
		{ 0x18, 0x65c7 },
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1913 1914 1915 1916 1917 1918 1919
		{ 0x1f, 0x0001 },
		{ 0x03, 0x00a1 },
		{ 0x02, 0x0008 },
		{ 0x01, 0x0120 },
		{ 0x00, 0x1000 },
		{ 0x04, 0x0800 },
		{ 0x04, 0x0000 },
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1921 1922 1923 1924 1925 1926 1927 1928 1929 1930 1931 1932 1933 1934 1935 1936 1937 1938 1939 1940 1941 1942 1943 1944 1945 1946 1947 1948 1949 1950 1951 1952 1953 1954 1955 1956 1957 1958 1959 1960 1961 1962 1963 1964 1965 1966
		{ 0x03, 0xff41 },
		{ 0x02, 0xdf60 },
		{ 0x01, 0x0140 },
		{ 0x00, 0x0077 },
		{ 0x04, 0x7800 },
		{ 0x04, 0x7000 },

		{ 0x03, 0x802f },
		{ 0x02, 0x4f02 },
		{ 0x01, 0x0409 },
		{ 0x00, 0xf0f9 },
		{ 0x04, 0x9800 },
		{ 0x04, 0x9000 },

		{ 0x03, 0xdf01 },
		{ 0x02, 0xdf20 },
		{ 0x01, 0xff95 },
		{ 0x00, 0xba00 },
		{ 0x04, 0xa800 },
		{ 0x04, 0xa000 },

		{ 0x03, 0xff41 },
		{ 0x02, 0xdf20 },
		{ 0x01, 0x0140 },
		{ 0x00, 0x00bb },
		{ 0x04, 0xb800 },
		{ 0x04, 0xb000 },

		{ 0x03, 0xdf41 },
		{ 0x02, 0xdc60 },
		{ 0x01, 0x6340 },
		{ 0x00, 0x007d },
		{ 0x04, 0xd800 },
		{ 0x04, 0xd000 },

		{ 0x03, 0xdf01 },
		{ 0x02, 0xdf20 },
		{ 0x01, 0x100a },
		{ 0x00, 0xa0ff },
		{ 0x04, 0xf800 },
		{ 0x04, 0xf000 },

		{ 0x1f, 0x0000 },
		{ 0x0b, 0x0000 },
		{ 0x00, 0x9200 }
	};
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1968
	rtl_writephy_batch(tp, phy_reg_init, ARRAY_SIZE(phy_reg_init));
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}

1971
static void rtl8169sb_hw_phy_config(struct rtl8169_private *tp)
1972
{
1973
	static const struct phy_reg phy_reg_init[] = {
F
Francois Romieu 已提交
1974 1975 1976 1977 1978
		{ 0x1f, 0x0002 },
		{ 0x01, 0x90d0 },
		{ 0x1f, 0x0000 }
	};

1979
	rtl_writephy_batch(tp, phy_reg_init, ARRAY_SIZE(phy_reg_init));
1980 1981
}

1982
static void rtl8169scd_hw_phy_config_quirk(struct rtl8169_private *tp)
1983 1984 1985 1986 1987 1988 1989 1990 1991 1992
{
	struct pci_dev *pdev = tp->pci_dev;
	u16 vendor_id, device_id;

	pci_read_config_word(pdev, PCI_SUBSYSTEM_VENDOR_ID, &vendor_id);
	pci_read_config_word(pdev, PCI_SUBSYSTEM_ID, &device_id);

	if ((vendor_id != PCI_VENDOR_ID_GIGABYTE) || (device_id != 0xe000))
		return;

1993 1994 1995
	rtl_writephy(tp, 0x1f, 0x0001);
	rtl_writephy(tp, 0x10, 0xf01b);
	rtl_writephy(tp, 0x1f, 0x0000);
1996 1997
}

1998
static void rtl8169scd_hw_phy_config(struct rtl8169_private *tp)
1999
{
2000
	static const struct phy_reg phy_reg_init[] = {
2001 2002 2003 2004 2005 2006 2007 2008 2009 2010 2011 2012 2013 2014 2015 2016 2017 2018 2019 2020 2021 2022 2023 2024 2025 2026 2027 2028 2029 2030 2031 2032 2033 2034 2035 2036 2037 2038 2039
		{ 0x1f, 0x0001 },
		{ 0x04, 0x0000 },
		{ 0x03, 0x00a1 },
		{ 0x02, 0x0008 },
		{ 0x01, 0x0120 },
		{ 0x00, 0x1000 },
		{ 0x04, 0x0800 },
		{ 0x04, 0x9000 },
		{ 0x03, 0x802f },
		{ 0x02, 0x4f02 },
		{ 0x01, 0x0409 },
		{ 0x00, 0xf099 },
		{ 0x04, 0x9800 },
		{ 0x04, 0xa000 },
		{ 0x03, 0xdf01 },
		{ 0x02, 0xdf20 },
		{ 0x01, 0xff95 },
		{ 0x00, 0xba00 },
		{ 0x04, 0xa800 },
		{ 0x04, 0xf000 },
		{ 0x03, 0xdf01 },
		{ 0x02, 0xdf20 },
		{ 0x01, 0x101a },
		{ 0x00, 0xa0ff },
		{ 0x04, 0xf800 },
		{ 0x04, 0x0000 },
		{ 0x1f, 0x0000 },

		{ 0x1f, 0x0001 },
		{ 0x10, 0xf41b },
		{ 0x14, 0xfb54 },
		{ 0x18, 0xf5c7 },
		{ 0x1f, 0x0000 },

		{ 0x1f, 0x0001 },
		{ 0x17, 0x0cc0 },
		{ 0x1f, 0x0000 }
	};

2040
	rtl_writephy_batch(tp, phy_reg_init, ARRAY_SIZE(phy_reg_init));
2041

2042
	rtl8169scd_hw_phy_config_quirk(tp);
2043 2044
}

2045
static void rtl8169sce_hw_phy_config(struct rtl8169_private *tp)
2046
{
2047
	static const struct phy_reg phy_reg_init[] = {
2048 2049 2050 2051 2052 2053 2054 2055 2056 2057 2058 2059 2060 2061 2062 2063 2064 2065 2066 2067 2068 2069 2070 2071 2072 2073 2074 2075 2076 2077 2078 2079 2080 2081 2082 2083 2084 2085 2086 2087 2088 2089 2090 2091 2092 2093 2094
		{ 0x1f, 0x0001 },
		{ 0x04, 0x0000 },
		{ 0x03, 0x00a1 },
		{ 0x02, 0x0008 },
		{ 0x01, 0x0120 },
		{ 0x00, 0x1000 },
		{ 0x04, 0x0800 },
		{ 0x04, 0x9000 },
		{ 0x03, 0x802f },
		{ 0x02, 0x4f02 },
		{ 0x01, 0x0409 },
		{ 0x00, 0xf099 },
		{ 0x04, 0x9800 },
		{ 0x04, 0xa000 },
		{ 0x03, 0xdf01 },
		{ 0x02, 0xdf20 },
		{ 0x01, 0xff95 },
		{ 0x00, 0xba00 },
		{ 0x04, 0xa800 },
		{ 0x04, 0xf000 },
		{ 0x03, 0xdf01 },
		{ 0x02, 0xdf20 },
		{ 0x01, 0x101a },
		{ 0x00, 0xa0ff },
		{ 0x04, 0xf800 },
		{ 0x04, 0x0000 },
		{ 0x1f, 0x0000 },

		{ 0x1f, 0x0001 },
		{ 0x0b, 0x8480 },
		{ 0x1f, 0x0000 },

		{ 0x1f, 0x0001 },
		{ 0x18, 0x67c7 },
		{ 0x04, 0x2000 },
		{ 0x03, 0x002f },
		{ 0x02, 0x4360 },
		{ 0x01, 0x0109 },
		{ 0x00, 0x3022 },
		{ 0x04, 0x2800 },
		{ 0x1f, 0x0000 },

		{ 0x1f, 0x0001 },
		{ 0x17, 0x0cc0 },
		{ 0x1f, 0x0000 }
	};

2095
	rtl_writephy_batch(tp, phy_reg_init, ARRAY_SIZE(phy_reg_init));
2096 2097
}

2098
static void rtl8168bb_hw_phy_config(struct rtl8169_private *tp)
2099
{
2100
	static const struct phy_reg phy_reg_init[] = {
2101 2102 2103 2104
		{ 0x10, 0xf41b },
		{ 0x1f, 0x0000 }
	};

2105 2106
	rtl_writephy(tp, 0x1f, 0x0001);
	rtl_patchphy(tp, 0x16, 1 << 0);
2107

2108
	rtl_writephy_batch(tp, phy_reg_init, ARRAY_SIZE(phy_reg_init));
2109 2110
}

2111
static void rtl8168bef_hw_phy_config(struct rtl8169_private *tp)
2112
{
2113
	static const struct phy_reg phy_reg_init[] = {
2114 2115 2116 2117 2118
		{ 0x1f, 0x0001 },
		{ 0x10, 0xf41b },
		{ 0x1f, 0x0000 }
	};

2119
	rtl_writephy_batch(tp, phy_reg_init, ARRAY_SIZE(phy_reg_init));
2120 2121
}

2122
static void rtl8168cp_1_hw_phy_config(struct rtl8169_private *tp)
F
Francois Romieu 已提交
2123
{
2124
	static const struct phy_reg phy_reg_init[] = {
F
Francois Romieu 已提交
2125 2126 2127 2128 2129 2130 2131
		{ 0x1f, 0x0000 },
		{ 0x1d, 0x0f00 },
		{ 0x1f, 0x0002 },
		{ 0x0c, 0x1ec8 },
		{ 0x1f, 0x0000 }
	};

2132
	rtl_writephy_batch(tp, phy_reg_init, ARRAY_SIZE(phy_reg_init));
F
Francois Romieu 已提交
2133 2134
}

2135
static void rtl8168cp_2_hw_phy_config(struct rtl8169_private *tp)
F
Francois Romieu 已提交
2136
{
2137
	static const struct phy_reg phy_reg_init[] = {
F
Francois Romieu 已提交
2138 2139 2140 2141 2142
		{ 0x1f, 0x0001 },
		{ 0x1d, 0x3d98 },
		{ 0x1f, 0x0000 }
	};

2143 2144 2145
	rtl_writephy(tp, 0x1f, 0x0000);
	rtl_patchphy(tp, 0x14, 1 << 5);
	rtl_patchphy(tp, 0x0d, 1 << 5);
F
Francois Romieu 已提交
2146

2147
	rtl_writephy_batch(tp, phy_reg_init, ARRAY_SIZE(phy_reg_init));
F
Francois Romieu 已提交
2148 2149
}

2150
static void rtl8168c_1_hw_phy_config(struct rtl8169_private *tp)
F
Francois Romieu 已提交
2151
{
2152
	static const struct phy_reg phy_reg_init[] = {
2153 2154
		{ 0x1f, 0x0001 },
		{ 0x12, 0x2300 },
F
Francois Romieu 已提交
2155 2156 2157 2158 2159 2160 2161 2162 2163 2164 2165
		{ 0x1f, 0x0002 },
		{ 0x00, 0x88d4 },
		{ 0x01, 0x82b1 },
		{ 0x03, 0x7002 },
		{ 0x08, 0x9e30 },
		{ 0x09, 0x01f0 },
		{ 0x0a, 0x5500 },
		{ 0x0c, 0x00c8 },
		{ 0x1f, 0x0003 },
		{ 0x12, 0xc096 },
		{ 0x16, 0x000a },
2166 2167 2168 2169
		{ 0x1f, 0x0000 },
		{ 0x1f, 0x0000 },
		{ 0x09, 0x2000 },
		{ 0x09, 0x0000 }
F
Francois Romieu 已提交
2170 2171
	};

2172
	rtl_writephy_batch(tp, phy_reg_init, ARRAY_SIZE(phy_reg_init));
2173

2174 2175 2176
	rtl_patchphy(tp, 0x14, 1 << 5);
	rtl_patchphy(tp, 0x0d, 1 << 5);
	rtl_writephy(tp, 0x1f, 0x0000);
F
Francois Romieu 已提交
2177 2178
}

2179
static void rtl8168c_2_hw_phy_config(struct rtl8169_private *tp)
2180
{
2181
	static const struct phy_reg phy_reg_init[] = {
2182
		{ 0x1f, 0x0001 },
2183
		{ 0x12, 0x2300 },
2184 2185 2186 2187 2188 2189 2190
		{ 0x03, 0x802f },
		{ 0x02, 0x4f02 },
		{ 0x01, 0x0409 },
		{ 0x00, 0xf099 },
		{ 0x04, 0x9800 },
		{ 0x04, 0x9000 },
		{ 0x1d, 0x3d98 },
2191 2192
		{ 0x1f, 0x0002 },
		{ 0x0c, 0x7eb8 },
2193 2194 2195
		{ 0x06, 0x0761 },
		{ 0x1f, 0x0003 },
		{ 0x16, 0x0f0a },
2196 2197 2198
		{ 0x1f, 0x0000 }
	};

2199
	rtl_writephy_batch(tp, phy_reg_init, ARRAY_SIZE(phy_reg_init));
2200

2201 2202 2203 2204
	rtl_patchphy(tp, 0x16, 1 << 0);
	rtl_patchphy(tp, 0x14, 1 << 5);
	rtl_patchphy(tp, 0x0d, 1 << 5);
	rtl_writephy(tp, 0x1f, 0x0000);
2205 2206
}

2207
static void rtl8168c_3_hw_phy_config(struct rtl8169_private *tp)
F
Francois Romieu 已提交
2208
{
2209
	static const struct phy_reg phy_reg_init[] = {
F
Francois Romieu 已提交
2210 2211 2212 2213 2214 2215 2216 2217 2218 2219 2220
		{ 0x1f, 0x0001 },
		{ 0x12, 0x2300 },
		{ 0x1d, 0x3d98 },
		{ 0x1f, 0x0002 },
		{ 0x0c, 0x7eb8 },
		{ 0x06, 0x5461 },
		{ 0x1f, 0x0003 },
		{ 0x16, 0x0f0a },
		{ 0x1f, 0x0000 }
	};

2221
	rtl_writephy_batch(tp, phy_reg_init, ARRAY_SIZE(phy_reg_init));
F
Francois Romieu 已提交
2222

2223 2224 2225 2226
	rtl_patchphy(tp, 0x16, 1 << 0);
	rtl_patchphy(tp, 0x14, 1 << 5);
	rtl_patchphy(tp, 0x0d, 1 << 5);
	rtl_writephy(tp, 0x1f, 0x0000);
F
Francois Romieu 已提交
2227 2228
}

2229
static void rtl8168c_4_hw_phy_config(struct rtl8169_private *tp)
2230
{
2231
	rtl8168c_3_hw_phy_config(tp);
2232 2233
}

2234
static void rtl8168d_1_hw_phy_config(struct rtl8169_private *tp)
F
Francois Romieu 已提交
2235
{
2236
	static const struct phy_reg phy_reg_init_0[] = {
2237
		/* Channel Estimation */
F
Francois Romieu 已提交
2238
		{ 0x1f, 0x0001 },
2239 2240 2241 2242 2243 2244 2245 2246 2247 2248 2249
		{ 0x06, 0x4064 },
		{ 0x07, 0x2863 },
		{ 0x08, 0x059c },
		{ 0x09, 0x26b4 },
		{ 0x0a, 0x6a19 },
		{ 0x0b, 0xdcc8 },
		{ 0x10, 0xf06d },
		{ 0x14, 0x7f68 },
		{ 0x18, 0x7fd9 },
		{ 0x1c, 0xf0ff },
		{ 0x1d, 0x3d9c },
F
Francois Romieu 已提交
2250
		{ 0x1f, 0x0003 },
2251 2252 2253
		{ 0x12, 0xf49f },
		{ 0x13, 0x070b },
		{ 0x1a, 0x05ad },
2254 2255 2256 2257
		{ 0x14, 0x94c0 },

		/*
		 * Tx Error Issue
F
Francois Romieu 已提交
2258
		 * Enhance line driver power
2259
		 */
F
Francois Romieu 已提交
2260
		{ 0x1f, 0x0002 },
2261 2262 2263
		{ 0x06, 0x5561 },
		{ 0x1f, 0x0005 },
		{ 0x05, 0x8332 },
2264 2265 2266 2267 2268 2269 2270 2271
		{ 0x06, 0x5561 },

		/*
		 * Can not link to 1Gbps with bad cable
		 * Decrease SNR threshold form 21.07dB to 19.04dB
		 */
		{ 0x1f, 0x0001 },
		{ 0x17, 0x0cc0 },
2272

F
Francois Romieu 已提交
2273
		{ 0x1f, 0x0000 },
2274
		{ 0x0d, 0xf880 }
2275
	};
2276
	void __iomem *ioaddr = tp->mmio_addr;
2277

2278
	rtl_writephy_batch(tp, phy_reg_init_0, ARRAY_SIZE(phy_reg_init_0));
2279

2280 2281 2282 2283
	/*
	 * Rx Error Issue
	 * Fine Tune Switching regulator parameter
	 */
2284 2285 2286
	rtl_writephy(tp, 0x1f, 0x0002);
	rtl_w1w0_phy(tp, 0x0b, 0x0010, 0x00ef);
	rtl_w1w0_phy(tp, 0x0c, 0xa200, 0x5d00);
2287 2288

	if (rtl8168d_efuse_read(ioaddr, 0x01) == 0xb1) {
2289
		static const struct phy_reg phy_reg_init[] = {
2290 2291 2292 2293 2294 2295 2296 2297 2298
			{ 0x1f, 0x0002 },
			{ 0x05, 0x669a },
			{ 0x1f, 0x0005 },
			{ 0x05, 0x8330 },
			{ 0x06, 0x669a },
			{ 0x1f, 0x0002 }
		};
		int val;

2299
		rtl_writephy_batch(tp, phy_reg_init, ARRAY_SIZE(phy_reg_init));
2300

2301
		val = rtl_readphy(tp, 0x0d);
2302 2303

		if ((val & 0x00ff) != 0x006c) {
2304
			static const u32 set[] = {
2305 2306 2307 2308 2309
				0x0065, 0x0066, 0x0067, 0x0068,
				0x0069, 0x006a, 0x006b, 0x006c
			};
			int i;

2310
			rtl_writephy(tp, 0x1f, 0x0002);
2311 2312 2313

			val &= 0xff00;
			for (i = 0; i < ARRAY_SIZE(set); i++)
2314
				rtl_writephy(tp, 0x0d, val | set[i]);
2315 2316
		}
	} else {
2317
		static const struct phy_reg phy_reg_init[] = {
2318 2319 2320 2321 2322 2323 2324
			{ 0x1f, 0x0002 },
			{ 0x05, 0x6662 },
			{ 0x1f, 0x0005 },
			{ 0x05, 0x8330 },
			{ 0x06, 0x6662 }
		};

2325
		rtl_writephy_batch(tp, phy_reg_init, ARRAY_SIZE(phy_reg_init));
2326 2327
	}

2328
	/* RSET couple improve */
2329 2330 2331
	rtl_writephy(tp, 0x1f, 0x0002);
	rtl_patchphy(tp, 0x0d, 0x0300);
	rtl_patchphy(tp, 0x0f, 0x0010);
2332

2333
	/* Fine tune PLL performance */
2334 2335 2336
	rtl_writephy(tp, 0x1f, 0x0002);
	rtl_w1w0_phy(tp, 0x02, 0x0100, 0x0600);
	rtl_w1w0_phy(tp, 0x03, 0x0000, 0xe000);
2337

2338 2339
	rtl_writephy(tp, 0x1f, 0x0005);
	rtl_writephy(tp, 0x05, 0x001b);
2340 2341

	rtl_apply_firmware_cond(tp, MII_EXPANSION, 0xbf00);
2342

2343
	rtl_writephy(tp, 0x1f, 0x0000);
2344 2345
}

2346
static void rtl8168d_2_hw_phy_config(struct rtl8169_private *tp)
2347
{
2348
	static const struct phy_reg phy_reg_init_0[] = {
2349
		/* Channel Estimation */
2350 2351 2352 2353 2354 2355 2356 2357 2358 2359 2360 2361 2362 2363 2364 2365 2366 2367
		{ 0x1f, 0x0001 },
		{ 0x06, 0x4064 },
		{ 0x07, 0x2863 },
		{ 0x08, 0x059c },
		{ 0x09, 0x26b4 },
		{ 0x0a, 0x6a19 },
		{ 0x0b, 0xdcc8 },
		{ 0x10, 0xf06d },
		{ 0x14, 0x7f68 },
		{ 0x18, 0x7fd9 },
		{ 0x1c, 0xf0ff },
		{ 0x1d, 0x3d9c },
		{ 0x1f, 0x0003 },
		{ 0x12, 0xf49f },
		{ 0x13, 0x070b },
		{ 0x1a, 0x05ad },
		{ 0x14, 0x94c0 },

2368 2369
		/*
		 * Tx Error Issue
F
Francois Romieu 已提交
2370
		 * Enhance line driver power
2371
		 */
2372 2373 2374 2375
		{ 0x1f, 0x0002 },
		{ 0x06, 0x5561 },
		{ 0x1f, 0x0005 },
		{ 0x05, 0x8332 },
2376 2377 2378 2379 2380 2381 2382 2383
		{ 0x06, 0x5561 },

		/*
		 * Can not link to 1Gbps with bad cable
		 * Decrease SNR threshold form 21.07dB to 19.04dB
		 */
		{ 0x1f, 0x0001 },
		{ 0x17, 0x0cc0 },
2384 2385

		{ 0x1f, 0x0000 },
2386
		{ 0x0d, 0xf880 }
F
Francois Romieu 已提交
2387
	};
2388
	void __iomem *ioaddr = tp->mmio_addr;
F
Francois Romieu 已提交
2389

2390
	rtl_writephy_batch(tp, phy_reg_init_0, ARRAY_SIZE(phy_reg_init_0));
F
Francois Romieu 已提交
2391

2392
	if (rtl8168d_efuse_read(ioaddr, 0x01) == 0xb1) {
2393
		static const struct phy_reg phy_reg_init[] = {
2394 2395
			{ 0x1f, 0x0002 },
			{ 0x05, 0x669a },
F
Francois Romieu 已提交
2396
			{ 0x1f, 0x0005 },
2397 2398 2399 2400 2401 2402 2403
			{ 0x05, 0x8330 },
			{ 0x06, 0x669a },

			{ 0x1f, 0x0002 }
		};
		int val;

2404
		rtl_writephy_batch(tp, phy_reg_init, ARRAY_SIZE(phy_reg_init));
2405

2406
		val = rtl_readphy(tp, 0x0d);
2407
		if ((val & 0x00ff) != 0x006c) {
J
Joe Perches 已提交
2408
			static const u32 set[] = {
2409 2410 2411 2412 2413
				0x0065, 0x0066, 0x0067, 0x0068,
				0x0069, 0x006a, 0x006b, 0x006c
			};
			int i;

2414
			rtl_writephy(tp, 0x1f, 0x0002);
2415 2416 2417

			val &= 0xff00;
			for (i = 0; i < ARRAY_SIZE(set); i++)
2418
				rtl_writephy(tp, 0x0d, val | set[i]);
2419 2420
		}
	} else {
2421
		static const struct phy_reg phy_reg_init[] = {
2422 2423
			{ 0x1f, 0x0002 },
			{ 0x05, 0x2642 },
F
Francois Romieu 已提交
2424
			{ 0x1f, 0x0005 },
2425 2426
			{ 0x05, 0x8330 },
			{ 0x06, 0x2642 }
F
Francois Romieu 已提交
2427 2428
		};

2429
		rtl_writephy_batch(tp, phy_reg_init, ARRAY_SIZE(phy_reg_init));
F
Francois Romieu 已提交
2430 2431
	}

2432
	/* Fine tune PLL performance */
2433 2434 2435
	rtl_writephy(tp, 0x1f, 0x0002);
	rtl_w1w0_phy(tp, 0x02, 0x0100, 0x0600);
	rtl_w1w0_phy(tp, 0x03, 0x0000, 0xe000);
2436

2437
	/* Switching regulator Slew rate */
2438 2439
	rtl_writephy(tp, 0x1f, 0x0002);
	rtl_patchphy(tp, 0x0f, 0x0017);
2440

2441 2442
	rtl_writephy(tp, 0x1f, 0x0005);
	rtl_writephy(tp, 0x05, 0x001b);
2443 2444

	rtl_apply_firmware_cond(tp, MII_EXPANSION, 0xb300);
2445

2446
	rtl_writephy(tp, 0x1f, 0x0000);
2447 2448
}

2449
static void rtl8168d_3_hw_phy_config(struct rtl8169_private *tp)
2450
{
2451
	static const struct phy_reg phy_reg_init[] = {
2452 2453 2454 2455 2456 2457 2458 2459 2460 2461 2462 2463 2464 2465 2466 2467 2468 2469 2470 2471 2472 2473 2474 2475 2476 2477 2478 2479 2480 2481 2482 2483 2484 2485 2486 2487 2488 2489 2490 2491 2492 2493 2494 2495 2496 2497 2498 2499 2500 2501 2502 2503 2504 2505 2506
		{ 0x1f, 0x0002 },
		{ 0x10, 0x0008 },
		{ 0x0d, 0x006c },

		{ 0x1f, 0x0000 },
		{ 0x0d, 0xf880 },

		{ 0x1f, 0x0001 },
		{ 0x17, 0x0cc0 },

		{ 0x1f, 0x0001 },
		{ 0x0b, 0xa4d8 },
		{ 0x09, 0x281c },
		{ 0x07, 0x2883 },
		{ 0x0a, 0x6b35 },
		{ 0x1d, 0x3da4 },
		{ 0x1c, 0xeffd },
		{ 0x14, 0x7f52 },
		{ 0x18, 0x7fc6 },
		{ 0x08, 0x0601 },
		{ 0x06, 0x4063 },
		{ 0x10, 0xf074 },
		{ 0x1f, 0x0003 },
		{ 0x13, 0x0789 },
		{ 0x12, 0xf4bd },
		{ 0x1a, 0x04fd },
		{ 0x14, 0x84b0 },
		{ 0x1f, 0x0000 },
		{ 0x00, 0x9200 },

		{ 0x1f, 0x0005 },
		{ 0x01, 0x0340 },
		{ 0x1f, 0x0001 },
		{ 0x04, 0x4000 },
		{ 0x03, 0x1d21 },
		{ 0x02, 0x0c32 },
		{ 0x01, 0x0200 },
		{ 0x00, 0x5554 },
		{ 0x04, 0x4800 },
		{ 0x04, 0x4000 },
		{ 0x04, 0xf000 },
		{ 0x03, 0xdf01 },
		{ 0x02, 0xdf20 },
		{ 0x01, 0x101a },
		{ 0x00, 0xa0ff },
		{ 0x04, 0xf800 },
		{ 0x04, 0xf000 },
		{ 0x1f, 0x0000 },

		{ 0x1f, 0x0007 },
		{ 0x1e, 0x0023 },
		{ 0x16, 0x0000 },
		{ 0x1f, 0x0000 }
	};

2507
	rtl_writephy_batch(tp, phy_reg_init, ARRAY_SIZE(phy_reg_init));
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2508 2509
}

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2510 2511 2512 2513 2514 2515 2516 2517 2518 2519 2520 2521 2522 2523 2524 2525
static void rtl8168d_4_hw_phy_config(struct rtl8169_private *tp)
{
	static const struct phy_reg phy_reg_init[] = {
		{ 0x1f, 0x0001 },
		{ 0x17, 0x0cc0 },

		{ 0x1f, 0x0007 },
		{ 0x1e, 0x002d },
		{ 0x18, 0x0040 },
		{ 0x1f, 0x0000 }
	};

	rtl_writephy_batch(tp, phy_reg_init, ARRAY_SIZE(phy_reg_init));
	rtl_patchphy(tp, 0x0d, 1 << 5);
}

H
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2526 2527 2528 2529 2530 2531 2532 2533 2534 2535 2536 2537 2538 2539 2540 2541 2542 2543 2544 2545 2546 2547 2548 2549 2550 2551 2552 2553 2554 2555
static void rtl8168e_hw_phy_config(struct rtl8169_private *tp)
{
	static const struct phy_reg phy_reg_init[] = {
		/* Enable Delay cap */
		{ 0x1f, 0x0005 },
		{ 0x05, 0x8b80 },
		{ 0x06, 0xc896 },
		{ 0x1f, 0x0000 },

		/* Channel estimation fine tune */
		{ 0x1f, 0x0001 },
		{ 0x0b, 0x6c20 },
		{ 0x07, 0x2872 },
		{ 0x1c, 0xefff },
		{ 0x1f, 0x0003 },
		{ 0x14, 0x6420 },
		{ 0x1f, 0x0000 },

		/* Update PFM & 10M TX idle timer */
		{ 0x1f, 0x0007 },
		{ 0x1e, 0x002f },
		{ 0x15, 0x1919 },
		{ 0x1f, 0x0000 },

		{ 0x1f, 0x0007 },
		{ 0x1e, 0x00ac },
		{ 0x18, 0x0006 },
		{ 0x1f, 0x0000 }
	};

F
Francois Romieu 已提交
2556 2557
	rtl_apply_firmware(tp);

H
hayeswang 已提交
2558 2559 2560 2561 2562 2563 2564 2565 2566 2567 2568
	rtl_writephy_batch(tp, phy_reg_init, ARRAY_SIZE(phy_reg_init));

	/* DCO enable for 10M IDLE Power */
	rtl_writephy(tp, 0x1f, 0x0007);
	rtl_writephy(tp, 0x1e, 0x0023);
	rtl_w1w0_phy(tp, 0x17, 0x0006, 0x0000);
	rtl_writephy(tp, 0x1f, 0x0000);

	/* For impedance matching */
	rtl_writephy(tp, 0x1f, 0x0002);
	rtl_w1w0_phy(tp, 0x08, 0x8000, 0x7f00);
F
Francois Romieu 已提交
2569
	rtl_writephy(tp, 0x1f, 0x0000);
H
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2570 2571 2572 2573 2574 2575 2576 2577 2578 2579 2580 2581 2582 2583 2584 2585 2586 2587 2588 2589 2590 2591 2592 2593 2594 2595 2596 2597 2598

	/* PHY auto speed down */
	rtl_writephy(tp, 0x1f, 0x0007);
	rtl_writephy(tp, 0x1e, 0x002d);
	rtl_w1w0_phy(tp, 0x18, 0x0050, 0x0000);
	rtl_writephy(tp, 0x1f, 0x0000);
	rtl_w1w0_phy(tp, 0x14, 0x8000, 0x0000);

	rtl_writephy(tp, 0x1f, 0x0005);
	rtl_writephy(tp, 0x05, 0x8b86);
	rtl_w1w0_phy(tp, 0x06, 0x0001, 0x0000);
	rtl_writephy(tp, 0x1f, 0x0000);

	rtl_writephy(tp, 0x1f, 0x0005);
	rtl_writephy(tp, 0x05, 0x8b85);
	rtl_w1w0_phy(tp, 0x06, 0x0000, 0x2000);
	rtl_writephy(tp, 0x1f, 0x0007);
	rtl_writephy(tp, 0x1e, 0x0020);
	rtl_w1w0_phy(tp, 0x15, 0x0000, 0x1100);
	rtl_writephy(tp, 0x1f, 0x0006);
	rtl_writephy(tp, 0x00, 0x5a00);
	rtl_writephy(tp, 0x1f, 0x0000);
	rtl_writephy(tp, 0x0d, 0x0007);
	rtl_writephy(tp, 0x0e, 0x003c);
	rtl_writephy(tp, 0x0d, 0x4007);
	rtl_writephy(tp, 0x0e, 0x0000);
	rtl_writephy(tp, 0x0d, 0x0000);
}

2599
static void rtl8102e_hw_phy_config(struct rtl8169_private *tp)
2600
{
2601
	static const struct phy_reg phy_reg_init[] = {
2602 2603 2604 2605 2606 2607
		{ 0x1f, 0x0003 },
		{ 0x08, 0x441d },
		{ 0x01, 0x9100 },
		{ 0x1f, 0x0000 }
	};

2608 2609 2610 2611
	rtl_writephy(tp, 0x1f, 0x0000);
	rtl_patchphy(tp, 0x11, 1 << 12);
	rtl_patchphy(tp, 0x19, 1 << 13);
	rtl_patchphy(tp, 0x10, 1 << 15);
2612

2613
	rtl_writephy_batch(tp, phy_reg_init, ARRAY_SIZE(phy_reg_init));
2614 2615
}

2616 2617 2618 2619 2620 2621 2622 2623 2624 2625 2626 2627 2628 2629 2630 2631 2632 2633 2634 2635 2636
static void rtl8105e_hw_phy_config(struct rtl8169_private *tp)
{
	static const struct phy_reg phy_reg_init[] = {
		{ 0x1f, 0x0005 },
		{ 0x1a, 0x0000 },
		{ 0x1f, 0x0000 },

		{ 0x1f, 0x0004 },
		{ 0x1c, 0x0000 },
		{ 0x1f, 0x0000 },

		{ 0x1f, 0x0001 },
		{ 0x15, 0x7701 },
		{ 0x1f, 0x0000 }
	};

	/* Disable ALDPS before ram code */
	rtl_writephy(tp, 0x1f, 0x0000);
	rtl_writephy(tp, 0x18, 0x0310);
	msleep(100);

2637
	rtl_apply_firmware(tp);
2638 2639 2640 2641

	rtl_writephy_batch(tp, phy_reg_init, ARRAY_SIZE(phy_reg_init));
}

2642 2643 2644 2645 2646 2647 2648 2649 2650 2651 2652
static void rtl_hw_phy_config(struct net_device *dev)
{
	struct rtl8169_private *tp = netdev_priv(dev);

	rtl8169_print_mac_version(tp);

	switch (tp->mac_version) {
	case RTL_GIGA_MAC_VER_01:
		break;
	case RTL_GIGA_MAC_VER_02:
	case RTL_GIGA_MAC_VER_03:
2653
		rtl8169s_hw_phy_config(tp);
2654 2655
		break;
	case RTL_GIGA_MAC_VER_04:
2656
		rtl8169sb_hw_phy_config(tp);
2657
		break;
2658
	case RTL_GIGA_MAC_VER_05:
2659
		rtl8169scd_hw_phy_config(tp);
2660
		break;
2661
	case RTL_GIGA_MAC_VER_06:
2662
		rtl8169sce_hw_phy_config(tp);
2663
		break;
2664 2665 2666
	case RTL_GIGA_MAC_VER_07:
	case RTL_GIGA_MAC_VER_08:
	case RTL_GIGA_MAC_VER_09:
2667
		rtl8102e_hw_phy_config(tp);
2668
		break;
2669
	case RTL_GIGA_MAC_VER_11:
2670
		rtl8168bb_hw_phy_config(tp);
2671 2672
		break;
	case RTL_GIGA_MAC_VER_12:
2673
		rtl8168bef_hw_phy_config(tp);
2674 2675
		break;
	case RTL_GIGA_MAC_VER_17:
2676
		rtl8168bef_hw_phy_config(tp);
2677
		break;
F
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2678
	case RTL_GIGA_MAC_VER_18:
2679
		rtl8168cp_1_hw_phy_config(tp);
F
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2680 2681
		break;
	case RTL_GIGA_MAC_VER_19:
2682
		rtl8168c_1_hw_phy_config(tp);
F
Francois Romieu 已提交
2683
		break;
2684
	case RTL_GIGA_MAC_VER_20:
2685
		rtl8168c_2_hw_phy_config(tp);
2686
		break;
F
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2687
	case RTL_GIGA_MAC_VER_21:
2688
		rtl8168c_3_hw_phy_config(tp);
F
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2689
		break;
2690
	case RTL_GIGA_MAC_VER_22:
2691
		rtl8168c_4_hw_phy_config(tp);
2692
		break;
F
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2693
	case RTL_GIGA_MAC_VER_23:
2694
	case RTL_GIGA_MAC_VER_24:
2695
		rtl8168cp_2_hw_phy_config(tp);
F
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2696
		break;
F
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2697
	case RTL_GIGA_MAC_VER_25:
2698
		rtl8168d_1_hw_phy_config(tp);
2699 2700
		break;
	case RTL_GIGA_MAC_VER_26:
2701
		rtl8168d_2_hw_phy_config(tp);
2702 2703
		break;
	case RTL_GIGA_MAC_VER_27:
2704
		rtl8168d_3_hw_phy_config(tp);
F
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2705
		break;
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2706 2707 2708
	case RTL_GIGA_MAC_VER_28:
		rtl8168d_4_hw_phy_config(tp);
		break;
2709 2710 2711 2712
	case RTL_GIGA_MAC_VER_29:
	case RTL_GIGA_MAC_VER_30:
		rtl8105e_hw_phy_config(tp);
		break;
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2713 2714 2715
	case RTL_GIGA_MAC_VER_31:
		/* None. */
		break;
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2716 2717
	case RTL_GIGA_MAC_VER_32:
	case RTL_GIGA_MAC_VER_33:
F
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2718
		rtl8168e_hw_phy_config(tp);
H
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2719
		break;
F
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2720

2721 2722 2723 2724 2725
	default:
		break;
	}
}

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2726 2727 2728 2729 2730 2731 2732 2733
static void rtl8169_phy_timer(unsigned long __opaque)
{
	struct net_device *dev = (struct net_device *)__opaque;
	struct rtl8169_private *tp = netdev_priv(dev);
	struct timer_list *timer = &tp->timer;
	void __iomem *ioaddr = tp->mmio_addr;
	unsigned long timeout = RTL8169_PHY_TIMEOUT;

2734
	assert(tp->mac_version > RTL_GIGA_MAC_VER_01);
L
Linus Torvalds 已提交
2735 2736 2737

	spin_lock_irq(&tp->lock);

2738
	if (tp->phy_reset_pending(tp)) {
2739
		/*
L
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2740 2741 2742 2743 2744 2745 2746 2747 2748 2749
		 * A busy loop could burn quite a few cycles on nowadays CPU.
		 * Let's delay the execution of the timer for a few ticks.
		 */
		timeout = HZ/10;
		goto out_mod_timer;
	}

	if (tp->link_ok(ioaddr))
		goto out_unlock;

2750
	netif_warn(tp, link, dev, "PHY reset until link up\n");
L
Linus Torvalds 已提交
2751

2752
	tp->phy_reset_enable(tp);
L
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2753 2754 2755 2756 2757 2758 2759 2760 2761 2762 2763 2764 2765 2766 2767 2768 2769 2770 2771

out_mod_timer:
	mod_timer(timer, jiffies + timeout);
out_unlock:
	spin_unlock_irq(&tp->lock);
}

#ifdef CONFIG_NET_POLL_CONTROLLER
/*
 * Polling 'interrupt' - used by things like netconsole to send skbs
 * without having to re-enable interrupts. It's not called while
 * the interrupt routine is executing.
 */
static void rtl8169_netpoll(struct net_device *dev)
{
	struct rtl8169_private *tp = netdev_priv(dev);
	struct pci_dev *pdev = tp->pci_dev;

	disable_irq(pdev->irq);
2772
	rtl8169_interrupt(pdev->irq, dev);
L
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2773 2774 2775 2776 2777 2778 2779 2780 2781
	enable_irq(pdev->irq);
}
#endif

static void rtl8169_release_board(struct pci_dev *pdev, struct net_device *dev,
				  void __iomem *ioaddr)
{
	iounmap(ioaddr);
	pci_release_regions(pdev);
2782
	pci_clear_mwi(pdev);
L
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2783 2784 2785 2786
	pci_disable_device(pdev);
	free_netdev(dev);
}

2787 2788 2789
static void rtl8169_phy_reset(struct net_device *dev,
			      struct rtl8169_private *tp)
{
F
Francois Romieu 已提交
2790
	unsigned int i;
2791

2792
	tp->phy_reset_enable(tp);
2793
	for (i = 0; i < 100; i++) {
2794
		if (!tp->phy_reset_pending(tp))
2795 2796 2797
			return;
		msleep(1);
	}
2798
	netif_err(tp, link, dev, "PHY reset failed\n");
2799 2800
}

2801 2802 2803 2804
static void rtl8169_init_phy(struct net_device *dev, struct rtl8169_private *tp)
{
	void __iomem *ioaddr = tp->mmio_addr;

2805
	rtl_hw_phy_config(dev);
2806

2807 2808 2809 2810
	if (tp->mac_version <= RTL_GIGA_MAC_VER_06) {
		dprintk("Set MAC Reg C+CR Offset 0x82h = 0x01h\n");
		RTL_W8(0x82, 0x01);
	}
2811

2812 2813 2814 2815
	pci_write_config_byte(tp->pci_dev, PCI_LATENCY_TIMER, 0x40);

	if (tp->mac_version <= RTL_GIGA_MAC_VER_06)
		pci_write_config_byte(tp->pci_dev, PCI_CACHE_LINE_SIZE, 0x08);
2816

2817
	if (tp->mac_version == RTL_GIGA_MAC_VER_02) {
2818 2819 2820
		dprintk("Set MAC Reg C+CR Offset 0x82h = 0x01h\n");
		RTL_W8(0x82, 0x01);
		dprintk("Set PHY Reg 0x0bh = 0x00h\n");
2821
		rtl_writephy(tp, 0x0b, 0x0000); //w 0x0b 15 0 0
2822 2823
	}

2824 2825
	rtl8169_phy_reset(dev, tp);

2826
	rtl8169_set_speed(dev, AUTONEG_ENABLE, SPEED_1000, DUPLEX_FULL,
F
Francois Romieu 已提交
2827 2828 2829 2830 2831
			  ADVERTISED_10baseT_Half | ADVERTISED_10baseT_Full |
			  ADVERTISED_100baseT_Half | ADVERTISED_100baseT_Full |
			  (tp->mii.supports_gmii ?
			   ADVERTISED_1000baseT_Half |
			   ADVERTISED_1000baseT_Full : 0));
2832

2833 2834
	if (RTL_R8(PHYstatus) & TBI_Enable)
		netif_info(tp, link, dev, "TBI auto-negotiating\n");
2835 2836
}

2837 2838 2839 2840 2841 2842 2843 2844 2845 2846 2847 2848
static void rtl_rar_set(struct rtl8169_private *tp, u8 *addr)
{
	void __iomem *ioaddr = tp->mmio_addr;
	u32 high;
	u32 low;

	low  = addr[0] | (addr[1] << 8) | (addr[2] << 16) | (addr[3] << 24);
	high = addr[4] | (addr[5] << 8);

	spin_lock_irq(&tp->lock);

	RTL_W8(Cfg9346, Cfg9346_Unlock);
2849

2850
	RTL_W32(MAC4, high);
2851 2852
	RTL_R32(MAC4);

2853
	RTL_W32(MAC0, low);
2854 2855
	RTL_R32(MAC0);

2856 2857 2858 2859 2860 2861 2862 2863 2864 2865 2866 2867 2868 2869 2870 2871 2872 2873 2874 2875
	RTL_W8(Cfg9346, Cfg9346_Lock);

	spin_unlock_irq(&tp->lock);
}

static int rtl_set_mac_address(struct net_device *dev, void *p)
{
	struct rtl8169_private *tp = netdev_priv(dev);
	struct sockaddr *addr = p;

	if (!is_valid_ether_addr(addr->sa_data))
		return -EADDRNOTAVAIL;

	memcpy(dev->dev_addr, addr->sa_data, dev->addr_len);

	rtl_rar_set(tp, dev->dev_addr);

	return 0;
}

2876 2877 2878 2879 2880
static int rtl8169_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
{
	struct rtl8169_private *tp = netdev_priv(dev);
	struct mii_ioctl_data *data = if_mii(ifr);

F
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2881 2882
	return netif_running(dev) ? tp->do_ioctl(tp, data, cmd) : -ENODEV;
}
2883

F
Francois Romieu 已提交
2884 2885
static int rtl_xmii_ioctl(struct rtl8169_private *tp,
			  struct mii_ioctl_data *data, int cmd)
F
Francois Romieu 已提交
2886
{
2887 2888 2889 2890 2891 2892
	switch (cmd) {
	case SIOCGMIIPHY:
		data->phy_id = 32; /* Internal PHY */
		return 0;

	case SIOCGMIIREG:
2893
		data->val_out = rtl_readphy(tp, data->reg_num & 0x1f);
2894 2895 2896
		return 0;

	case SIOCSMIIREG:
2897
		rtl_writephy(tp, data->reg_num & 0x1f, data->val_in);
2898 2899 2900 2901 2902
		return 0;
	}
	return -EOPNOTSUPP;
}

F
Francois Romieu 已提交
2903 2904 2905 2906 2907
static int rtl_tbi_ioctl(struct rtl8169_private *tp, struct mii_ioctl_data *data, int cmd)
{
	return -EOPNOTSUPP;
}

2908 2909 2910 2911 2912 2913
static const struct rtl_cfg_info {
	void (*hw_start)(struct net_device *);
	unsigned int region;
	unsigned int align;
	u16 intr_event;
	u16 napi_event;
2914
	unsigned features;
2915
	u8 default_ver;
2916 2917 2918 2919
} rtl_cfg_infos [] = {
	[RTL_CFG_0] = {
		.hw_start	= rtl_hw_start_8169,
		.region		= 1,
2920
		.align		= 0,
2921 2922
		.intr_event	= SYSErr | LinkChg | RxOverflow |
				  RxFIFOOver | TxErr | TxOK | RxOK | RxErr,
F
Francois Romieu 已提交
2923
		.napi_event	= RxFIFOOver | TxErr | TxOK | RxOK | RxOverflow,
2924 2925
		.features	= RTL_FEATURE_GMII,
		.default_ver	= RTL_GIGA_MAC_VER_01,
2926 2927 2928 2929 2930
	},
	[RTL_CFG_1] = {
		.hw_start	= rtl_hw_start_8168,
		.region		= 2,
		.align		= 8,
2931
		.intr_event	= SYSErr | LinkChg | RxOverflow |
2932
				  TxErr | TxOK | RxOK | RxErr,
F
Francois Romieu 已提交
2933
		.napi_event	= TxErr | TxOK | RxOK | RxOverflow,
2934 2935
		.features	= RTL_FEATURE_GMII | RTL_FEATURE_MSI,
		.default_ver	= RTL_GIGA_MAC_VER_11,
2936 2937 2938 2939 2940 2941 2942
	},
	[RTL_CFG_2] = {
		.hw_start	= rtl_hw_start_8101,
		.region		= 2,
		.align		= 8,
		.intr_event	= SYSErr | LinkChg | RxOverflow | PCSTimeout |
				  RxFIFOOver | TxErr | TxOK | RxOK | RxErr,
F
Francois Romieu 已提交
2943
		.napi_event	= RxFIFOOver | TxErr | TxOK | RxOK | RxOverflow,
2944 2945
		.features	= RTL_FEATURE_MSI,
		.default_ver	= RTL_GIGA_MAC_VER_13,
2946 2947 2948
	}
};

F
Francois Romieu 已提交
2949 2950 2951 2952 2953 2954 2955 2956
/* Cfg9346_Unlock assumed. */
static unsigned rtl_try_msi(struct pci_dev *pdev, void __iomem *ioaddr,
			    const struct rtl_cfg_info *cfg)
{
	unsigned msi = 0;
	u8 cfg2;

	cfg2 = RTL_R8(Config2) & ~MSIEnable;
2957
	if (cfg->features & RTL_FEATURE_MSI) {
F
Francois Romieu 已提交
2958 2959 2960 2961 2962 2963 2964 2965 2966 2967 2968 2969 2970 2971 2972 2973 2974 2975 2976
		if (pci_enable_msi(pdev)) {
			dev_info(&pdev->dev, "no MSI. Back to INTx.\n");
		} else {
			cfg2 |= MSIEnable;
			msi = RTL_FEATURE_MSI;
		}
	}
	RTL_W8(Config2, cfg2);
	return msi;
}

static void rtl_disable_msi(struct pci_dev *pdev, struct rtl8169_private *tp)
{
	if (tp->features & RTL_FEATURE_MSI) {
		pci_disable_msi(pdev);
		tp->features &= ~RTL_FEATURE_MSI;
	}
}

F
Francois Romieu 已提交
2977 2978 2979 2980
static const struct net_device_ops rtl8169_netdev_ops = {
	.ndo_open		= rtl8169_open,
	.ndo_stop		= rtl8169_close,
	.ndo_get_stats		= rtl8169_get_stats,
2981
	.ndo_start_xmit		= rtl8169_start_xmit,
F
Francois Romieu 已提交
2982 2983 2984
	.ndo_tx_timeout		= rtl8169_tx_timeout,
	.ndo_validate_addr	= eth_validate_addr,
	.ndo_change_mtu		= rtl8169_change_mtu,
2985 2986
	.ndo_fix_features	= rtl8169_fix_features,
	.ndo_set_features	= rtl8169_set_features,
F
Francois Romieu 已提交
2987 2988 2989 2990 2991 2992 2993 2994 2995
	.ndo_set_mac_address	= rtl_set_mac_address,
	.ndo_do_ioctl		= rtl8169_ioctl,
	.ndo_set_multicast_list	= rtl_set_rx_mode,
#ifdef CONFIG_NET_POLL_CONTROLLER
	.ndo_poll_controller	= rtl8169_netpoll,
#endif

};

2996 2997 2998 2999 3000 3001 3002 3003 3004
static void __devinit rtl_init_mdio_ops(struct rtl8169_private *tp)
{
	struct mdio_ops *ops = &tp->mdio_ops;

	switch (tp->mac_version) {
	case RTL_GIGA_MAC_VER_27:
		ops->write	= r8168dp_1_mdio_write;
		ops->read	= r8168dp_1_mdio_read;
		break;
F
françois romieu 已提交
3005
	case RTL_GIGA_MAC_VER_28:
3006
	case RTL_GIGA_MAC_VER_31:
F
françois romieu 已提交
3007 3008 3009
		ops->write	= r8168dp_2_mdio_write;
		ops->read	= r8168dp_2_mdio_read;
		break;
3010 3011 3012 3013 3014 3015 3016
	default:
		ops->write	= r8169_mdio_write;
		ops->read	= r8169_mdio_read;
		break;
	}
}

F
françois romieu 已提交
3017 3018 3019 3020 3021 3022 3023 3024 3025 3026 3027 3028 3029 3030 3031 3032 3033 3034 3035 3036 3037 3038 3039 3040 3041 3042 3043 3044 3045 3046 3047
static void r810x_phy_power_down(struct rtl8169_private *tp)
{
	rtl_writephy(tp, 0x1f, 0x0000);
	rtl_writephy(tp, MII_BMCR, BMCR_PDOWN);
}

static void r810x_phy_power_up(struct rtl8169_private *tp)
{
	rtl_writephy(tp, 0x1f, 0x0000);
	rtl_writephy(tp, MII_BMCR, BMCR_ANENABLE);
}

static void r810x_pll_power_down(struct rtl8169_private *tp)
{
	if (__rtl8169_get_wol(tp) & WAKE_ANY) {
		rtl_writephy(tp, 0x1f, 0x0000);
		rtl_writephy(tp, MII_BMCR, 0x0000);
		return;
	}

	r810x_phy_power_down(tp);
}

static void r810x_pll_power_up(struct rtl8169_private *tp)
{
	r810x_phy_power_up(tp);
}

static void r8168_phy_power_up(struct rtl8169_private *tp)
{
	rtl_writephy(tp, 0x1f, 0x0000);
H
hayeswang 已提交
3048 3049 3050 3051 3052 3053 3054 3055 3056 3057 3058 3059 3060 3061 3062 3063 3064 3065 3066 3067 3068
	switch (tp->mac_version) {
	case RTL_GIGA_MAC_VER_11:
	case RTL_GIGA_MAC_VER_12:
	case RTL_GIGA_MAC_VER_17:
	case RTL_GIGA_MAC_VER_18:
	case RTL_GIGA_MAC_VER_19:
	case RTL_GIGA_MAC_VER_20:
	case RTL_GIGA_MAC_VER_21:
	case RTL_GIGA_MAC_VER_22:
	case RTL_GIGA_MAC_VER_23:
	case RTL_GIGA_MAC_VER_24:
	case RTL_GIGA_MAC_VER_25:
	case RTL_GIGA_MAC_VER_26:
	case RTL_GIGA_MAC_VER_27:
	case RTL_GIGA_MAC_VER_28:
	case RTL_GIGA_MAC_VER_31:
		rtl_writephy(tp, 0x0e, 0x0000);
		break;
	default:
		break;
	}
F
françois romieu 已提交
3069 3070 3071 3072 3073 3074
	rtl_writephy(tp, MII_BMCR, BMCR_ANENABLE);
}

static void r8168_phy_power_down(struct rtl8169_private *tp)
{
	rtl_writephy(tp, 0x1f, 0x0000);
H
hayeswang 已提交
3075 3076 3077 3078 3079 3080 3081 3082 3083 3084 3085 3086 3087 3088 3089 3090 3091 3092 3093 3094 3095 3096 3097 3098 3099 3100
	switch (tp->mac_version) {
	case RTL_GIGA_MAC_VER_32:
	case RTL_GIGA_MAC_VER_33:
		rtl_writephy(tp, MII_BMCR, BMCR_ANENABLE | BMCR_PDOWN);
		break;

	case RTL_GIGA_MAC_VER_11:
	case RTL_GIGA_MAC_VER_12:
	case RTL_GIGA_MAC_VER_17:
	case RTL_GIGA_MAC_VER_18:
	case RTL_GIGA_MAC_VER_19:
	case RTL_GIGA_MAC_VER_20:
	case RTL_GIGA_MAC_VER_21:
	case RTL_GIGA_MAC_VER_22:
	case RTL_GIGA_MAC_VER_23:
	case RTL_GIGA_MAC_VER_24:
	case RTL_GIGA_MAC_VER_25:
	case RTL_GIGA_MAC_VER_26:
	case RTL_GIGA_MAC_VER_27:
	case RTL_GIGA_MAC_VER_28:
	case RTL_GIGA_MAC_VER_31:
		rtl_writephy(tp, 0x0e, 0x0200);
	default:
		rtl_writephy(tp, MII_BMCR, BMCR_PDOWN);
		break;
	}
F
françois romieu 已提交
3101 3102 3103 3104 3105 3106
}

static void r8168_pll_power_down(struct rtl8169_private *tp)
{
	void __iomem *ioaddr = tp->mmio_addr;

F
Francois Romieu 已提交
3107 3108 3109
	if ((tp->mac_version == RTL_GIGA_MAC_VER_27 ||
	     tp->mac_version == RTL_GIGA_MAC_VER_28 ||
	     tp->mac_version == RTL_GIGA_MAC_VER_31) &&
3110
	    r8168dp_check_dash(tp)) {
F
françois romieu 已提交
3111
		return;
3112
	}
F
françois romieu 已提交
3113

F
Francois Romieu 已提交
3114 3115
	if ((tp->mac_version == RTL_GIGA_MAC_VER_23 ||
	     tp->mac_version == RTL_GIGA_MAC_VER_24) &&
F
françois romieu 已提交
3116 3117 3118 3119
	    (RTL_R16(CPlusCmd) & ASF)) {
		return;
	}

H
hayeswang 已提交
3120 3121 3122 3123
	if (tp->mac_version == RTL_GIGA_MAC_VER_32 ||
	    tp->mac_version == RTL_GIGA_MAC_VER_33)
		rtl_ephy_write(ioaddr, 0x19, 0xff64);

F
françois romieu 已提交
3124 3125 3126 3127 3128 3129 3130 3131 3132 3133 3134 3135 3136 3137
	if (__rtl8169_get_wol(tp) & WAKE_ANY) {
		rtl_writephy(tp, 0x1f, 0x0000);
		rtl_writephy(tp, MII_BMCR, 0x0000);

		RTL_W32(RxConfig, RTL_R32(RxConfig) |
			AcceptBroadcast | AcceptMulticast | AcceptMyPhys);
		return;
	}

	r8168_phy_power_down(tp);

	switch (tp->mac_version) {
	case RTL_GIGA_MAC_VER_25:
	case RTL_GIGA_MAC_VER_26:
3138 3139
	case RTL_GIGA_MAC_VER_27:
	case RTL_GIGA_MAC_VER_28:
3140
	case RTL_GIGA_MAC_VER_31:
H
hayeswang 已提交
3141 3142
	case RTL_GIGA_MAC_VER_32:
	case RTL_GIGA_MAC_VER_33:
F
françois romieu 已提交
3143 3144 3145 3146 3147 3148 3149 3150 3151
		RTL_W8(PMCH, RTL_R8(PMCH) & ~0x80);
		break;
	}
}

static void r8168_pll_power_up(struct rtl8169_private *tp)
{
	void __iomem *ioaddr = tp->mmio_addr;

F
Francois Romieu 已提交
3152 3153 3154
	if ((tp->mac_version == RTL_GIGA_MAC_VER_27 ||
	     tp->mac_version == RTL_GIGA_MAC_VER_28 ||
	     tp->mac_version == RTL_GIGA_MAC_VER_31) &&
3155
	    r8168dp_check_dash(tp)) {
F
françois romieu 已提交
3156
		return;
3157
	}
F
françois romieu 已提交
3158 3159 3160 3161

	switch (tp->mac_version) {
	case RTL_GIGA_MAC_VER_25:
	case RTL_GIGA_MAC_VER_26:
3162 3163
	case RTL_GIGA_MAC_VER_27:
	case RTL_GIGA_MAC_VER_28:
3164
	case RTL_GIGA_MAC_VER_31:
H
hayeswang 已提交
3165 3166
	case RTL_GIGA_MAC_VER_32:
	case RTL_GIGA_MAC_VER_33:
F
françois romieu 已提交
3167 3168 3169 3170 3171 3172 3173 3174 3175 3176 3177 3178 3179 3180 3181 3182 3183 3184 3185 3186 3187 3188 3189 3190 3191 3192 3193 3194 3195 3196 3197 3198 3199 3200
		RTL_W8(PMCH, RTL_R8(PMCH) | 0x80);
		break;
	}

	r8168_phy_power_up(tp);
}

static void rtl_pll_power_op(struct rtl8169_private *tp,
			     void (*op)(struct rtl8169_private *))
{
	if (op)
		op(tp);
}

static void rtl_pll_power_down(struct rtl8169_private *tp)
{
	rtl_pll_power_op(tp, tp->pll_power_ops.down);
}

static void rtl_pll_power_up(struct rtl8169_private *tp)
{
	rtl_pll_power_op(tp, tp->pll_power_ops.up);
}

static void __devinit rtl_init_pll_power_ops(struct rtl8169_private *tp)
{
	struct pll_power_ops *ops = &tp->pll_power_ops;

	switch (tp->mac_version) {
	case RTL_GIGA_MAC_VER_07:
	case RTL_GIGA_MAC_VER_08:
	case RTL_GIGA_MAC_VER_09:
	case RTL_GIGA_MAC_VER_10:
	case RTL_GIGA_MAC_VER_16:
3201 3202
	case RTL_GIGA_MAC_VER_29:
	case RTL_GIGA_MAC_VER_30:
F
françois romieu 已提交
3203 3204 3205 3206 3207 3208 3209 3210 3211 3212 3213 3214 3215 3216 3217 3218 3219
		ops->down	= r810x_pll_power_down;
		ops->up		= r810x_pll_power_up;
		break;

	case RTL_GIGA_MAC_VER_11:
	case RTL_GIGA_MAC_VER_12:
	case RTL_GIGA_MAC_VER_17:
	case RTL_GIGA_MAC_VER_18:
	case RTL_GIGA_MAC_VER_19:
	case RTL_GIGA_MAC_VER_20:
	case RTL_GIGA_MAC_VER_21:
	case RTL_GIGA_MAC_VER_22:
	case RTL_GIGA_MAC_VER_23:
	case RTL_GIGA_MAC_VER_24:
	case RTL_GIGA_MAC_VER_25:
	case RTL_GIGA_MAC_VER_26:
	case RTL_GIGA_MAC_VER_27:
F
françois romieu 已提交
3220
	case RTL_GIGA_MAC_VER_28:
3221
	case RTL_GIGA_MAC_VER_31:
H
hayeswang 已提交
3222 3223
	case RTL_GIGA_MAC_VER_32:
	case RTL_GIGA_MAC_VER_33:
F
françois romieu 已提交
3224 3225 3226 3227 3228 3229 3230 3231 3232 3233 3234
		ops->down	= r8168_pll_power_down;
		ops->up		= r8168_pll_power_up;
		break;

	default:
		ops->down	= NULL;
		ops->up		= NULL;
		break;
	}
}

3235 3236 3237 3238 3239 3240 3241 3242 3243 3244 3245 3246 3247 3248 3249 3250
static void rtl_hw_reset(struct rtl8169_private *tp)
{
	void __iomem *ioaddr = tp->mmio_addr;
	int i;

	/* Soft reset the chip. */
	RTL_W8(ChipCmd, CmdReset);

	/* Check that the chip has finished the reset. */
	for (i = 0; i < 100; i++) {
		if ((RTL_R8(ChipCmd) & CmdReset) == 0)
			break;
		msleep_interruptible(1);
	}
}

L
Linus Torvalds 已提交
3251
static int __devinit
3252
rtl8169_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
L
Linus Torvalds 已提交
3253
{
3254 3255
	const struct rtl_cfg_info *cfg = rtl_cfg_infos + ent->driver_data;
	const unsigned int region = cfg->region;
L
Linus Torvalds 已提交
3256
	struct rtl8169_private *tp;
3257
	struct mii_if_info *mii;
3258 3259
	struct net_device *dev;
	void __iomem *ioaddr;
F
Francois Romieu 已提交
3260
	int chipset, i;
F
Francois Romieu 已提交
3261
	int rc;
L
Linus Torvalds 已提交
3262

3263 3264 3265 3266
	if (netif_msg_drv(&debug)) {
		printk(KERN_INFO "%s Gigabit Ethernet driver %s loaded\n",
		       MODULENAME, RTL8169_VERSION);
	}
L
Linus Torvalds 已提交
3267 3268

	dev = alloc_etherdev(sizeof (*tp));
3269
	if (!dev) {
3270
		if (netif_msg_drv(&debug))
3271
			dev_err(&pdev->dev, "unable to alloc new ethernet\n");
3272 3273
		rc = -ENOMEM;
		goto out;
L
Linus Torvalds 已提交
3274 3275 3276
	}

	SET_NETDEV_DEV(dev, &pdev->dev);
F
Francois Romieu 已提交
3277
	dev->netdev_ops = &rtl8169_netdev_ops;
L
Linus Torvalds 已提交
3278
	tp = netdev_priv(dev);
D
David Howells 已提交
3279
	tp->dev = dev;
3280
	tp->pci_dev = pdev;
3281
	tp->msg_enable = netif_msg_init(debug.msg_enable, R8169_MSG_DEFAULT);
L
Linus Torvalds 已提交
3282

3283 3284 3285 3286 3287 3288 3289 3290
	mii = &tp->mii;
	mii->dev = dev;
	mii->mdio_read = rtl_mdio_read;
	mii->mdio_write = rtl_mdio_write;
	mii->phy_id_mask = 0x1f;
	mii->reg_num_mask = 0x1f;
	mii->supports_gmii = !!(cfg->features & RTL_FEATURE_GMII);

S
Stanislaw Gruszka 已提交
3291 3292 3293 3294 3295
	/* disable ASPM completely as that cause random device stop working
	 * problems as well as full system hangs for some PCIe devices users */
	pci_disable_link_state(pdev, PCIE_LINK_STATE_L0S | PCIE_LINK_STATE_L1 |
				     PCIE_LINK_STATE_CLKPM);

L
Linus Torvalds 已提交
3296 3297
	/* enable device (incl. PCI PM wakeup and hotplug setup) */
	rc = pci_enable_device(pdev);
3298
	if (rc < 0) {
3299
		netif_err(tp, probe, dev, "enable failure\n");
3300
		goto err_out_free_dev_1;
L
Linus Torvalds 已提交
3301 3302
	}

3303 3304
	if (pci_set_mwi(pdev) < 0)
		netif_info(tp, probe, dev, "Mem-Wr-Inval unavailable\n");
L
Linus Torvalds 已提交
3305 3306

	/* make sure PCI base addr 1 is MMIO */
3307
	if (!(pci_resource_flags(pdev, region) & IORESOURCE_MEM)) {
3308 3309 3310
		netif_err(tp, probe, dev,
			  "region #%d not an MMIO resource, aborting\n",
			  region);
L
Linus Torvalds 已提交
3311
		rc = -ENODEV;
3312
		goto err_out_mwi_2;
L
Linus Torvalds 已提交
3313
	}
3314

L
Linus Torvalds 已提交
3315
	/* check for weird/broken PCI region reporting */
3316
	if (pci_resource_len(pdev, region) < R8169_REGS_SIZE) {
3317 3318
		netif_err(tp, probe, dev,
			  "Invalid PCI region size(s), aborting\n");
L
Linus Torvalds 已提交
3319
		rc = -ENODEV;
3320
		goto err_out_mwi_2;
L
Linus Torvalds 已提交
3321 3322 3323
	}

	rc = pci_request_regions(pdev, MODULENAME);
3324
	if (rc < 0) {
3325
		netif_err(tp, probe, dev, "could not request regions\n");
3326
		goto err_out_mwi_2;
L
Linus Torvalds 已提交
3327 3328
	}

3329
	tp->cp_cmd = RxChkSum;
L
Linus Torvalds 已提交
3330 3331

	if ((sizeof(dma_addr_t) > 4) &&
3332
	    !pci_set_dma_mask(pdev, DMA_BIT_MASK(64)) && use_dac) {
L
Linus Torvalds 已提交
3333 3334 3335
		tp->cp_cmd |= PCIDAC;
		dev->features |= NETIF_F_HIGHDMA;
	} else {
3336
		rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
L
Linus Torvalds 已提交
3337
		if (rc < 0) {
3338
			netif_err(tp, probe, dev, "DMA configuration failed\n");
3339
			goto err_out_free_res_3;
L
Linus Torvalds 已提交
3340 3341 3342 3343
		}
	}

	/* ioremap MMIO region */
3344
	ioaddr = ioremap(pci_resource_start(pdev, region), R8169_REGS_SIZE);
3345
	if (!ioaddr) {
3346
		netif_err(tp, probe, dev, "cannot remap MMIO, aborting\n");
L
Linus Torvalds 已提交
3347
		rc = -EIO;
3348
		goto err_out_free_res_3;
L
Linus Torvalds 已提交
3349
	}
3350
	tp->mmio_addr = ioaddr;
L
Linus Torvalds 已提交
3351

3352 3353 3354 3355
	tp->pcie_cap = pci_find_capability(pdev, PCI_CAP_ID_EXP);
	if (!tp->pcie_cap)
		netif_info(tp, probe, dev, "no PCI Express capability\n");

3356
	RTL_W16(IntrMask, 0x0000);
L
Linus Torvalds 已提交
3357

3358
	rtl_hw_reset(tp);
L
Linus Torvalds 已提交
3359

3360 3361
	RTL_W16(IntrStatus, 0xffff);

3362 3363
	pci_set_master(pdev);

L
Linus Torvalds 已提交
3364
	/* Identify chip attached to board */
3365
	rtl8169_get_mac_version(tp, dev, cfg->default_ver);
L
Linus Torvalds 已提交
3366

3367 3368 3369 3370 3371 3372 3373
	/*
	 * Pretend we are using VLANs; This bypasses a nasty bug where
	 * Interrupts stop flowing on high load on 8110SCd controllers.
	 */
	if (tp->mac_version == RTL_GIGA_MAC_VER_05)
		tp->cp_cmd |= RxVlan;

3374
	rtl_init_mdio_ops(tp);
F
françois romieu 已提交
3375
	rtl_init_pll_power_ops(tp);
3376

L
Linus Torvalds 已提交
3377 3378
	rtl8169_print_mac_version(tp);

3379 3380
	chipset = tp->mac_version;
	tp->txd_version = rtl_chip_infos[chipset].txd_version;
L
Linus Torvalds 已提交
3381

3382 3383 3384
	RTL_W8(Cfg9346, Cfg9346_Unlock);
	RTL_W8(Config1, RTL_R8(Config1) | PMEnable);
	RTL_W8(Config5, RTL_R8(Config5) & PMEStatus);
B
Bruno Prémont 已提交
3385 3386 3387 3388
	if ((RTL_R8(Config3) & (LinkUp | MagicPacket)) != 0)
		tp->features |= RTL_FEATURE_WOL;
	if ((RTL_R8(Config5) & (UWF | BWF | MWF)) != 0)
		tp->features |= RTL_FEATURE_WOL;
F
Francois Romieu 已提交
3389
	tp->features |= rtl_try_msi(pdev, ioaddr, cfg);
3390 3391
	RTL_W8(Cfg9346, Cfg9346_Lock);

3392 3393
	if ((tp->mac_version <= RTL_GIGA_MAC_VER_06) &&
	    (RTL_R8(PHYstatus) & TBI_Enable)) {
L
Linus Torvalds 已提交
3394 3395 3396 3397 3398
		tp->set_speed = rtl8169_set_speed_tbi;
		tp->get_settings = rtl8169_gset_tbi;
		tp->phy_reset_enable = rtl8169_tbi_reset_enable;
		tp->phy_reset_pending = rtl8169_tbi_reset_pending;
		tp->link_ok = rtl8169_tbi_link_ok;
F
Francois Romieu 已提交
3399
		tp->do_ioctl = rtl_tbi_ioctl;
L
Linus Torvalds 已提交
3400 3401 3402 3403 3404 3405
	} else {
		tp->set_speed = rtl8169_set_speed_xmii;
		tp->get_settings = rtl8169_gset_xmii;
		tp->phy_reset_enable = rtl8169_xmii_reset_enable;
		tp->phy_reset_pending = rtl8169_xmii_reset_pending;
		tp->link_ok = rtl8169_xmii_link_ok;
F
Francois Romieu 已提交
3406
		tp->do_ioctl = rtl_xmii_ioctl;
L
Linus Torvalds 已提交
3407 3408
	}

F
Francois Romieu 已提交
3409 3410
	spin_lock_init(&tp->lock);

3411
	/* Get MAC address */
L
Linus Torvalds 已提交
3412 3413
	for (i = 0; i < MAC_ADDR_LEN; i++)
		dev->dev_addr[i] = RTL_R8(MAC0 + i);
3414
	memcpy(dev->perm_addr, dev->dev_addr, dev->addr_len);
L
Linus Torvalds 已提交
3415 3416 3417 3418 3419 3420

	SET_ETHTOOL_OPS(dev, &rtl8169_ethtool_ops);
	dev->watchdog_timeo = RTL8169_TX_TIMEOUT;
	dev->irq = pdev->irq;
	dev->base_addr = (unsigned long) ioaddr;

3421
	netif_napi_add(dev, &tp->napi, rtl8169_poll, R8169_NAPI_WEIGHT);
L
Linus Torvalds 已提交
3422

3423 3424 3425 3426 3427 3428 3429 3430 3431 3432 3433 3434 3435
	/* don't enable SG, IP_CSUM and TSO by default - it might not work
	 * properly for all devices */
	dev->features |= NETIF_F_RXCSUM |
		NETIF_F_HW_VLAN_TX | NETIF_F_HW_VLAN_RX;

	dev->hw_features = NETIF_F_SG | NETIF_F_IP_CSUM | NETIF_F_TSO |
		NETIF_F_RXCSUM | NETIF_F_HW_VLAN_TX | NETIF_F_HW_VLAN_RX;
	dev->vlan_features = NETIF_F_SG | NETIF_F_IP_CSUM | NETIF_F_TSO |
		NETIF_F_HIGHDMA;

	if (tp->mac_version == RTL_GIGA_MAC_VER_05)
		/* 8110SCd requires hardware Rx VLAN - disallow toggling */
		dev->hw_features &= ~NETIF_F_HW_VLAN_RX;
L
Linus Torvalds 已提交
3436 3437

	tp->intr_mask = 0xffff;
3438 3439 3440
	tp->hw_start = cfg->hw_start;
	tp->intr_event = cfg->intr_event;
	tp->napi_event = cfg->napi_event;
L
Linus Torvalds 已提交
3441

3442 3443 3444 3445
	init_timer(&tp->timer);
	tp->timer.data = (unsigned long) dev;
	tp->timer.function = rtl8169_phy_timer;

3446 3447
	tp->fw = RTL_FIRMWARE_UNKNOWN;

L
Linus Torvalds 已提交
3448
	rc = register_netdev(dev);
3449
	if (rc < 0)
3450
		goto err_out_msi_4;
L
Linus Torvalds 已提交
3451 3452 3453

	pci_set_drvdata(pdev, dev);

3454
	netif_info(tp, probe, dev, "%s at 0x%lx, %pM, XID %08x IRQ %d\n",
3455
		   rtl_chip_infos[chipset].name, dev->base_addr, dev->dev_addr,
3456
		   (u32)(RTL_R32(TxConfig) & 0x9cf0f8ff), dev->irq);
L
Linus Torvalds 已提交
3457

F
Francois Romieu 已提交
3458 3459 3460
	if (tp->mac_version == RTL_GIGA_MAC_VER_27 ||
	    tp->mac_version == RTL_GIGA_MAC_VER_28 ||
	    tp->mac_version == RTL_GIGA_MAC_VER_31) {
F
françois romieu 已提交
3461
		rtl8168_driver_start(tp);
F
françois romieu 已提交
3462
	}
F
françois romieu 已提交
3463

B
Bruno Prémont 已提交
3464
	device_set_wakeup_enable(&pdev->dev, tp->features & RTL_FEATURE_WOL);
L
Linus Torvalds 已提交
3465

3466 3467
	if (pci_dev_run_wake(pdev))
		pm_runtime_put_noidle(&pdev->dev);
3468

3469 3470
	netif_carrier_off(dev);

3471 3472
out:
	return rc;
L
Linus Torvalds 已提交
3473

3474
err_out_msi_4:
F
Francois Romieu 已提交
3475
	rtl_disable_msi(pdev, tp);
3476
	iounmap(ioaddr);
3477
err_out_free_res_3:
3478
	pci_release_regions(pdev);
3479
err_out_mwi_2:
3480 3481 3482 3483 3484
	pci_clear_mwi(pdev);
	pci_disable_device(pdev);
err_out_free_dev_1:
	free_netdev(dev);
	goto out;
L
Linus Torvalds 已提交
3485 3486
}

F
Francois Romieu 已提交
3487
static void __devexit rtl8169_remove_one(struct pci_dev *pdev)
L
Linus Torvalds 已提交
3488 3489 3490 3491
{
	struct net_device *dev = pci_get_drvdata(pdev);
	struct rtl8169_private *tp = netdev_priv(dev);

F
Francois Romieu 已提交
3492 3493 3494
	if (tp->mac_version == RTL_GIGA_MAC_VER_27 ||
	    tp->mac_version == RTL_GIGA_MAC_VER_28 ||
	    tp->mac_version == RTL_GIGA_MAC_VER_31) {
F
françois romieu 已提交
3495
		rtl8168_driver_stop(tp);
F
françois romieu 已提交
3496
	}
F
françois romieu 已提交
3497

3498
	cancel_delayed_work_sync(&tp->task);
3499

L
Linus Torvalds 已提交
3500
	unregister_netdev(dev);
3501

3502 3503
	rtl_release_firmware(tp);

3504 3505
	if (pci_dev_run_wake(pdev))
		pm_runtime_get_noresume(&pdev->dev);
3506

3507 3508 3509
	/* restore original MAC address */
	rtl_rar_set(tp, dev->perm_addr);

F
Francois Romieu 已提交
3510
	rtl_disable_msi(pdev, tp);
L
Linus Torvalds 已提交
3511 3512 3513 3514
	rtl8169_release_board(pdev, dev, tp->mmio_addr);
	pci_set_drvdata(pdev, NULL);
}

3515 3516 3517
static void rtl_request_firmware(struct rtl8169_private *tp)
{
	/* Return early if the firmware is already loaded / cached. */
3518 3519
	if (IS_ERR(tp->fw)) {
		const char *name;
3520

3521 3522
		name = rtl_lookup_firmware_name(tp);
		if (name) {
3523 3524 3525
			int rc;

			rc = request_firmware(&tp->fw, name, &tp->pci_dev->dev);
3526 3527 3528 3529 3530
			if (rc >= 0)
				return;

			netif_warn(tp, ifup, tp->dev, "unable to load "
				"firmware patch %s (%d)\n", name, rc);
3531
		}
3532
		tp->fw = NULL;
3533 3534 3535
	}
}

L
Linus Torvalds 已提交
3536 3537 3538
static int rtl8169_open(struct net_device *dev)
{
	struct rtl8169_private *tp = netdev_priv(dev);
3539
	void __iomem *ioaddr = tp->mmio_addr;
L
Linus Torvalds 已提交
3540
	struct pci_dev *pdev = tp->pci_dev;
3541
	int retval = -ENOMEM;
L
Linus Torvalds 已提交
3542

3543
	pm_runtime_get_sync(&pdev->dev);
L
Linus Torvalds 已提交
3544 3545 3546

	/*
	 * Rx and Tx desscriptors needs 256 bytes alignment.
3547
	 * dma_alloc_coherent provides more.
L
Linus Torvalds 已提交
3548
	 */
3549 3550
	tp->TxDescArray = dma_alloc_coherent(&pdev->dev, R8169_TX_RING_BYTES,
					     &tp->TxPhyAddr, GFP_KERNEL);
L
Linus Torvalds 已提交
3551
	if (!tp->TxDescArray)
3552
		goto err_pm_runtime_put;
L
Linus Torvalds 已提交
3553

3554 3555
	tp->RxDescArray = dma_alloc_coherent(&pdev->dev, R8169_RX_RING_BYTES,
					     &tp->RxPhyAddr, GFP_KERNEL);
L
Linus Torvalds 已提交
3556
	if (!tp->RxDescArray)
3557
		goto err_free_tx_0;
L
Linus Torvalds 已提交
3558 3559 3560

	retval = rtl8169_init_ring(dev);
	if (retval < 0)
3561
		goto err_free_rx_1;
L
Linus Torvalds 已提交
3562

D
David Howells 已提交
3563
	INIT_DELAYED_WORK(&tp->task, NULL);
L
Linus Torvalds 已提交
3564

3565 3566
	smp_mb();

3567 3568
	rtl_request_firmware(tp);

F
Francois Romieu 已提交
3569 3570
	retval = request_irq(dev->irq, rtl8169_interrupt,
			     (tp->features & RTL_FEATURE_MSI) ? 0 : IRQF_SHARED,
3571 3572
			     dev->name, dev);
	if (retval < 0)
3573
		goto err_release_fw_2;
3574

3575 3576
	napi_enable(&tp->napi);

3577 3578
	rtl8169_init_phy(dev, tp);

3579
	rtl8169_set_features(dev, dev->features);
3580

F
françois romieu 已提交
3581 3582
	rtl_pll_power_up(tp);

3583
	rtl_hw_start(dev);
L
Linus Torvalds 已提交
3584

3585 3586 3587
	tp->saved_wolopts = 0;
	pm_runtime_put_noidle(&pdev->dev);

3588
	rtl8169_check_link_status(dev, tp, ioaddr);
L
Linus Torvalds 已提交
3589 3590 3591
out:
	return retval;

3592 3593
err_release_fw_2:
	rtl_release_firmware(tp);
3594 3595
	rtl8169_rx_clear(tp);
err_free_rx_1:
3596 3597
	dma_free_coherent(&pdev->dev, R8169_RX_RING_BYTES, tp->RxDescArray,
			  tp->RxPhyAddr);
3598
	tp->RxDescArray = NULL;
3599
err_free_tx_0:
3600 3601
	dma_free_coherent(&pdev->dev, R8169_TX_RING_BYTES, tp->TxDescArray,
			  tp->TxPhyAddr);
3602 3603 3604
	tp->TxDescArray = NULL;
err_pm_runtime_put:
	pm_runtime_put_noidle(&pdev->dev);
L
Linus Torvalds 已提交
3605 3606 3607
	goto out;
}

F
françois romieu 已提交
3608
static void rtl8169_hw_reset(struct rtl8169_private *tp)
L
Linus Torvalds 已提交
3609
{
F
françois romieu 已提交
3610 3611
	void __iomem *ioaddr = tp->mmio_addr;

L
Linus Torvalds 已提交
3612 3613 3614
	/* Disable interrupts */
	rtl8169_irq_mask_and_ack(ioaddr);

3615
	if (tp->mac_version == RTL_GIGA_MAC_VER_27 ||
3616 3617
	    tp->mac_version == RTL_GIGA_MAC_VER_28 ||
	    tp->mac_version == RTL_GIGA_MAC_VER_31) {
F
françois romieu 已提交
3618 3619 3620 3621 3622
		while (RTL_R8(TxPoll) & NPQ)
			udelay(20);

	}

L
Linus Torvalds 已提交
3623 3624 3625 3626 3627 3628 3629
	/* Reset the chipset */
	RTL_W8(ChipCmd, CmdReset);

	/* PCI commit */
	RTL_R8(ChipCmd);
}

3630
static void rtl_set_rx_tx_config_registers(struct rtl8169_private *tp)
3631 3632 3633 3634
{
	void __iomem *ioaddr = tp->mmio_addr;
	u32 cfg = rtl8169_rx_config;

F
Francois Romieu 已提交
3635
	cfg |= (RTL_R32(RxConfig) & RTL_RX_CONFIG_MASK);
3636 3637 3638 3639 3640 3641 3642
	RTL_W32(RxConfig, cfg);

	/* Set DMA burst size and Interframe Gap Time */
	RTL_W32(TxConfig, (TX_DMA_BURST << TxDMAShift) |
		(InterFrameGap << TxInterFrameGapShift));
}

3643
static void rtl_hw_start(struct net_device *dev)
L
Linus Torvalds 已提交
3644 3645 3646
{
	struct rtl8169_private *tp = netdev_priv(dev);

3647
	rtl_hw_reset(tp);
L
Linus Torvalds 已提交
3648

3649 3650 3651 3652 3653
	tp->hw_start(dev);

	netif_start_queue(dev);
}

3654 3655 3656 3657 3658 3659 3660 3661 3662
static void rtl_set_rx_tx_desc_registers(struct rtl8169_private *tp,
					 void __iomem *ioaddr)
{
	/*
	 * Magic spell: some iop3xx ARM board needs the TxDescAddrHigh
	 * register to be written before TxDescAddrLow to work.
	 * Switching from MMIO to I/O access fixes the issue as well.
	 */
	RTL_W32(TxDescStartAddrHigh, ((u64) tp->TxPhyAddr) >> 32);
3663
	RTL_W32(TxDescStartAddrLow, ((u64) tp->TxPhyAddr) & DMA_BIT_MASK(32));
3664
	RTL_W32(RxDescAddrHigh, ((u64) tp->RxPhyAddr) >> 32);
3665
	RTL_W32(RxDescAddrLow, ((u64) tp->RxPhyAddr) & DMA_BIT_MASK(32));
3666 3667 3668 3669 3670 3671 3672 3673 3674 3675 3676
}

static u16 rtl_rw_cpluscmd(void __iomem *ioaddr)
{
	u16 cmd;

	cmd = RTL_R16(CPlusCmd);
	RTL_W16(CPlusCmd, cmd);
	return cmd;
}

3677
static void rtl_set_rx_max_size(void __iomem *ioaddr, unsigned int rx_buf_sz)
3678 3679
{
	/* Low hurts. Let's disable the filtering. */
3680
	RTL_W16(RxMaxSize, rx_buf_sz + 1);
3681 3682
}

3683 3684
static void rtl8169_set_magic_reg(void __iomem *ioaddr, unsigned mac_version)
{
3685
	static const struct {
3686 3687 3688 3689 3690 3691 3692 3693 3694 3695 3696 3697 3698
		u32 mac_version;
		u32 clk;
		u32 val;
	} cfg2_info [] = {
		{ RTL_GIGA_MAC_VER_05, PCI_Clock_33MHz, 0x000fff00 }, // 8110SCd
		{ RTL_GIGA_MAC_VER_05, PCI_Clock_66MHz, 0x000fffff },
		{ RTL_GIGA_MAC_VER_06, PCI_Clock_33MHz, 0x00ffff00 }, // 8110SCe
		{ RTL_GIGA_MAC_VER_06, PCI_Clock_66MHz, 0x00ffffff }
	}, *p = cfg2_info;
	unsigned int i;
	u32 clk;

	clk = RTL_R8(Config2) & PCI_Clock_66MHz;
3699
	for (i = 0; i < ARRAY_SIZE(cfg2_info); i++, p++) {
3700 3701 3702 3703 3704 3705 3706
		if ((p->mac_version == mac_version) && (p->clk == clk)) {
			RTL_W32(0x7c, p->val);
			break;
		}
	}
}

3707 3708 3709 3710 3711 3712
static void rtl_hw_start_8169(struct net_device *dev)
{
	struct rtl8169_private *tp = netdev_priv(dev);
	void __iomem *ioaddr = tp->mmio_addr;
	struct pci_dev *pdev = tp->pci_dev;

3713 3714 3715 3716 3717
	if (tp->mac_version == RTL_GIGA_MAC_VER_05) {
		RTL_W16(CPlusCmd, RTL_R16(CPlusCmd) | PCIMulRW);
		pci_write_config_byte(pdev, PCI_CACHE_LINE_SIZE, 0x08);
	}

L
Linus Torvalds 已提交
3718
	RTL_W8(Cfg9346, Cfg9346_Unlock);
F
Francois Romieu 已提交
3719 3720 3721 3722
	if (tp->mac_version == RTL_GIGA_MAC_VER_01 ||
	    tp->mac_version == RTL_GIGA_MAC_VER_02 ||
	    tp->mac_version == RTL_GIGA_MAC_VER_03 ||
	    tp->mac_version == RTL_GIGA_MAC_VER_04)
3723 3724
		RTL_W8(ChipCmd, CmdTxEnb | CmdRxEnb);

3725
	RTL_W8(EarlyTxThres, NoEarlyTx);
L
Linus Torvalds 已提交
3726

E
Eric Dumazet 已提交
3727
	rtl_set_rx_max_size(ioaddr, rx_buf_sz);
L
Linus Torvalds 已提交
3728

F
Francois Romieu 已提交
3729 3730 3731 3732
	if (tp->mac_version == RTL_GIGA_MAC_VER_01 ||
	    tp->mac_version == RTL_GIGA_MAC_VER_02 ||
	    tp->mac_version == RTL_GIGA_MAC_VER_03 ||
	    tp->mac_version == RTL_GIGA_MAC_VER_04)
3733
		rtl_set_rx_tx_config_registers(tp);
L
Linus Torvalds 已提交
3734

3735
	tp->cp_cmd |= rtl_rw_cpluscmd(ioaddr) | PCIMulRW;
L
Linus Torvalds 已提交
3736

F
Francois Romieu 已提交
3737 3738
	if (tp->mac_version == RTL_GIGA_MAC_VER_02 ||
	    tp->mac_version == RTL_GIGA_MAC_VER_03) {
3739
		dprintk("Set MAC Reg C+CR Offset 0xE0. "
L
Linus Torvalds 已提交
3740
			"Bit-3 and bit-14 MUST be 1\n");
3741
		tp->cp_cmd |= (1 << 14);
L
Linus Torvalds 已提交
3742 3743
	}

3744 3745
	RTL_W16(CPlusCmd, tp->cp_cmd);

3746 3747
	rtl8169_set_magic_reg(ioaddr, tp->mac_version);

L
Linus Torvalds 已提交
3748 3749 3750 3751 3752 3753
	/*
	 * Undocumented corner. Supposedly:
	 * (TxTimer << 12) | (TxPackets << 8) | (RxTimer << 4) | RxPackets
	 */
	RTL_W16(IntrMitigate, 0x0000);

3754
	rtl_set_rx_tx_desc_registers(tp, ioaddr);
3755

F
Francois Romieu 已提交
3756 3757 3758 3759
	if (tp->mac_version != RTL_GIGA_MAC_VER_01 &&
	    tp->mac_version != RTL_GIGA_MAC_VER_02 &&
	    tp->mac_version != RTL_GIGA_MAC_VER_03 &&
	    tp->mac_version != RTL_GIGA_MAC_VER_04) {
3760 3761 3762 3763
		RTL_W8(ChipCmd, CmdTxEnb | CmdRxEnb);
		rtl_set_rx_tx_config_registers(tp);
	}

L
Linus Torvalds 已提交
3764
	RTL_W8(Cfg9346, Cfg9346_Lock);
F
Francois Romieu 已提交
3765 3766 3767

	/* Initially a 10 us delay. Turned it into a PCI commit. - FR */
	RTL_R8(IntrMask);
L
Linus Torvalds 已提交
3768 3769 3770

	RTL_W32(RxMissed, 0);

3771
	rtl_set_rx_mode(dev);
L
Linus Torvalds 已提交
3772 3773 3774

	/* no early-rx interrupts */
	RTL_W16(MultiIntr, RTL_R16(MultiIntr) & 0xF000);
3775 3776

	/* Enable all known interrupts by setting the interrupt mask. */
3777
	RTL_W16(IntrMask, tp->intr_event);
3778
}
L
Linus Torvalds 已提交
3779

3780
static void rtl_tx_performance_tweak(struct pci_dev *pdev, u16 force)
3781
{
3782 3783 3784 3785 3786 3787
	struct net_device *dev = pci_get_drvdata(pdev);
	struct rtl8169_private *tp = netdev_priv(dev);
	int cap = tp->pcie_cap;

	if (cap) {
		u16 ctl;
3788

3789 3790 3791 3792
		pci_read_config_word(pdev, cap + PCI_EXP_DEVCTL, &ctl);
		ctl = (ctl & ~PCI_EXP_DEVCTL_READRQ) | force;
		pci_write_config_word(pdev, cap + PCI_EXP_DEVCTL, ctl);
	}
3793 3794
}

3795
static void rtl_csi_access_enable(void __iomem *ioaddr, u32 bits)
3796 3797 3798 3799
{
	u32 csi;

	csi = rtl_csi_read(ioaddr, 0x070c) & 0x00ffffff;
3800 3801 3802
	rtl_csi_write(ioaddr, 0x070c, csi | bits);
}

F
françois romieu 已提交
3803 3804 3805 3806 3807
static void rtl_csi_access_enable_1(void __iomem *ioaddr)
{
	rtl_csi_access_enable(ioaddr, 0x17000000);
}

3808 3809 3810
static void rtl_csi_access_enable_2(void __iomem *ioaddr)
{
	rtl_csi_access_enable(ioaddr, 0x27000000);
3811 3812 3813 3814 3815 3816 3817 3818
}

struct ephy_info {
	unsigned int offset;
	u16 mask;
	u16 bits;
};

3819
static void rtl_ephy_init(void __iomem *ioaddr, const struct ephy_info *e, int len)
3820 3821 3822 3823 3824 3825 3826 3827 3828 3829
{
	u16 w;

	while (len-- > 0) {
		w = (rtl_ephy_read(ioaddr, e->offset) & ~e->mask) | e->bits;
		rtl_ephy_write(ioaddr, e->offset, w);
		e++;
	}
}

3830 3831 3832 3833 3834 3835 3836 3837 3838 3839 3840 3841 3842 3843 3844
static void rtl_disable_clock_request(struct pci_dev *pdev)
{
	struct net_device *dev = pci_get_drvdata(pdev);
	struct rtl8169_private *tp = netdev_priv(dev);
	int cap = tp->pcie_cap;

	if (cap) {
		u16 ctl;

		pci_read_config_word(pdev, cap + PCI_EXP_LNKCTL, &ctl);
		ctl &= ~PCI_EXP_LNKCTL_CLKREQ_EN;
		pci_write_config_word(pdev, cap + PCI_EXP_LNKCTL, ctl);
	}
}

F
françois romieu 已提交
3845 3846 3847 3848 3849 3850 3851 3852 3853 3854 3855 3856 3857 3858 3859
static void rtl_enable_clock_request(struct pci_dev *pdev)
{
	struct net_device *dev = pci_get_drvdata(pdev);
	struct rtl8169_private *tp = netdev_priv(dev);
	int cap = tp->pcie_cap;

	if (cap) {
		u16 ctl;

		pci_read_config_word(pdev, cap + PCI_EXP_LNKCTL, &ctl);
		ctl |= PCI_EXP_LNKCTL_CLKREQ_EN;
		pci_write_config_word(pdev, cap + PCI_EXP_LNKCTL, ctl);
	}
}

3860 3861 3862 3863 3864 3865 3866 3867 3868 3869 3870
#define R8168_CPCMD_QUIRK_MASK (\
	EnableBist | \
	Mac_dbgo_oe | \
	Force_half_dup | \
	Force_rxflow_en | \
	Force_txflow_en | \
	Cxpl_dbg_sel | \
	ASF | \
	PktCntrDisable | \
	Mac_dbgo_sel)

3871 3872
static void rtl_hw_start_8168bb(void __iomem *ioaddr, struct pci_dev *pdev)
{
3873 3874 3875 3876
	RTL_W8(Config3, RTL_R8(Config3) & ~Beacon_en);

	RTL_W16(CPlusCmd, RTL_R16(CPlusCmd) & ~R8168_CPCMD_QUIRK_MASK);

3877 3878
	rtl_tx_performance_tweak(pdev,
		(0x5 << MAX_READ_REQUEST_SHIFT) | PCI_EXP_DEVCTL_NOSNOOP_EN);
3879 3880 3881 3882 3883
}

static void rtl_hw_start_8168bef(void __iomem *ioaddr, struct pci_dev *pdev)
{
	rtl_hw_start_8168bb(ioaddr, pdev);
3884

3885
	RTL_W8(MaxTxPacketSize, TxPacketMax);
3886 3887

	RTL_W8(Config4, RTL_R8(Config4) & ~(1 << 0));
3888 3889 3890 3891
}

static void __rtl_hw_start_8168cp(void __iomem *ioaddr, struct pci_dev *pdev)
{
3892 3893 3894 3895
	RTL_W8(Config1, RTL_R8(Config1) | Speed_down);

	RTL_W8(Config3, RTL_R8(Config3) & ~Beacon_en);

3896
	rtl_tx_performance_tweak(pdev, 0x5 << MAX_READ_REQUEST_SHIFT);
3897 3898 3899 3900

	rtl_disable_clock_request(pdev);

	RTL_W16(CPlusCmd, RTL_R16(CPlusCmd) & ~R8168_CPCMD_QUIRK_MASK);
3901 3902
}

F
Francois Romieu 已提交
3903
static void rtl_hw_start_8168cp_1(void __iomem *ioaddr, struct pci_dev *pdev)
3904
{
3905
	static const struct ephy_info e_info_8168cp[] = {
3906 3907 3908 3909 3910 3911 3912
		{ 0x01, 0,	0x0001 },
		{ 0x02, 0x0800,	0x1000 },
		{ 0x03, 0,	0x0042 },
		{ 0x06, 0x0080,	0x0000 },
		{ 0x07, 0,	0x2000 }
	};

3913
	rtl_csi_access_enable_2(ioaddr);
3914 3915 3916

	rtl_ephy_init(ioaddr, e_info_8168cp, ARRAY_SIZE(e_info_8168cp));

3917 3918 3919
	__rtl_hw_start_8168cp(ioaddr, pdev);
}

F
Francois Romieu 已提交
3920 3921
static void rtl_hw_start_8168cp_2(void __iomem *ioaddr, struct pci_dev *pdev)
{
3922
	rtl_csi_access_enable_2(ioaddr);
F
Francois Romieu 已提交
3923 3924 3925 3926 3927 3928 3929 3930

	RTL_W8(Config3, RTL_R8(Config3) & ~Beacon_en);

	rtl_tx_performance_tweak(pdev, 0x5 << MAX_READ_REQUEST_SHIFT);

	RTL_W16(CPlusCmd, RTL_R16(CPlusCmd) & ~R8168_CPCMD_QUIRK_MASK);
}

3931 3932
static void rtl_hw_start_8168cp_3(void __iomem *ioaddr, struct pci_dev *pdev)
{
3933
	rtl_csi_access_enable_2(ioaddr);
3934 3935 3936 3937 3938 3939

	RTL_W8(Config3, RTL_R8(Config3) & ~Beacon_en);

	/* Magic. */
	RTL_W8(DBG_REG, 0x20);

3940
	RTL_W8(MaxTxPacketSize, TxPacketMax);
3941 3942 3943 3944 3945 3946

	rtl_tx_performance_tweak(pdev, 0x5 << MAX_READ_REQUEST_SHIFT);

	RTL_W16(CPlusCmd, RTL_R16(CPlusCmd) & ~R8168_CPCMD_QUIRK_MASK);
}

3947 3948
static void rtl_hw_start_8168c_1(void __iomem *ioaddr, struct pci_dev *pdev)
{
3949
	static const struct ephy_info e_info_8168c_1[] = {
3950 3951 3952 3953 3954
		{ 0x02, 0x0800,	0x1000 },
		{ 0x03, 0,	0x0002 },
		{ 0x06, 0x0080,	0x0000 }
	};

3955
	rtl_csi_access_enable_2(ioaddr);
3956 3957 3958 3959 3960

	RTL_W8(DBG_REG, 0x06 | FIX_NAK_1 | FIX_NAK_2);

	rtl_ephy_init(ioaddr, e_info_8168c_1, ARRAY_SIZE(e_info_8168c_1));

3961 3962 3963 3964 3965
	__rtl_hw_start_8168cp(ioaddr, pdev);
}

static void rtl_hw_start_8168c_2(void __iomem *ioaddr, struct pci_dev *pdev)
{
3966
	static const struct ephy_info e_info_8168c_2[] = {
3967 3968 3969 3970
		{ 0x01, 0,	0x0001 },
		{ 0x03, 0x0400,	0x0220 }
	};

3971
	rtl_csi_access_enable_2(ioaddr);
3972 3973 3974

	rtl_ephy_init(ioaddr, e_info_8168c_2, ARRAY_SIZE(e_info_8168c_2));

3975 3976 3977
	__rtl_hw_start_8168cp(ioaddr, pdev);
}

F
Francois Romieu 已提交
3978 3979 3980 3981 3982
static void rtl_hw_start_8168c_3(void __iomem *ioaddr, struct pci_dev *pdev)
{
	rtl_hw_start_8168c_2(ioaddr, pdev);
}

3983 3984
static void rtl_hw_start_8168c_4(void __iomem *ioaddr, struct pci_dev *pdev)
{
3985
	rtl_csi_access_enable_2(ioaddr);
3986 3987 3988 3989

	__rtl_hw_start_8168cp(ioaddr, pdev);
}

F
Francois Romieu 已提交
3990 3991
static void rtl_hw_start_8168d(void __iomem *ioaddr, struct pci_dev *pdev)
{
3992
	rtl_csi_access_enable_2(ioaddr);
F
Francois Romieu 已提交
3993 3994 3995

	rtl_disable_clock_request(pdev);

3996
	RTL_W8(MaxTxPacketSize, TxPacketMax);
F
Francois Romieu 已提交
3997 3998 3999 4000 4001 4002

	rtl_tx_performance_tweak(pdev, 0x5 << MAX_READ_REQUEST_SHIFT);

	RTL_W16(CPlusCmd, RTL_R16(CPlusCmd) & ~R8168_CPCMD_QUIRK_MASK);
}

4003 4004 4005 4006 4007 4008 4009 4010 4011 4012 4013
static void rtl_hw_start_8168dp(void __iomem *ioaddr, struct pci_dev *pdev)
{
	rtl_csi_access_enable_1(ioaddr);

	rtl_tx_performance_tweak(pdev, 0x5 << MAX_READ_REQUEST_SHIFT);

	RTL_W8(MaxTxPacketSize, TxPacketMax);

	rtl_disable_clock_request(pdev);
}

F
françois romieu 已提交
4014 4015 4016 4017 4018 4019 4020 4021 4022 4023 4024 4025 4026 4027 4028 4029 4030 4031 4032 4033 4034 4035 4036 4037 4038 4039
static void rtl_hw_start_8168d_4(void __iomem *ioaddr, struct pci_dev *pdev)
{
	static const struct ephy_info e_info_8168d_4[] = {
		{ 0x0b, ~0,	0x48 },
		{ 0x19, 0x20,	0x50 },
		{ 0x0c, ~0,	0x20 }
	};
	int i;

	rtl_csi_access_enable_1(ioaddr);

	rtl_tx_performance_tweak(pdev, 0x5 << MAX_READ_REQUEST_SHIFT);

	RTL_W8(MaxTxPacketSize, TxPacketMax);

	for (i = 0; i < ARRAY_SIZE(e_info_8168d_4); i++) {
		const struct ephy_info *e = e_info_8168d_4 + i;
		u16 w;

		w = rtl_ephy_read(ioaddr, e->offset);
		rtl_ephy_write(ioaddr, 0x03, (w & e->mask) | e->bits);
	}

	rtl_enable_clock_request(pdev);
}

H
hayeswang 已提交
4040 4041 4042 4043 4044 4045 4046 4047 4048 4049 4050 4051 4052 4053 4054 4055 4056 4057 4058 4059 4060 4061 4062 4063 4064 4065 4066 4067 4068
static void rtl_hw_start_8168e(void __iomem *ioaddr, struct pci_dev *pdev)
{
	static const struct ephy_info e_info_8168e[] = {
		{ 0x00, 0x0200,	0x0100 },
		{ 0x00, 0x0000,	0x0004 },
		{ 0x06, 0x0002,	0x0001 },
		{ 0x06, 0x0000,	0x0030 },
		{ 0x07, 0x0000,	0x2000 },
		{ 0x00, 0x0000,	0x0020 },
		{ 0x03, 0x5800,	0x2000 },
		{ 0x03, 0x0000,	0x0001 },
		{ 0x01, 0x0800,	0x1000 },
		{ 0x07, 0x0000,	0x4000 },
		{ 0x1e, 0x0000,	0x2000 },
		{ 0x19, 0xffff,	0xfe6c },
		{ 0x0a, 0x0000,	0x0040 }
	};

	rtl_csi_access_enable_2(ioaddr);

	rtl_ephy_init(ioaddr, e_info_8168e, ARRAY_SIZE(e_info_8168e));

	rtl_tx_performance_tweak(pdev, 0x5 << MAX_READ_REQUEST_SHIFT);

	RTL_W8(MaxTxPacketSize, TxPacketMax);

	rtl_disable_clock_request(pdev);

	/* Reset tx FIFO pointer */
F
Francois Romieu 已提交
4069 4070
	RTL_W32(MISC, RTL_R32(MISC) | TXPLA_RST);
	RTL_W32(MISC, RTL_R32(MISC) & ~TXPLA_RST);
H
hayeswang 已提交
4071

F
Francois Romieu 已提交
4072
	RTL_W8(Config5, RTL_R8(Config5) & ~Spi_en);
H
hayeswang 已提交
4073 4074
}

4075 4076
static void rtl_hw_start_8168(struct net_device *dev)
{
4077 4078
	struct rtl8169_private *tp = netdev_priv(dev);
	void __iomem *ioaddr = tp->mmio_addr;
4079
	struct pci_dev *pdev = tp->pci_dev;
4080 4081 4082

	RTL_W8(Cfg9346, Cfg9346_Unlock);

4083
	RTL_W8(MaxTxPacketSize, TxPacketMax);
4084

E
Eric Dumazet 已提交
4085
	rtl_set_rx_max_size(ioaddr, rx_buf_sz);
4086

4087
	tp->cp_cmd |= RTL_R16(CPlusCmd) | PktCntrDisable | INTT_1;
4088 4089 4090

	RTL_W16(CPlusCmd, tp->cp_cmd);

4091
	RTL_W16(IntrMitigate, 0x5151);
4092

4093
	/* Work around for RxFIFO overflow. */
4094 4095
	if (tp->mac_version == RTL_GIGA_MAC_VER_11 ||
	    tp->mac_version == RTL_GIGA_MAC_VER_22) {
4096 4097 4098 4099 4100
		tp->intr_event |= RxFIFOOver | PCSTimeout;
		tp->intr_event &= ~RxOverflow;
	}

	rtl_set_rx_tx_desc_registers(tp, ioaddr);
4101

4102 4103 4104 4105
	rtl_set_rx_mode(dev);

	RTL_W32(TxConfig, (TX_DMA_BURST << TxDMAShift) |
		(InterFrameGap << TxInterFrameGapShift));
4106 4107 4108

	RTL_R8(IntrMask);

4109 4110 4111
	switch (tp->mac_version) {
	case RTL_GIGA_MAC_VER_11:
		rtl_hw_start_8168bb(ioaddr, pdev);
4112
		break;
4113 4114 4115 4116

	case RTL_GIGA_MAC_VER_12:
	case RTL_GIGA_MAC_VER_17:
		rtl_hw_start_8168bef(ioaddr, pdev);
4117
		break;
4118 4119

	case RTL_GIGA_MAC_VER_18:
F
Francois Romieu 已提交
4120
		rtl_hw_start_8168cp_1(ioaddr, pdev);
4121
		break;
4122 4123 4124

	case RTL_GIGA_MAC_VER_19:
		rtl_hw_start_8168c_1(ioaddr, pdev);
4125
		break;
4126 4127 4128

	case RTL_GIGA_MAC_VER_20:
		rtl_hw_start_8168c_2(ioaddr, pdev);
4129
		break;
4130

F
Francois Romieu 已提交
4131 4132
	case RTL_GIGA_MAC_VER_21:
		rtl_hw_start_8168c_3(ioaddr, pdev);
4133
		break;
F
Francois Romieu 已提交
4134

4135 4136
	case RTL_GIGA_MAC_VER_22:
		rtl_hw_start_8168c_4(ioaddr, pdev);
4137
		break;
4138

F
Francois Romieu 已提交
4139 4140
	case RTL_GIGA_MAC_VER_23:
		rtl_hw_start_8168cp_2(ioaddr, pdev);
4141
		break;
F
Francois Romieu 已提交
4142

4143 4144
	case RTL_GIGA_MAC_VER_24:
		rtl_hw_start_8168cp_3(ioaddr, pdev);
4145
		break;
4146

F
Francois Romieu 已提交
4147
	case RTL_GIGA_MAC_VER_25:
4148 4149
	case RTL_GIGA_MAC_VER_26:
	case RTL_GIGA_MAC_VER_27:
F
Francois Romieu 已提交
4150
		rtl_hw_start_8168d(ioaddr, pdev);
4151
		break;
F
Francois Romieu 已提交
4152

F
françois romieu 已提交
4153 4154
	case RTL_GIGA_MAC_VER_28:
		rtl_hw_start_8168d_4(ioaddr, pdev);
4155
		break;
F
Francois Romieu 已提交
4156

4157 4158 4159 4160
	case RTL_GIGA_MAC_VER_31:
		rtl_hw_start_8168dp(ioaddr, pdev);
		break;

H
hayeswang 已提交
4161 4162 4163 4164
	case RTL_GIGA_MAC_VER_32:
	case RTL_GIGA_MAC_VER_33:
		rtl_hw_start_8168e(ioaddr, pdev);
		break;
F
françois romieu 已提交
4165

4166 4167 4168
	default:
		printk(KERN_ERR PFX "%s: unknown chipset (mac_version = %d).\n",
			dev->name, tp->mac_version);
4169
		break;
4170
	}
4171

4172 4173
	RTL_W8(ChipCmd, CmdTxEnb | CmdRxEnb);

4174 4175
	RTL_W8(Cfg9346, Cfg9346_Lock);

4176
	RTL_W16(MultiIntr, RTL_R16(MultiIntr) & 0xF000);
4177

4178
	RTL_W16(IntrMask, tp->intr_event);
4179
}
L
Linus Torvalds 已提交
4180

4181 4182 4183 4184
#define R810X_CPCMD_QUIRK_MASK (\
	EnableBist | \
	Mac_dbgo_oe | \
	Force_half_dup | \
F
françois romieu 已提交
4185
	Force_rxflow_en | \
4186 4187 4188 4189
	Force_txflow_en | \
	Cxpl_dbg_sel | \
	ASF | \
	PktCntrDisable | \
4190
	Mac_dbgo_sel)
4191 4192 4193

static void rtl_hw_start_8102e_1(void __iomem *ioaddr, struct pci_dev *pdev)
{
4194
	static const struct ephy_info e_info_8102e_1[] = {
4195 4196 4197 4198 4199 4200 4201 4202 4203 4204 4205
		{ 0x01,	0, 0x6e65 },
		{ 0x02,	0, 0x091f },
		{ 0x03,	0, 0xc2f9 },
		{ 0x06,	0, 0xafb5 },
		{ 0x07,	0, 0x0e00 },
		{ 0x19,	0, 0xec80 },
		{ 0x01,	0, 0x2e65 },
		{ 0x01,	0, 0x6e65 }
	};
	u8 cfg1;

4206
	rtl_csi_access_enable_2(ioaddr);
4207 4208 4209 4210 4211 4212 4213 4214 4215 4216 4217 4218 4219 4220 4221 4222 4223 4224

	RTL_W8(DBG_REG, FIX_NAK_1);

	rtl_tx_performance_tweak(pdev, 0x5 << MAX_READ_REQUEST_SHIFT);

	RTL_W8(Config1,
	       LEDS1 | LEDS0 | Speed_down | MEMMAP | IOMAP | VPD | PMEnable);
	RTL_W8(Config3, RTL_R8(Config3) & ~Beacon_en);

	cfg1 = RTL_R8(Config1);
	if ((cfg1 & LEDS0) && (cfg1 & LEDS1))
		RTL_W8(Config1, cfg1 & ~LEDS0);

	rtl_ephy_init(ioaddr, e_info_8102e_1, ARRAY_SIZE(e_info_8102e_1));
}

static void rtl_hw_start_8102e_2(void __iomem *ioaddr, struct pci_dev *pdev)
{
4225
	rtl_csi_access_enable_2(ioaddr);
4226 4227 4228 4229 4230 4231 4232 4233 4234 4235 4236 4237 4238 4239

	rtl_tx_performance_tweak(pdev, 0x5 << MAX_READ_REQUEST_SHIFT);

	RTL_W8(Config1, MEMMAP | IOMAP | VPD | PMEnable);
	RTL_W8(Config3, RTL_R8(Config3) & ~Beacon_en);
}

static void rtl_hw_start_8102e_3(void __iomem *ioaddr, struct pci_dev *pdev)
{
	rtl_hw_start_8102e_2(ioaddr, pdev);

	rtl_ephy_write(ioaddr, 0x03, 0xc2f9);
}

4240 4241 4242 4243 4244 4245 4246 4247 4248 4249 4250 4251 4252
static void rtl_hw_start_8105e_1(void __iomem *ioaddr, struct pci_dev *pdev)
{
	static const struct ephy_info e_info_8105e_1[] = {
		{ 0x07,	0, 0x4000 },
		{ 0x19,	0, 0x0200 },
		{ 0x19,	0, 0x0020 },
		{ 0x1e,	0, 0x2000 },
		{ 0x03,	0, 0x0001 },
		{ 0x19,	0, 0x0100 },
		{ 0x19,	0, 0x0004 },
		{ 0x0a,	0, 0x0020 }
	};

F
Francois Romieu 已提交
4253
	/* Force LAN exit from ASPM if Rx/Tx are not idle */
4254 4255
	RTL_W32(FuncEvent, RTL_R32(FuncEvent) | 0x002800);

F
Francois Romieu 已提交
4256
	/* Disable Early Tally Counter */
4257 4258 4259 4260 4261 4262 4263 4264 4265 4266 4267 4268 4269 4270
	RTL_W32(FuncEvent, RTL_R32(FuncEvent) & ~0x010000);

	RTL_W8(MCU, RTL_R8(MCU) | EN_NDP | EN_OOB_RESET);
	RTL_W8(DLLPR, RTL_R8(DLLPR) | PM_SWITCH);

	rtl_ephy_init(ioaddr, e_info_8105e_1, ARRAY_SIZE(e_info_8105e_1));
}

static void rtl_hw_start_8105e_2(void __iomem *ioaddr, struct pci_dev *pdev)
{
	rtl_hw_start_8105e_1(ioaddr, pdev);
	rtl_ephy_write(ioaddr, 0x1e, rtl_ephy_read(ioaddr, 0x1e) | 0x8000);
}

4271 4272
static void rtl_hw_start_8101(struct net_device *dev)
{
4273 4274 4275 4276
	struct rtl8169_private *tp = netdev_priv(dev);
	void __iomem *ioaddr = tp->mmio_addr;
	struct pci_dev *pdev = tp->pci_dev;

F
Francois Romieu 已提交
4277 4278
	if (tp->mac_version == RTL_GIGA_MAC_VER_13 ||
	    tp->mac_version == RTL_GIGA_MAC_VER_16) {
4279 4280 4281 4282 4283 4284
		int cap = tp->pcie_cap;

		if (cap) {
			pci_write_config_word(pdev, cap + PCI_EXP_DEVCTL,
					      PCI_EXP_DEVCTL_NOSNOOP_EN);
		}
4285 4286
	}

4287 4288
	RTL_W8(Cfg9346, Cfg9346_Unlock);

4289 4290 4291 4292 4293 4294 4295 4296 4297 4298 4299 4300
	switch (tp->mac_version) {
	case RTL_GIGA_MAC_VER_07:
		rtl_hw_start_8102e_1(ioaddr, pdev);
		break;

	case RTL_GIGA_MAC_VER_08:
		rtl_hw_start_8102e_3(ioaddr, pdev);
		break;

	case RTL_GIGA_MAC_VER_09:
		rtl_hw_start_8102e_2(ioaddr, pdev);
		break;
4301 4302 4303 4304 4305 4306 4307

	case RTL_GIGA_MAC_VER_29:
		rtl_hw_start_8105e_1(ioaddr, pdev);
		break;
	case RTL_GIGA_MAC_VER_30:
		rtl_hw_start_8105e_2(ioaddr, pdev);
		break;
4308 4309
	}

4310
	RTL_W8(Cfg9346, Cfg9346_Lock);
4311

4312
	RTL_W8(MaxTxPacketSize, TxPacketMax);
4313

E
Eric Dumazet 已提交
4314
	rtl_set_rx_max_size(ioaddr, rx_buf_sz);
4315

4316
	tp->cp_cmd &= ~R810X_CPCMD_QUIRK_MASK;
4317 4318 4319 4320 4321 4322 4323 4324 4325 4326 4327 4328 4329 4330
	RTL_W16(CPlusCmd, tp->cp_cmd);

	RTL_W16(IntrMitigate, 0x0000);

	rtl_set_rx_tx_desc_registers(tp, ioaddr);

	RTL_W8(ChipCmd, CmdTxEnb | CmdRxEnb);
	rtl_set_rx_tx_config_registers(tp);

	RTL_R8(IntrMask);

	rtl_set_rx_mode(dev);

	RTL_W16(MultiIntr, RTL_R16(MultiIntr) & 0xf000);
4331

4332
	RTL_W16(IntrMask, tp->intr_event);
L
Linus Torvalds 已提交
4333 4334 4335 4336 4337 4338 4339 4340
}

static int rtl8169_change_mtu(struct net_device *dev, int new_mtu)
{
	if (new_mtu < ETH_ZLEN || new_mtu > SafeMtu)
		return -EINVAL;

	dev->mtu = new_mtu;
4341 4342
	netdev_update_features(dev);

S
Stanislaw Gruszka 已提交
4343
	return 0;
L
Linus Torvalds 已提交
4344 4345 4346 4347
}

static inline void rtl8169_make_unusable_by_asic(struct RxDesc *desc)
{
A
Al Viro 已提交
4348
	desc->addr = cpu_to_le64(0x0badbadbadbadbadull);
L
Linus Torvalds 已提交
4349 4350 4351
	desc->opts1 &= ~cpu_to_le32(DescOwn | RsvdMask);
}

E
Eric Dumazet 已提交
4352 4353
static void rtl8169_free_rx_databuff(struct rtl8169_private *tp,
				     void **data_buff, struct RxDesc *desc)
L
Linus Torvalds 已提交
4354
{
4355
	dma_unmap_single(&tp->pci_dev->dev, le64_to_cpu(desc->addr), rx_buf_sz,
4356
			 DMA_FROM_DEVICE);
4357

E
Eric Dumazet 已提交
4358 4359
	kfree(*data_buff);
	*data_buff = NULL;
L
Linus Torvalds 已提交
4360 4361 4362 4363 4364 4365 4366 4367 4368 4369 4370 4371 4372 4373 4374 4375 4376 4377
	rtl8169_make_unusable_by_asic(desc);
}

static inline void rtl8169_mark_to_asic(struct RxDesc *desc, u32 rx_buf_sz)
{
	u32 eor = le32_to_cpu(desc->opts1) & RingEnd;

	desc->opts1 = cpu_to_le32(DescOwn | eor | rx_buf_sz);
}

static inline void rtl8169_map_to_asic(struct RxDesc *desc, dma_addr_t mapping,
				       u32 rx_buf_sz)
{
	desc->addr = cpu_to_le64(mapping);
	wmb();
	rtl8169_mark_to_asic(desc, rx_buf_sz);
}

E
Eric Dumazet 已提交
4378 4379 4380 4381 4382
static inline void *rtl8169_align(void *data)
{
	return (void *)ALIGN((long)data, 16);
}

S
Stanislaw Gruszka 已提交
4383 4384
static struct sk_buff *rtl8169_alloc_rx_data(struct rtl8169_private *tp,
					     struct RxDesc *desc)
L
Linus Torvalds 已提交
4385
{
E
Eric Dumazet 已提交
4386
	void *data;
L
Linus Torvalds 已提交
4387
	dma_addr_t mapping;
4388
	struct device *d = &tp->pci_dev->dev;
S
Stanislaw Gruszka 已提交
4389
	struct net_device *dev = tp->dev;
E
Eric Dumazet 已提交
4390
	int node = dev->dev.parent ? dev_to_node(dev->dev.parent) : -1;
L
Linus Torvalds 已提交
4391

E
Eric Dumazet 已提交
4392 4393 4394
	data = kmalloc_node(rx_buf_sz, GFP_KERNEL, node);
	if (!data)
		return NULL;
4395

E
Eric Dumazet 已提交
4396 4397 4398 4399 4400 4401
	if (rtl8169_align(data) != data) {
		kfree(data);
		data = kmalloc_node(rx_buf_sz + 15, GFP_KERNEL, node);
		if (!data)
			return NULL;
	}
4402

4403
	mapping = dma_map_single(d, rtl8169_align(data), rx_buf_sz,
4404
				 DMA_FROM_DEVICE);
4405 4406 4407
	if (unlikely(dma_mapping_error(d, mapping))) {
		if (net_ratelimit())
			netif_err(tp, drv, tp->dev, "Failed to map RX DMA!\n");
4408
		goto err_out;
4409
	}
L
Linus Torvalds 已提交
4410 4411

	rtl8169_map_to_asic(desc, mapping, rx_buf_sz);
E
Eric Dumazet 已提交
4412
	return data;
4413 4414 4415 4416

err_out:
	kfree(data);
	return NULL;
L
Linus Torvalds 已提交
4417 4418 4419 4420
}

static void rtl8169_rx_clear(struct rtl8169_private *tp)
{
F
Francois Romieu 已提交
4421
	unsigned int i;
L
Linus Torvalds 已提交
4422 4423

	for (i = 0; i < NUM_RX_DESC; i++) {
E
Eric Dumazet 已提交
4424 4425
		if (tp->Rx_databuff[i]) {
			rtl8169_free_rx_databuff(tp, tp->Rx_databuff + i,
L
Linus Torvalds 已提交
4426 4427 4428 4429 4430
					    tp->RxDescArray + i);
		}
	}
}

S
Stanislaw Gruszka 已提交
4431
static inline void rtl8169_mark_as_last_descriptor(struct RxDesc *desc)
L
Linus Torvalds 已提交
4432
{
S
Stanislaw Gruszka 已提交
4433 4434
	desc->opts1 |= cpu_to_le32(RingEnd);
}
4435

S
Stanislaw Gruszka 已提交
4436 4437 4438
static int rtl8169_rx_fill(struct rtl8169_private *tp)
{
	unsigned int i;
L
Linus Torvalds 已提交
4439

S
Stanislaw Gruszka 已提交
4440 4441
	for (i = 0; i < NUM_RX_DESC; i++) {
		void *data;
4442

E
Eric Dumazet 已提交
4443
		if (tp->Rx_databuff[i])
L
Linus Torvalds 已提交
4444
			continue;
4445

S
Stanislaw Gruszka 已提交
4446
		data = rtl8169_alloc_rx_data(tp, tp->RxDescArray + i);
E
Eric Dumazet 已提交
4447 4448
		if (!data) {
			rtl8169_make_unusable_by_asic(tp->RxDescArray + i);
S
Stanislaw Gruszka 已提交
4449
			goto err_out;
E
Eric Dumazet 已提交
4450 4451
		}
		tp->Rx_databuff[i] = data;
L
Linus Torvalds 已提交
4452 4453
	}

S
Stanislaw Gruszka 已提交
4454 4455 4456 4457 4458 4459
	rtl8169_mark_as_last_descriptor(tp->RxDescArray + NUM_RX_DESC - 1);
	return 0;

err_out:
	rtl8169_rx_clear(tp);
	return -ENOMEM;
L
Linus Torvalds 已提交
4460 4461 4462 4463 4464 4465 4466 4467 4468 4469 4470 4471 4472 4473
}

static void rtl8169_init_ring_indexes(struct rtl8169_private *tp)
{
	tp->dirty_tx = tp->dirty_rx = tp->cur_tx = tp->cur_rx = 0;
}

static int rtl8169_init_ring(struct net_device *dev)
{
	struct rtl8169_private *tp = netdev_priv(dev);

	rtl8169_init_ring_indexes(tp);

	memset(tp->tx_skb, 0x0, NUM_TX_DESC * sizeof(struct ring_info));
E
Eric Dumazet 已提交
4474
	memset(tp->Rx_databuff, 0x0, NUM_RX_DESC * sizeof(void *));
L
Linus Torvalds 已提交
4475

S
Stanislaw Gruszka 已提交
4476
	return rtl8169_rx_fill(tp);
L
Linus Torvalds 已提交
4477 4478
}

4479
static void rtl8169_unmap_tx_skb(struct device *d, struct ring_info *tx_skb,
L
Linus Torvalds 已提交
4480 4481 4482 4483
				 struct TxDesc *desc)
{
	unsigned int len = tx_skb->len;

4484 4485
	dma_unmap_single(d, le64_to_cpu(desc->addr), len, DMA_TO_DEVICE);

L
Linus Torvalds 已提交
4486 4487 4488 4489 4490 4491
	desc->opts1 = 0x00;
	desc->opts2 = 0x00;
	desc->addr = 0x00;
	tx_skb->len = 0;
}

4492 4493
static void rtl8169_tx_clear_range(struct rtl8169_private *tp, u32 start,
				   unsigned int n)
L
Linus Torvalds 已提交
4494 4495 4496
{
	unsigned int i;

4497 4498
	for (i = 0; i < n; i++) {
		unsigned int entry = (start + i) % NUM_TX_DESC;
L
Linus Torvalds 已提交
4499 4500 4501 4502 4503 4504
		struct ring_info *tx_skb = tp->tx_skb + entry;
		unsigned int len = tx_skb->len;

		if (len) {
			struct sk_buff *skb = tx_skb->skb;

4505
			rtl8169_unmap_tx_skb(&tp->pci_dev->dev, tx_skb,
L
Linus Torvalds 已提交
4506 4507
					     tp->TxDescArray + entry);
			if (skb) {
4508
				tp->dev->stats.tx_dropped++;
L
Linus Torvalds 已提交
4509 4510 4511 4512 4513
				dev_kfree_skb(skb);
				tx_skb->skb = NULL;
			}
		}
	}
4514 4515 4516 4517 4518
}

static void rtl8169_tx_clear(struct rtl8169_private *tp)
{
	rtl8169_tx_clear_range(tp, tp->dirty_tx, NUM_TX_DESC);
L
Linus Torvalds 已提交
4519 4520 4521
	tp->cur_tx = tp->dirty_tx = 0;
}

D
David Howells 已提交
4522
static void rtl8169_schedule_work(struct net_device *dev, work_func_t task)
L
Linus Torvalds 已提交
4523 4524 4525
{
	struct rtl8169_private *tp = netdev_priv(dev);

D
David Howells 已提交
4526
	PREPARE_DELAYED_WORK(&tp->task, task);
L
Linus Torvalds 已提交
4527 4528 4529 4530 4531 4532 4533 4534 4535 4536 4537
	schedule_delayed_work(&tp->task, 4);
}

static void rtl8169_wait_for_quiescence(struct net_device *dev)
{
	struct rtl8169_private *tp = netdev_priv(dev);
	void __iomem *ioaddr = tp->mmio_addr;

	synchronize_irq(dev->irq);

	/* Wait for any pending NAPI task to complete */
4538
	napi_disable(&tp->napi);
L
Linus Torvalds 已提交
4539 4540 4541

	rtl8169_irq_mask_and_ack(ioaddr);

4542 4543
	tp->intr_mask = 0xffff;
	RTL_W16(IntrMask, tp->intr_event);
4544
	napi_enable(&tp->napi);
L
Linus Torvalds 已提交
4545 4546
}

D
David Howells 已提交
4547
static void rtl8169_reinit_task(struct work_struct *work)
L
Linus Torvalds 已提交
4548
{
D
David Howells 已提交
4549 4550 4551
	struct rtl8169_private *tp =
		container_of(work, struct rtl8169_private, task.work);
	struct net_device *dev = tp->dev;
L
Linus Torvalds 已提交
4552 4553
	int ret;

4554 4555 4556 4557 4558 4559 4560
	rtnl_lock();

	if (!netif_running(dev))
		goto out_unlock;

	rtl8169_wait_for_quiescence(dev);
	rtl8169_close(dev);
L
Linus Torvalds 已提交
4561 4562 4563

	ret = rtl8169_open(dev);
	if (unlikely(ret < 0)) {
4564 4565 4566 4567
		if (net_ratelimit())
			netif_err(tp, drv, dev,
				  "reinit failure (status = %d). Rescheduling\n",
				  ret);
L
Linus Torvalds 已提交
4568 4569
		rtl8169_schedule_work(dev, rtl8169_reinit_task);
	}
4570 4571 4572

out_unlock:
	rtnl_unlock();
L
Linus Torvalds 已提交
4573 4574
}

D
David Howells 已提交
4575
static void rtl8169_reset_task(struct work_struct *work)
L
Linus Torvalds 已提交
4576
{
D
David Howells 已提交
4577 4578 4579
	struct rtl8169_private *tp =
		container_of(work, struct rtl8169_private, task.work);
	struct net_device *dev = tp->dev;
4580
	int i;
L
Linus Torvalds 已提交
4581

4582 4583
	rtnl_lock();

L
Linus Torvalds 已提交
4584
	if (!netif_running(dev))
4585
		goto out_unlock;
L
Linus Torvalds 已提交
4586 4587 4588

	rtl8169_wait_for_quiescence(dev);

4589 4590 4591
	for (i = 0; i < NUM_RX_DESC; i++)
		rtl8169_mark_to_asic(tp->RxDescArray + i, rx_buf_sz);

L
Linus Torvalds 已提交
4592 4593
	rtl8169_tx_clear(tp);

4594 4595 4596 4597
	rtl8169_init_ring_indexes(tp);
	rtl_hw_start(dev);
	netif_wake_queue(dev);
	rtl8169_check_link_status(dev, tp, tp->mmio_addr);
4598 4599 4600

out_unlock:
	rtnl_unlock();
L
Linus Torvalds 已提交
4601 4602 4603 4604 4605 4606
}

static void rtl8169_tx_timeout(struct net_device *dev)
{
	struct rtl8169_private *tp = netdev_priv(dev);

F
françois romieu 已提交
4607
	rtl8169_hw_reset(tp);
L
Linus Torvalds 已提交
4608 4609 4610 4611 4612 4613

	/* Let's wait a bit while any (async) irq lands on */
	rtl8169_schedule_work(dev, rtl8169_reset_task);
}

static int rtl8169_xmit_frags(struct rtl8169_private *tp, struct sk_buff *skb,
F
Francois Romieu 已提交
4614
			      u32 *opts)
L
Linus Torvalds 已提交
4615 4616 4617
{
	struct skb_shared_info *info = skb_shinfo(skb);
	unsigned int cur_frag, entry;
4618
	struct TxDesc * uninitialized_var(txd);
4619
	struct device *d = &tp->pci_dev->dev;
L
Linus Torvalds 已提交
4620 4621 4622 4623 4624 4625 4626 4627 4628 4629 4630 4631 4632

	entry = tp->cur_tx;
	for (cur_frag = 0; cur_frag < info->nr_frags; cur_frag++) {
		skb_frag_t *frag = info->frags + cur_frag;
		dma_addr_t mapping;
		u32 status, len;
		void *addr;

		entry = (entry + 1) % NUM_TX_DESC;

		txd = tp->TxDescArray + entry;
		len = frag->size;
		addr = ((void *) page_address(frag->page)) + frag->page_offset;
4633
		mapping = dma_map_single(d, addr, len, DMA_TO_DEVICE);
4634 4635 4636 4637
		if (unlikely(dma_mapping_error(d, mapping))) {
			if (net_ratelimit())
				netif_err(tp, drv, tp->dev,
					  "Failed to map TX fragments DMA!\n");
4638
			goto err_out;
4639
		}
L
Linus Torvalds 已提交
4640

F
Francois Romieu 已提交
4641
		/* Anti gcc 2.95.3 bugware (sic) */
F
Francois Romieu 已提交
4642 4643
		status = opts[0] | len |
			(RingEnd * !((entry + 1) % NUM_TX_DESC));
L
Linus Torvalds 已提交
4644 4645

		txd->opts1 = cpu_to_le32(status);
F
Francois Romieu 已提交
4646
		txd->opts2 = cpu_to_le32(opts[1]);
L
Linus Torvalds 已提交
4647 4648 4649 4650 4651 4652 4653 4654 4655 4656 4657
		txd->addr = cpu_to_le64(mapping);

		tp->tx_skb[entry].len = len;
	}

	if (cur_frag) {
		tp->tx_skb[entry].skb = skb;
		txd->opts1 |= cpu_to_le32(LastFrag);
	}

	return cur_frag;
4658 4659 4660 4661

err_out:
	rtl8169_tx_clear_range(tp, tp->cur_tx + 1, cur_frag);
	return -EIO;
L
Linus Torvalds 已提交
4662 4663
}

F
Francois Romieu 已提交
4664 4665
static inline void rtl8169_tso_csum(struct rtl8169_private *tp,
				    struct sk_buff *skb, u32 *opts)
L
Linus Torvalds 已提交
4666
{
F
Francois Romieu 已提交
4667
	const struct rtl_tx_desc_info *info = tx_desc_info + tp->txd_version;
4668
	u32 mss = skb_shinfo(skb)->gso_size;
F
Francois Romieu 已提交
4669
	int offset = info->opts_offset;
4670

F
Francois Romieu 已提交
4671 4672 4673 4674
	if (mss) {
		opts[0] |= TD_LSO;
		opts[offset] |= min(mss, TD_MSS_MAX) << info->mss_shift;
	} else if (skb->ip_summed == CHECKSUM_PARTIAL) {
4675
		const struct iphdr *ip = ip_hdr(skb);
L
Linus Torvalds 已提交
4676 4677

		if (ip->protocol == IPPROTO_TCP)
F
Francois Romieu 已提交
4678
			opts[offset] |= info->checksum.tcp;
L
Linus Torvalds 已提交
4679
		else if (ip->protocol == IPPROTO_UDP)
F
Francois Romieu 已提交
4680 4681 4682
			opts[offset] |= info->checksum.udp;
		else
			WARN_ON_ONCE(1);
L
Linus Torvalds 已提交
4683 4684 4685
	}
}

4686 4687
static netdev_tx_t rtl8169_start_xmit(struct sk_buff *skb,
				      struct net_device *dev)
L
Linus Torvalds 已提交
4688 4689
{
	struct rtl8169_private *tp = netdev_priv(dev);
4690
	unsigned int entry = tp->cur_tx % NUM_TX_DESC;
L
Linus Torvalds 已提交
4691 4692
	struct TxDesc *txd = tp->TxDescArray + entry;
	void __iomem *ioaddr = tp->mmio_addr;
4693
	struct device *d = &tp->pci_dev->dev;
L
Linus Torvalds 已提交
4694 4695
	dma_addr_t mapping;
	u32 status, len;
F
Francois Romieu 已提交
4696
	u32 opts[2];
4697
	int frags;
4698

L
Linus Torvalds 已提交
4699
	if (unlikely(TX_BUFFS_AVAIL(tp) < skb_shinfo(skb)->nr_frags)) {
4700
		netif_err(tp, drv, dev, "BUG! Tx Ring full when queue awake!\n");
4701
		goto err_stop_0;
L
Linus Torvalds 已提交
4702 4703 4704
	}

	if (unlikely(le32_to_cpu(txd->opts1) & DescOwn))
4705 4706 4707
		goto err_stop_0;

	len = skb_headlen(skb);
4708
	mapping = dma_map_single(d, skb->data, len, DMA_TO_DEVICE);
4709 4710 4711
	if (unlikely(dma_mapping_error(d, mapping))) {
		if (net_ratelimit())
			netif_err(tp, drv, dev, "Failed to map TX DMA!\n");
4712
		goto err_dma_0;
4713
	}
4714 4715 4716

	tp->tx_skb[entry].len = len;
	txd->addr = cpu_to_le64(mapping);
L
Linus Torvalds 已提交
4717

F
Francois Romieu 已提交
4718 4719
	opts[1] = cpu_to_le32(rtl8169_tx_vlan_tag(tp, skb));
	opts[0] = DescOwn;
L
Linus Torvalds 已提交
4720

F
Francois Romieu 已提交
4721 4722 4723
	rtl8169_tso_csum(tp, skb, opts);

	frags = rtl8169_xmit_frags(tp, skb, opts);
4724 4725 4726
	if (frags < 0)
		goto err_dma_1;
	else if (frags)
F
Francois Romieu 已提交
4727
		opts[0] |= FirstFrag;
4728
	else {
F
Francois Romieu 已提交
4729
		opts[0] |= FirstFrag | LastFrag;
L
Linus Torvalds 已提交
4730 4731 4732
		tp->tx_skb[entry].skb = skb;
	}

F
Francois Romieu 已提交
4733 4734
	txd->opts2 = cpu_to_le32(opts[1]);

L
Linus Torvalds 已提交
4735 4736
	wmb();

F
Francois Romieu 已提交
4737
	/* Anti gcc 2.95.3 bugware (sic) */
F
Francois Romieu 已提交
4738
	status = opts[0] | len | (RingEnd * !((entry + 1) % NUM_TX_DESC));
L
Linus Torvalds 已提交
4739 4740 4741 4742
	txd->opts1 = cpu_to_le32(status);

	tp->cur_tx += frags + 1;

4743
	wmb();
L
Linus Torvalds 已提交
4744

F
Francois Romieu 已提交
4745
	RTL_W8(TxPoll, NPQ);
L
Linus Torvalds 已提交
4746 4747 4748 4749 4750 4751 4752 4753

	if (TX_BUFFS_AVAIL(tp) < MAX_SKB_FRAGS) {
		netif_stop_queue(dev);
		smp_rmb();
		if (TX_BUFFS_AVAIL(tp) >= MAX_SKB_FRAGS)
			netif_wake_queue(dev);
	}

4754
	return NETDEV_TX_OK;
L
Linus Torvalds 已提交
4755

4756
err_dma_1:
4757
	rtl8169_unmap_tx_skb(d, tp->tx_skb + entry, txd);
4758 4759 4760 4761 4762 4763
err_dma_0:
	dev_kfree_skb(skb);
	dev->stats.tx_dropped++;
	return NETDEV_TX_OK;

err_stop_0:
L
Linus Torvalds 已提交
4764
	netif_stop_queue(dev);
4765
	dev->stats.tx_dropped++;
4766
	return NETDEV_TX_BUSY;
L
Linus Torvalds 已提交
4767 4768 4769 4770 4771 4772 4773 4774 4775 4776 4777
}

static void rtl8169_pcierr_interrupt(struct net_device *dev)
{
	struct rtl8169_private *tp = netdev_priv(dev);
	struct pci_dev *pdev = tp->pci_dev;
	u16 pci_status, pci_cmd;

	pci_read_config_word(pdev, PCI_COMMAND, &pci_cmd);
	pci_read_config_word(pdev, PCI_STATUS, &pci_status);

4778 4779
	netif_err(tp, intr, dev, "PCI error (cmd = 0x%04x, status = 0x%04x)\n",
		  pci_cmd, pci_status);
L
Linus Torvalds 已提交
4780 4781 4782 4783

	/*
	 * The recovery sequence below admits a very elaborated explanation:
	 * - it seems to work;
4784 4785
	 * - I did not see what else could be done;
	 * - it makes iop3xx happy.
L
Linus Torvalds 已提交
4786 4787 4788
	 *
	 * Feel free to adjust to your needs.
	 */
4789
	if (pdev->broken_parity_status)
4790 4791 4792 4793 4794
		pci_cmd &= ~PCI_COMMAND_PARITY;
	else
		pci_cmd |= PCI_COMMAND_SERR | PCI_COMMAND_PARITY;

	pci_write_config_word(pdev, PCI_COMMAND, pci_cmd);
L
Linus Torvalds 已提交
4795 4796 4797 4798 4799 4800 4801 4802

	pci_write_config_word(pdev, PCI_STATUS,
		pci_status & (PCI_STATUS_DETECTED_PARITY |
		PCI_STATUS_SIG_SYSTEM_ERROR | PCI_STATUS_REC_MASTER_ABORT |
		PCI_STATUS_REC_TARGET_ABORT | PCI_STATUS_SIG_TARGET_ABORT));

	/* The infamous DAC f*ckup only happens at boot time */
	if ((tp->cp_cmd & PCIDAC) && !tp->dirty_rx && !tp->cur_rx) {
F
françois romieu 已提交
4803 4804
		void __iomem *ioaddr = tp->mmio_addr;

4805
		netif_info(tp, intr, dev, "disabling PCI DAC\n");
L
Linus Torvalds 已提交
4806 4807 4808 4809 4810
		tp->cp_cmd &= ~PCIDAC;
		RTL_W16(CPlusCmd, tp->cp_cmd);
		dev->features &= ~NETIF_F_HIGHDMA;
	}

F
françois romieu 已提交
4811
	rtl8169_hw_reset(tp);
4812 4813

	rtl8169_schedule_work(dev, rtl8169_reinit_task);
L
Linus Torvalds 已提交
4814 4815
}

F
Francois Romieu 已提交
4816 4817 4818
static void rtl8169_tx_interrupt(struct net_device *dev,
				 struct rtl8169_private *tp,
				 void __iomem *ioaddr)
L
Linus Torvalds 已提交
4819 4820 4821 4822 4823 4824 4825 4826 4827 4828 4829 4830 4831 4832 4833 4834 4835
{
	unsigned int dirty_tx, tx_left;

	dirty_tx = tp->dirty_tx;
	smp_rmb();
	tx_left = tp->cur_tx - dirty_tx;

	while (tx_left > 0) {
		unsigned int entry = dirty_tx % NUM_TX_DESC;
		struct ring_info *tx_skb = tp->tx_skb + entry;
		u32 status;

		rmb();
		status = le32_to_cpu(tp->TxDescArray[entry].opts1);
		if (status & DescOwn)
			break;

4836 4837
		rtl8169_unmap_tx_skb(&tp->pci_dev->dev, tx_skb,
				     tp->TxDescArray + entry);
L
Linus Torvalds 已提交
4838
		if (status & LastFrag) {
4839 4840
			dev->stats.tx_packets++;
			dev->stats.tx_bytes += tx_skb->skb->len;
4841
			dev_kfree_skb(tx_skb->skb);
L
Linus Torvalds 已提交
4842 4843 4844 4845 4846 4847 4848 4849 4850 4851 4852 4853 4854
			tx_skb->skb = NULL;
		}
		dirty_tx++;
		tx_left--;
	}

	if (tp->dirty_tx != dirty_tx) {
		tp->dirty_tx = dirty_tx;
		smp_wmb();
		if (netif_queue_stopped(dev) &&
		    (TX_BUFFS_AVAIL(tp) >= MAX_SKB_FRAGS)) {
			netif_wake_queue(dev);
		}
4855 4856 4857 4858 4859 4860 4861 4862 4863
		/*
		 * 8168 hack: TxPoll requests are lost when the Tx packets are
		 * too close. Let's kick an extra TxPoll request when a burst
		 * of start_xmit activity is detected (if it is not detected,
		 * it is slow enough). -- FR
		 */
		smp_rmb();
		if (tp->cur_tx != dirty_tx)
			RTL_W8(TxPoll, NPQ);
L
Linus Torvalds 已提交
4864 4865 4866
	}
}

4867 4868 4869 4870 4871
static inline int rtl8169_fragmented_frame(u32 status)
{
	return (status & (FirstFrag | LastFrag)) != (FirstFrag | LastFrag);
}

E
Eric Dumazet 已提交
4872
static inline void rtl8169_rx_csum(struct sk_buff *skb, u32 opts1)
L
Linus Torvalds 已提交
4873 4874 4875 4876
{
	u32 status = opts1 & RxProtoMask;

	if (((status == RxProtoTCP) && !(opts1 & TCPFail)) ||
S
Shan Wei 已提交
4877
	    ((status == RxProtoUDP) && !(opts1 & UDPFail)))
L
Linus Torvalds 已提交
4878 4879
		skb->ip_summed = CHECKSUM_UNNECESSARY;
	else
4880
		skb_checksum_none_assert(skb);
L
Linus Torvalds 已提交
4881 4882
}

E
Eric Dumazet 已提交
4883 4884 4885 4886
static struct sk_buff *rtl8169_try_rx_copy(void *data,
					   struct rtl8169_private *tp,
					   int pkt_size,
					   dma_addr_t addr)
L
Linus Torvalds 已提交
4887
{
S
Stephen Hemminger 已提交
4888
	struct sk_buff *skb;
4889
	struct device *d = &tp->pci_dev->dev;
S
Stephen Hemminger 已提交
4890

E
Eric Dumazet 已提交
4891
	data = rtl8169_align(data);
4892
	dma_sync_single_for_cpu(d, addr, pkt_size, DMA_FROM_DEVICE);
E
Eric Dumazet 已提交
4893 4894 4895 4896
	prefetch(data);
	skb = netdev_alloc_skb_ip_align(tp->dev, pkt_size);
	if (skb)
		memcpy(skb->data, data, pkt_size);
4897 4898
	dma_sync_single_for_device(d, addr, pkt_size, DMA_FROM_DEVICE);

E
Eric Dumazet 已提交
4899
	return skb;
L
Linus Torvalds 已提交
4900 4901
}

F
Francois Romieu 已提交
4902 4903
static int rtl8169_rx_interrupt(struct net_device *dev,
				struct rtl8169_private *tp,
4904
				void __iomem *ioaddr, u32 budget)
L
Linus Torvalds 已提交
4905 4906
{
	unsigned int cur_rx, rx_left;
E
Eric Dumazet 已提交
4907
	unsigned int count;
L
Linus Torvalds 已提交
4908 4909 4910

	cur_rx = tp->cur_rx;
	rx_left = NUM_RX_DESC + tp->dirty_rx - cur_rx;
F
Francois Romieu 已提交
4911
	rx_left = min(rx_left, budget);
L
Linus Torvalds 已提交
4912

R
Richard Dawe 已提交
4913
	for (; rx_left > 0; rx_left--, cur_rx++) {
L
Linus Torvalds 已提交
4914
		unsigned int entry = cur_rx % NUM_RX_DESC;
4915
		struct RxDesc *desc = tp->RxDescArray + entry;
L
Linus Torvalds 已提交
4916 4917 4918
		u32 status;

		rmb();
4919
		status = le32_to_cpu(desc->opts1);
L
Linus Torvalds 已提交
4920 4921 4922

		if (status & DescOwn)
			break;
R
Richard Dawe 已提交
4923
		if (unlikely(status & RxRES)) {
4924 4925
			netif_info(tp, rx_err, dev, "Rx ERROR. status = %08x\n",
				   status);
4926
			dev->stats.rx_errors++;
L
Linus Torvalds 已提交
4927
			if (status & (RxRWT | RxRUNT))
4928
				dev->stats.rx_length_errors++;
L
Linus Torvalds 已提交
4929
			if (status & RxCRC)
4930
				dev->stats.rx_crc_errors++;
4931 4932
			if (status & RxFOVF) {
				rtl8169_schedule_work(dev, rtl8169_reset_task);
4933
				dev->stats.rx_fifo_errors++;
4934
			}
E
Eric Dumazet 已提交
4935
			rtl8169_mark_to_asic(desc, rx_buf_sz);
L
Linus Torvalds 已提交
4936
		} else {
E
Eric Dumazet 已提交
4937
			struct sk_buff *skb;
S
Stephen Hemminger 已提交
4938
			dma_addr_t addr = le64_to_cpu(desc->addr);
L
Linus Torvalds 已提交
4939 4940
			int pkt_size = (status & 0x00001FFF) - 4;

4941 4942 4943 4944 4945 4946
			/*
			 * The driver does not support incoming fragmented
			 * frames. They are seen as a symptom of over-mtu
			 * sized frames.
			 */
			if (unlikely(rtl8169_fragmented_frame(status))) {
4947 4948
				dev->stats.rx_dropped++;
				dev->stats.rx_length_errors++;
E
Eric Dumazet 已提交
4949
				rtl8169_mark_to_asic(desc, rx_buf_sz);
R
Richard Dawe 已提交
4950
				continue;
4951 4952
			}

E
Eric Dumazet 已提交
4953 4954 4955 4956 4957 4958
			skb = rtl8169_try_rx_copy(tp->Rx_databuff[entry],
						  tp, pkt_size, addr);
			rtl8169_mark_to_asic(desc, rx_buf_sz);
			if (!skb) {
				dev->stats.rx_dropped++;
				continue;
L
Linus Torvalds 已提交
4959 4960
			}

E
Eric Dumazet 已提交
4961
			rtl8169_rx_csum(skb, status);
L
Linus Torvalds 已提交
4962 4963 4964
			skb_put(skb, pkt_size);
			skb->protocol = eth_type_trans(skb, dev);

4965 4966
			rtl8169_rx_vlan_tag(desc, skb);

4967
			napi_gro_receive(&tp->napi, skb);
L
Linus Torvalds 已提交
4968

4969 4970
			dev->stats.rx_bytes += pkt_size;
			dev->stats.rx_packets++;
L
Linus Torvalds 已提交
4971
		}
4972 4973

		/* Work around for AMD plateform. */
A
Al Viro 已提交
4974
		if ((desc->opts2 & cpu_to_le32(0xfffe000)) &&
4975 4976 4977 4978
		    (tp->mac_version == RTL_GIGA_MAC_VER_05)) {
			desc->opts2 = 0;
			cur_rx++;
		}
L
Linus Torvalds 已提交
4979 4980 4981 4982 4983
	}

	count = cur_rx - tp->cur_rx;
	tp->cur_rx = cur_rx;

E
Eric Dumazet 已提交
4984
	tp->dirty_rx += count;
L
Linus Torvalds 已提交
4985 4986 4987 4988

	return count;
}

F
Francois Romieu 已提交
4989
static irqreturn_t rtl8169_interrupt(int irq, void *dev_instance)
L
Linus Torvalds 已提交
4990
{
F
Francois Romieu 已提交
4991
	struct net_device *dev = dev_instance;
L
Linus Torvalds 已提交
4992 4993 4994
	struct rtl8169_private *tp = netdev_priv(dev);
	void __iomem *ioaddr = tp->mmio_addr;
	int handled = 0;
F
Francois Romieu 已提交
4995
	int status;
L
Linus Torvalds 已提交
4996

4997 4998 4999
	/* loop handling interrupts until we have no new ones or
	 * we hit a invalid/hotplug case.
	 */
F
Francois Romieu 已提交
5000
	status = RTL_R16(IntrStatus);
5001 5002
	while (status && status != 0xffff) {
		handled = 1;
L
Linus Torvalds 已提交
5003

5004 5005 5006 5007 5008 5009 5010
		/* Handle all of the error cases first. These will reset
		 * the chip, so just exit the loop.
		 */
		if (unlikely(!netif_running(dev))) {
			rtl8169_asic_down(ioaddr);
			break;
		}
L
Linus Torvalds 已提交
5011

5012 5013 5014 5015 5016 5017 5018 5019 5020
		if (unlikely(status & RxFIFOOver)) {
			switch (tp->mac_version) {
			/* Work around for rx fifo overflow */
			case RTL_GIGA_MAC_VER_11:
			case RTL_GIGA_MAC_VER_22:
			case RTL_GIGA_MAC_VER_26:
				netif_stop_queue(dev);
				rtl8169_tx_timeout(dev);
				goto done;
5021 5022 5023 5024 5025 5026 5027 5028 5029
			/* Testers needed. */
			case RTL_GIGA_MAC_VER_17:
			case RTL_GIGA_MAC_VER_19:
			case RTL_GIGA_MAC_VER_20:
			case RTL_GIGA_MAC_VER_21:
			case RTL_GIGA_MAC_VER_23:
			case RTL_GIGA_MAC_VER_24:
			case RTL_GIGA_MAC_VER_27:
			case RTL_GIGA_MAC_VER_28:
5030
			case RTL_GIGA_MAC_VER_31:
5031 5032 5033 5034 5035 5036 5037 5038 5039
			/* Experimental science. Pktgen proof. */
			case RTL_GIGA_MAC_VER_12:
			case RTL_GIGA_MAC_VER_25:
				if (status == RxFIFOOver)
					goto done;
				break;
			default:
				break;
			}
5040
		}
L
Linus Torvalds 已提交
5041

5042 5043 5044 5045
		if (unlikely(status & SYSErr)) {
			rtl8169_pcierr_interrupt(dev);
			break;
		}
L
Linus Torvalds 已提交
5046

5047
		if (status & LinkChg)
5048
			__rtl8169_check_link_status(dev, tp, ioaddr, true);
5049

5050 5051 5052 5053 5054 5055 5056 5057 5058 5059 5060
		/* We need to see the lastest version of tp->intr_mask to
		 * avoid ignoring an MSI interrupt and having to wait for
		 * another event which may never come.
		 */
		smp_rmb();
		if (status & tp->intr_mask & tp->napi_event) {
			RTL_W16(IntrMask, tp->intr_event & ~tp->napi_event);
			tp->intr_mask = ~tp->napi_event;

			if (likely(napi_schedule_prep(&tp->napi)))
				__napi_schedule(&tp->napi);
5061 5062 5063
			else
				netif_info(tp, intr, dev,
					   "interrupt %04x in poll\n", status);
5064
		}
L
Linus Torvalds 已提交
5065

5066 5067 5068 5069 5070 5071 5072 5073
		/* We only get a new MSI interrupt when all active irq
		 * sources on the chip have been acknowledged. So, ack
		 * everything we've seen and check if new sources have become
		 * active to avoid blocking all interrupts from the chip.
		 */
		RTL_W16(IntrStatus,
			(status & RxFIFOOver) ? (status | RxOverflow) : status);
		status = RTL_R16(IntrStatus);
F
Francois Romieu 已提交
5074
	}
5075
done:
L
Linus Torvalds 已提交
5076 5077 5078
	return IRQ_RETVAL(handled);
}

5079
static int rtl8169_poll(struct napi_struct *napi, int budget)
L
Linus Torvalds 已提交
5080
{
5081 5082
	struct rtl8169_private *tp = container_of(napi, struct rtl8169_private, napi);
	struct net_device *dev = tp->dev;
L
Linus Torvalds 已提交
5083
	void __iomem *ioaddr = tp->mmio_addr;
5084
	int work_done;
L
Linus Torvalds 已提交
5085

5086
	work_done = rtl8169_rx_interrupt(dev, tp, ioaddr, (u32) budget);
L
Linus Torvalds 已提交
5087 5088
	rtl8169_tx_interrupt(dev, tp, ioaddr);

5089
	if (work_done < budget) {
5090
		napi_complete(napi);
5091 5092 5093 5094 5095 5096 5097

		/* We need for force the visibility of tp->intr_mask
		 * for other CPUs, as we can loose an MSI interrupt
		 * and potentially wait for a retransmit timeout if we don't.
		 * The posted write to IntrMask is safe, as it will
		 * eventually make it to the chip and we won't loose anything
		 * until it does.
L
Linus Torvalds 已提交
5098
		 */
5099
		tp->intr_mask = 0xffff;
5100
		wmb();
5101
		RTL_W16(IntrMask, tp->intr_event);
L
Linus Torvalds 已提交
5102 5103
	}

5104
	return work_done;
L
Linus Torvalds 已提交
5105 5106
}

5107 5108 5109 5110 5111 5112 5113 5114 5115 5116 5117
static void rtl8169_rx_missed(struct net_device *dev, void __iomem *ioaddr)
{
	struct rtl8169_private *tp = netdev_priv(dev);

	if (tp->mac_version > RTL_GIGA_MAC_VER_06)
		return;

	dev->stats.rx_missed_errors += (RTL_R32(RxMissed) & 0xffffff);
	RTL_W32(RxMissed, 0);
}

L
Linus Torvalds 已提交
5118 5119 5120 5121 5122
static void rtl8169_down(struct net_device *dev)
{
	struct rtl8169_private *tp = netdev_priv(dev);
	void __iomem *ioaddr = tp->mmio_addr;

5123
	del_timer_sync(&tp->timer);
L
Linus Torvalds 已提交
5124 5125 5126

	netif_stop_queue(dev);

5127 5128
	napi_disable(&tp->napi);

L
Linus Torvalds 已提交
5129 5130 5131
	spin_lock_irq(&tp->lock);

	rtl8169_asic_down(ioaddr);
S
Stanislaw Gruszka 已提交
5132 5133 5134 5135 5136
	/*
	 * At this point device interrupts can not be enabled in any function,
	 * as netif_running is not true (rtl8169_interrupt, rtl8169_reset_task,
	 * rtl8169_reinit_task) and napi is disabled (rtl8169_poll).
	 */
5137
	rtl8169_rx_missed(dev, ioaddr);
L
Linus Torvalds 已提交
5138 5139 5140 5141 5142 5143

	spin_unlock_irq(&tp->lock);

	synchronize_irq(dev->irq);

	/* Give a racing hard_start_xmit a few cycles to complete. */
5144
	synchronize_sched();  /* FIXME: should this be synchronize_irq()? */
L
Linus Torvalds 已提交
5145 5146 5147 5148

	rtl8169_tx_clear(tp);

	rtl8169_rx_clear(tp);
F
françois romieu 已提交
5149 5150

	rtl_pll_power_down(tp);
L
Linus Torvalds 已提交
5151 5152 5153 5154 5155 5156 5157
}

static int rtl8169_close(struct net_device *dev)
{
	struct rtl8169_private *tp = netdev_priv(dev);
	struct pci_dev *pdev = tp->pci_dev;

5158 5159
	pm_runtime_get_sync(&pdev->dev);

F
Francois Romieu 已提交
5160
	/* Update counters before going down */
5161 5162
	rtl8169_update_counters(dev);

L
Linus Torvalds 已提交
5163 5164 5165 5166
	rtl8169_down(dev);

	free_irq(dev->irq, dev);

5167 5168 5169 5170
	dma_free_coherent(&pdev->dev, R8169_RX_RING_BYTES, tp->RxDescArray,
			  tp->RxPhyAddr);
	dma_free_coherent(&pdev->dev, R8169_TX_RING_BYTES, tp->TxDescArray,
			  tp->TxPhyAddr);
L
Linus Torvalds 已提交
5171 5172 5173
	tp->TxDescArray = NULL;
	tp->RxDescArray = NULL;

5174 5175
	pm_runtime_put_sync(&pdev->dev);

L
Linus Torvalds 已提交
5176 5177 5178
	return 0;
}

5179
static void rtl_set_rx_mode(struct net_device *dev)
L
Linus Torvalds 已提交
5180 5181 5182 5183 5184
{
	struct rtl8169_private *tp = netdev_priv(dev);
	void __iomem *ioaddr = tp->mmio_addr;
	unsigned long flags;
	u32 mc_filter[2];	/* Multicast hash filter */
F
Francois Romieu 已提交
5185
	int rx_mode;
L
Linus Torvalds 已提交
5186 5187 5188 5189
	u32 tmp = 0;

	if (dev->flags & IFF_PROMISC) {
		/* Unconditionally log net taps. */
5190
		netif_notice(tp, link, dev, "Promiscuous mode enabled\n");
L
Linus Torvalds 已提交
5191 5192 5193 5194
		rx_mode =
		    AcceptBroadcast | AcceptMulticast | AcceptMyPhys |
		    AcceptAllPhys;
		mc_filter[1] = mc_filter[0] = 0xffffffff;
5195
	} else if ((netdev_mc_count(dev) > multicast_filter_limit) ||
5196
		   (dev->flags & IFF_ALLMULTI)) {
L
Linus Torvalds 已提交
5197 5198 5199 5200
		/* Too many to filter perfectly -- accept all multicasts. */
		rx_mode = AcceptBroadcast | AcceptMulticast | AcceptMyPhys;
		mc_filter[1] = mc_filter[0] = 0xffffffff;
	} else {
5201
		struct netdev_hw_addr *ha;
F
Francois Romieu 已提交
5202

L
Linus Torvalds 已提交
5203 5204
		rx_mode = AcceptBroadcast | AcceptMyPhys;
		mc_filter[1] = mc_filter[0] = 0;
5205 5206
		netdev_for_each_mc_addr(ha, dev) {
			int bit_nr = ether_crc(ETH_ALEN, ha->addr) >> 26;
L
Linus Torvalds 已提交
5207 5208 5209 5210 5211 5212 5213 5214
			mc_filter[bit_nr >> 5] |= 1 << (bit_nr & 31);
			rx_mode |= AcceptMulticast;
		}
	}

	spin_lock_irqsave(&tp->lock, flags);

	tmp = rtl8169_rx_config | rx_mode |
F
Francois Romieu 已提交
5215
	      (RTL_R32(RxConfig) & RTL_RX_CONFIG_MASK);
L
Linus Torvalds 已提交
5216

5217
	if (tp->mac_version > RTL_GIGA_MAC_VER_06) {
5218 5219 5220 5221
		u32 data = mc_filter[0];

		mc_filter[0] = swab32(mc_filter[1]);
		mc_filter[1] = swab32(data);
5222 5223
	}

L
Linus Torvalds 已提交
5224
	RTL_W32(MAR0 + 4, mc_filter[1]);
5225
	RTL_W32(MAR0 + 0, mc_filter[0]);
L
Linus Torvalds 已提交
5226

5227 5228
	RTL_W32(RxConfig, tmp);

L
Linus Torvalds 已提交
5229 5230 5231 5232 5233 5234 5235 5236 5237 5238 5239 5240 5241 5242 5243 5244 5245
	spin_unlock_irqrestore(&tp->lock, flags);
}

/**
 *  rtl8169_get_stats - Get rtl8169 read/write statistics
 *  @dev: The Ethernet Device to get statistics for
 *
 *  Get TX/RX statistics for rtl8169
 */
static struct net_device_stats *rtl8169_get_stats(struct net_device *dev)
{
	struct rtl8169_private *tp = netdev_priv(dev);
	void __iomem *ioaddr = tp->mmio_addr;
	unsigned long flags;

	if (netif_running(dev)) {
		spin_lock_irqsave(&tp->lock, flags);
5246
		rtl8169_rx_missed(dev, ioaddr);
L
Linus Torvalds 已提交
5247 5248
		spin_unlock_irqrestore(&tp->lock, flags);
	}
5249

5250
	return &dev->stats;
L
Linus Torvalds 已提交
5251 5252
}

5253
static void rtl8169_net_suspend(struct net_device *dev)
5254
{
F
françois romieu 已提交
5255 5256
	struct rtl8169_private *tp = netdev_priv(dev);

5257
	if (!netif_running(dev))
5258
		return;
5259

F
françois romieu 已提交
5260 5261
	rtl_pll_power_down(tp);

5262 5263
	netif_device_detach(dev);
	netif_stop_queue(dev);
5264 5265 5266 5267 5268 5269 5270 5271
}

#ifdef CONFIG_PM

static int rtl8169_suspend(struct device *device)
{
	struct pci_dev *pdev = to_pci_dev(device);
	struct net_device *dev = pci_get_drvdata(pdev);
5272

5273
	rtl8169_net_suspend(dev);
5274

5275 5276 5277
	return 0;
}

5278 5279
static void __rtl8169_resume(struct net_device *dev)
{
F
françois romieu 已提交
5280 5281
	struct rtl8169_private *tp = netdev_priv(dev);

5282
	netif_device_attach(dev);
F
françois romieu 已提交
5283 5284 5285

	rtl_pll_power_up(tp);

5286 5287 5288
	rtl8169_schedule_work(dev, rtl8169_reset_task);
}

5289
static int rtl8169_resume(struct device *device)
5290
{
5291
	struct pci_dev *pdev = to_pci_dev(device);
5292
	struct net_device *dev = pci_get_drvdata(pdev);
S
Stanislaw Gruszka 已提交
5293 5294 5295
	struct rtl8169_private *tp = netdev_priv(dev);

	rtl8169_init_phy(dev, tp);
5296

5297 5298
	if (netif_running(dev))
		__rtl8169_resume(dev);
5299

5300 5301 5302 5303 5304 5305 5306 5307 5308 5309 5310 5311 5312 5313 5314 5315 5316 5317 5318 5319 5320 5321 5322 5323 5324 5325 5326 5327 5328 5329 5330 5331 5332 5333 5334 5335
	return 0;
}

static int rtl8169_runtime_suspend(struct device *device)
{
	struct pci_dev *pdev = to_pci_dev(device);
	struct net_device *dev = pci_get_drvdata(pdev);
	struct rtl8169_private *tp = netdev_priv(dev);

	if (!tp->TxDescArray)
		return 0;

	spin_lock_irq(&tp->lock);
	tp->saved_wolopts = __rtl8169_get_wol(tp);
	__rtl8169_set_wol(tp, WAKE_ANY);
	spin_unlock_irq(&tp->lock);

	rtl8169_net_suspend(dev);

	return 0;
}

static int rtl8169_runtime_resume(struct device *device)
{
	struct pci_dev *pdev = to_pci_dev(device);
	struct net_device *dev = pci_get_drvdata(pdev);
	struct rtl8169_private *tp = netdev_priv(dev);

	if (!tp->TxDescArray)
		return 0;

	spin_lock_irq(&tp->lock);
	__rtl8169_set_wol(tp, tp->saved_wolopts);
	tp->saved_wolopts = 0;
	spin_unlock_irq(&tp->lock);

S
Stanislaw Gruszka 已提交
5336 5337
	rtl8169_init_phy(dev, tp);

5338
	__rtl8169_resume(dev);
5339 5340 5341 5342

	return 0;
}

5343 5344 5345 5346 5347 5348
static int rtl8169_runtime_idle(struct device *device)
{
	struct pci_dev *pdev = to_pci_dev(device);
	struct net_device *dev = pci_get_drvdata(pdev);
	struct rtl8169_private *tp = netdev_priv(dev);

5349
	return tp->TxDescArray ? -EBUSY : 0;
5350 5351
}

5352
static const struct dev_pm_ops rtl8169_pm_ops = {
F
Francois Romieu 已提交
5353 5354 5355 5356 5357 5358 5359 5360 5361
	.suspend		= rtl8169_suspend,
	.resume			= rtl8169_resume,
	.freeze			= rtl8169_suspend,
	.thaw			= rtl8169_resume,
	.poweroff		= rtl8169_suspend,
	.restore		= rtl8169_resume,
	.runtime_suspend	= rtl8169_runtime_suspend,
	.runtime_resume		= rtl8169_runtime_resume,
	.runtime_idle		= rtl8169_runtime_idle,
5362 5363 5364 5365 5366 5367 5368 5369 5370 5371
};

#define RTL8169_PM_OPS	(&rtl8169_pm_ops)

#else /* !CONFIG_PM */

#define RTL8169_PM_OPS	NULL

#endif /* !CONFIG_PM */

F
Francois Romieu 已提交
5372 5373
static void rtl_shutdown(struct pci_dev *pdev)
{
5374
	struct net_device *dev = pci_get_drvdata(pdev);
5375 5376
	struct rtl8169_private *tp = netdev_priv(dev);
	void __iomem *ioaddr = tp->mmio_addr;
5377 5378

	rtl8169_net_suspend(dev);
F
Francois Romieu 已提交
5379

F
Francois Romieu 已提交
5380
	/* Restore original MAC address */
5381 5382
	rtl_rar_set(tp, dev->perm_addr);

5383 5384 5385 5386 5387 5388
	spin_lock_irq(&tp->lock);

	rtl8169_asic_down(ioaddr);

	spin_unlock_irq(&tp->lock);

5389
	if (system_state == SYSTEM_POWER_OFF) {
5390 5391 5392 5393 5394 5395 5396 5397 5398
		/* WoL fails with some 8168 when the receiver is disabled. */
		if (tp->features & RTL_FEATURE_WOL) {
			pci_clear_master(pdev);

			RTL_W8(ChipCmd, CmdRxEnb);
			/* PCI commit */
			RTL_R8(ChipCmd);
		}

5399 5400 5401 5402
		pci_wake_from_d3(pdev, true);
		pci_set_power_state(pdev, PCI_D3hot);
	}
}
5403

L
Linus Torvalds 已提交
5404 5405 5406 5407 5408
static struct pci_driver rtl8169_pci_driver = {
	.name		= MODULENAME,
	.id_table	= rtl8169_pci_tbl,
	.probe		= rtl8169_init_one,
	.remove		= __devexit_p(rtl8169_remove_one),
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	.shutdown	= rtl_shutdown,
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	.driver.pm	= RTL8169_PM_OPS,
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};

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static int __init rtl8169_init_module(void)
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{
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	return pci_register_driver(&rtl8169_pci_driver);
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}

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static void __exit rtl8169_cleanup_module(void)
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{
	pci_unregister_driver(&rtl8169_pci_driver);
}

module_init(rtl8169_init_module);
module_exit(rtl8169_cleanup_module);