at91sam9g45.dtsi 21.1 KB
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/*
 * at91sam9g45.dtsi - Device Tree Include file for AT91SAM9G45 family SoC
 *                    applies to AT91SAM9G45, AT91SAM9M10,
 *                    AT91SAM9G46, AT91SAM9M11 SoC
 *
 *  Copyright (C) 2011 Atmel,
 *                2011 Nicolas Ferre <nicolas.ferre@atmel.com>
 *
 * Licensed under GPLv2 or later.
 */

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#include "skeleton.dtsi"
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#include <dt-bindings/dma/at91.h>
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#include <dt-bindings/pinctrl/at91.h>
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#include <dt-bindings/interrupt-controller/irq.h>
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#include <dt-bindings/gpio/gpio.h>
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/ {
	model = "Atmel AT91SAM9G45 family SoC";
	compatible = "atmel,at91sam9g45";
	interrupt-parent = <&aic>;

	aliases {
		serial0 = &dbgu;
		serial1 = &usart0;
		serial2 = &usart1;
		serial3 = &usart2;
		serial4 = &usart3;
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		gpio0 = &pioA;
		gpio1 = &pioB;
		gpio2 = &pioC;
		gpio3 = &pioD;
		gpio4 = &pioE;
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		tcb0 = &tcb0;
		tcb1 = &tcb1;
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		i2c0 = &i2c0;
		i2c1 = &i2c1;
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		ssc0 = &ssc0;
		ssc1 = &ssc1;
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	};
	cpus {
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		#address-cells = <0>;
		#size-cells = <0>;

		cpu {
			compatible = "arm,arm926ej-s";
			device_type = "cpu";
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		};
	};

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	memory {
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		reg = <0x70000000 0x10000000>;
	};

	ahb {
		compatible = "simple-bus";
		#address-cells = <1>;
		#size-cells = <1>;
		ranges;

		apb {
			compatible = "simple-bus";
			#address-cells = <1>;
			#size-cells = <1>;
			ranges;

			aic: interrupt-controller@fffff000 {
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				#interrupt-cells = <3>;
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				compatible = "atmel,at91rm9200-aic";
				interrupt-controller;
				reg = <0xfffff000 0x200>;
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				atmel,external-irqs = <31>;
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			};

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			ramc0: ramc@ffffe400 {
				compatible = "atmel,at91sam9g45-ddramc";
				reg = <0xffffe400 0x200
				       0xffffe600 0x200>;
			};

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			pmc: pmc@fffffc00 {
				compatible = "atmel,at91rm9200-pmc";
				reg = <0xfffffc00 0x100>;
			};

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			rstc@fffffd00 {
				compatible = "atmel,at91sam9g45-rstc";
				reg = <0xfffffd00 0x10>;
			};

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			pit: timer@fffffd30 {
				compatible = "atmel,at91sam9260-pit";
				reg = <0xfffffd30 0xf>;
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				interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
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			};

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			shdwc@fffffd10 {
				compatible = "atmel,at91sam9rl-shdwc";
				reg = <0xfffffd10 0x10>;
			};

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			tcb0: timer@fff7c000 {
				compatible = "atmel,at91rm9200-tcb";
				reg = <0xfff7c000 0x100>;
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				interrupts = <18 IRQ_TYPE_LEVEL_HIGH 0>;
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			};

			tcb1: timer@fffd4000 {
				compatible = "atmel,at91rm9200-tcb";
				reg = <0xfffd4000 0x100>;
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				interrupts = <18 IRQ_TYPE_LEVEL_HIGH 0>;
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			};

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			dma: dma-controller@ffffec00 {
				compatible = "atmel,at91sam9g45-dma";
				reg = <0xffffec00 0x200>;
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				interrupts = <21 IRQ_TYPE_LEVEL_HIGH 0>;
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				#dma-cells = <2>;
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			};

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			pinctrl@fffff200 {
				#address-cells = <1>;
				#size-cells = <1>;
				compatible = "atmel,at91rm9200-pinctrl", "simple-bus";
				ranges = <0xfffff200 0xfffff200 0xa00>;

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				atmel,mux-mask = <
				      /*    A         B     */
				       0xffffffff 0xffc003ff  /* pioA */
				       0xffffffff 0x800f8f00  /* pioB */
				       0xffffffff 0x00000e00  /* pioC */
				       0xffffffff 0xff0c1381  /* pioD */
				       0xffffffff 0x81ffff81  /* pioE */
				      >;

				/* shared pinctrl settings */
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				dbgu {
					pinctrl_dbgu: dbgu-0 {
						atmel,pins =
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							<AT91_PIOB 12 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PB12 periph A */
							 AT91_PIOB 13 AT91_PERIPH_A AT91_PINCTRL_NONE>;	/* PB13 periph A */
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					};
				};

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				usart0 {
					pinctrl_usart0: usart0-0 {
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						atmel,pins =
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							<AT91_PIOB 19 AT91_PERIPH_A AT91_PINCTRL_PULL_UP	/* PB19 periph A with pullup */
							 AT91_PIOB 18 AT91_PERIPH_A AT91_PINCTRL_NONE>;	/* PB18 periph A */
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					};

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					pinctrl_usart0_rts: usart0_rts-0 {
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						atmel,pins =
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							<AT91_PIOB 17 AT91_PERIPH_B AT91_PINCTRL_NONE>;	/* PB17 periph B */
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					};

					pinctrl_usart0_cts: usart0_cts-0 {
						atmel,pins =
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							<AT91_PIOB 15 AT91_PERIPH_B AT91_PINCTRL_NONE>;	/* PB15 periph B */
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					};
				};

				uart1 {
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					pinctrl_usart1: usart1-0 {
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						atmel,pins =
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							<AT91_PIOB 4 AT91_PERIPH_A AT91_PINCTRL_PULL_UP	/* PB4 periph A with pullup */
							 AT91_PIOB 5 AT91_PERIPH_A AT91_PINCTRL_NONE>;	/* PB5 periph A */
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					};

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					pinctrl_usart1_rts: usart1_rts-0 {
						atmel,pins =
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							<AT91_PIOD 16 AT91_PERIPH_A AT91_PINCTRL_NONE>;	/* PD16 periph A */
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					};

					pinctrl_usart1_cts: usart1_cts-0 {
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						atmel,pins =
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							<AT91_PIOD 17 AT91_PERIPH_A AT91_PINCTRL_NONE>;	/* PD17 periph A */
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					};
				};

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				usart2 {
					pinctrl_usart2: usart2-0 {
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						atmel,pins =
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							<AT91_PIOB 6 AT91_PERIPH_A AT91_PINCTRL_PULL_UP	/* PB6 periph A with pullup */
							 AT91_PIOB 7 AT91_PERIPH_A AT91_PINCTRL_NONE>;	/* PB7 periph A */
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					};

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					pinctrl_usart2_rts: usart2_rts-0 {
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						atmel,pins =
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							<AT91_PIOC 9 AT91_PERIPH_B AT91_PINCTRL_NONE>;	/* PC9 periph B */
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					};

					pinctrl_usart2_cts: usart2_cts-0 {
						atmel,pins =
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							<AT91_PIOC 11 AT91_PERIPH_B AT91_PINCTRL_NONE>;	/* PC11 periph B */
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					};
				};

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				usart3 {
					pinctrl_usart3: usart3-0 {
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						atmel,pins =
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							<AT91_PIOB 8 AT91_PERIPH_A AT91_PINCTRL_PULL_UP	/* PB9 periph A with pullup */
							 AT91_PIOB 9 AT91_PERIPH_A AT91_PINCTRL_NONE>;	/* PB8 periph A */
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					};

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					pinctrl_usart3_rts: usart3_rts-0 {
						atmel,pins =
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							<AT91_PIOA 23 AT91_PERIPH_B AT91_PINCTRL_NONE>;	/* PA23 periph B */
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					};

					pinctrl_usart3_cts: usart3_cts-0 {
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						atmel,pins =
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							<AT91_PIOA 24 AT91_PERIPH_B AT91_PINCTRL_NONE>;	/* PA24 periph B */
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					};
				};
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				nand {
					pinctrl_nand: nand-0 {
						atmel,pins =
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							<AT91_PIOC 8 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP	/* PC8 gpio RDY pin pull_up*/
							 AT91_PIOC 14 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>;	/* PC14 gpio enable pin pull_up */
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					};
				};

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				macb {
					pinctrl_macb_rmii: macb_rmii-0 {
						atmel,pins =
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							<AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PA10 periph A */
							 AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PA11 periph A */
							 AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PA12 periph A */
							 AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PA13 periph A */
							 AT91_PIOA 14 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PA14 periph A */
							 AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PA15 periph A */
							 AT91_PIOA 16 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PA16 periph A */
							 AT91_PIOA 17 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PA17 periph A */
							 AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PA18 periph A */
							 AT91_PIOA 19 AT91_PERIPH_A AT91_PINCTRL_NONE>;	/* PA19 periph A */
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					};

					pinctrl_macb_rmii_mii: macb_rmii_mii-0 {
						atmel,pins =
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							<AT91_PIOA 6 AT91_PERIPH_B AT91_PINCTRL_NONE	/* PA6 periph B */
							 AT91_PIOA 7 AT91_PERIPH_B AT91_PINCTRL_NONE	/* PA7 periph B */
							 AT91_PIOA 8 AT91_PERIPH_B AT91_PINCTRL_NONE	/* PA8 periph B */
							 AT91_PIOA 9 AT91_PERIPH_B AT91_PINCTRL_NONE	/* PA9 periph B */
							 AT91_PIOA 27 AT91_PERIPH_B AT91_PINCTRL_NONE	/* PA27 periph B */
							 AT91_PIOA 28 AT91_PERIPH_B AT91_PINCTRL_NONE	/* PA28 periph B */
							 AT91_PIOA 29 AT91_PERIPH_B AT91_PINCTRL_NONE	/* PA29 periph B */
							 AT91_PIOA 30 AT91_PERIPH_B AT91_PINCTRL_NONE>;	/* PA30 periph B */
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					};
				};

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				mmc0 {
					pinctrl_mmc0_slot0_clk_cmd_dat0: mmc0_slot0_clk_cmd_dat0-0 {
						atmel,pins =
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							<AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PA0 periph A */
							 AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_PULL_UP	/* PA1 periph A with pullup */
							 AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;	/* PA2 periph A with pullup */
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					};

					pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 {
						atmel,pins =
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							<AT91_PIOA 3 AT91_PERIPH_A AT91_PINCTRL_PULL_UP	/* PA3 periph A with pullup */
							 AT91_PIOA 4 AT91_PERIPH_A AT91_PINCTRL_PULL_UP	/* PA4 periph A with pullup */
							 AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;	/* PA5 periph A with pullup */
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					};

					pinctrl_mmc0_slot0_dat4_7: mmc0_slot0_dat4_7-0 {
						atmel,pins =
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							<AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_PULL_UP	/* PA6 periph A with pullup */
							 AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_PULL_UP	/* PA7 periph A with pullup */
							 AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_PULL_UP	/* PA8 periph A with pullup */
							 AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;	/* PA9 periph A with pullup */
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					};
				};

				mmc1 {
					pinctrl_mmc1_slot0_clk_cmd_dat0: mmc1_slot0_clk_cmd_dat0-0 {
						atmel,pins =
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							<AT91_PIOA 31 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PA31 periph A */
							 AT91_PIOA 22 AT91_PERIPH_A AT91_PINCTRL_PULL_UP	/* PA22 periph A with pullup */
							 AT91_PIOA 23 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;	/* PA23 periph A with pullup */
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					};

					pinctrl_mmc1_slot0_dat1_3: mmc1_slot0_dat1_3-0 {
						atmel,pins =
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							<AT91_PIOA 24 AT91_PERIPH_A AT91_PINCTRL_PULL_UP	/* PA24 periph A with pullup */
							 AT91_PIOA 25 AT91_PERIPH_A AT91_PINCTRL_PULL_UP	/* PA25 periph A with pullup */
							 AT91_PIOA 26 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;	/* PA26 periph A with pullup */
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					};

					pinctrl_mmc1_slot0_dat4_7: mmc1_slot0_dat4_7-0 {
						atmel,pins =
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							<AT91_PIOA 27 AT91_PERIPH_A AT91_PINCTRL_PULL_UP	/* PA27 periph A with pullup */
							 AT91_PIOA 28 AT91_PERIPH_A AT91_PINCTRL_PULL_UP	/* PA28 periph A with pullup */
							 AT91_PIOA 29 AT91_PERIPH_A AT91_PINCTRL_PULL_UP	/* PA29 periph A with pullup */
							 AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;	/* PA30 periph A with pullup */
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					};
				};

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				ssc0 {
					pinctrl_ssc0_tx: ssc0_tx-0 {
						atmel,pins =
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							<AT91_PIOD 0 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PD0 periph A */
							 AT91_PIOD 1 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PD1 periph A */
							 AT91_PIOD 2 AT91_PERIPH_A AT91_PINCTRL_NONE>;	/* PD2 periph A */
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					};

					pinctrl_ssc0_rx: ssc0_rx-0 {
						atmel,pins =
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							<AT91_PIOD 3 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PD3 periph A */
							 AT91_PIOD 4 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PD4 periph A */
							 AT91_PIOD 5 AT91_PERIPH_A AT91_PINCTRL_NONE>;	/* PD5 periph A */
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					};
				};

				ssc1 {
					pinctrl_ssc1_tx: ssc1_tx-0 {
						atmel,pins =
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							<AT91_PIOD 10 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PD10 periph A */
							 AT91_PIOD 11 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PD11 periph A */
							 AT91_PIOD 12 AT91_PERIPH_A AT91_PINCTRL_NONE>;	/* PD12 periph A */
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					};

					pinctrl_ssc1_rx: ssc1_rx-0 {
						atmel,pins =
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							<AT91_PIOD 13 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PD13 periph A */
							 AT91_PIOD 14 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PD14 periph A */
							 AT91_PIOD 15 AT91_PERIPH_A AT91_PINCTRL_NONE>;	/* PD15 periph A */
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					};
				};

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				spi0 {
					pinctrl_spi0: spi0-0 {
						atmel,pins =
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							<AT91_PIOB 0 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PB0 periph A SPI0_MISO pin */
							 AT91_PIOB 1 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PB1 periph A SPI0_MOSI pin */
							 AT91_PIOB 2 AT91_PERIPH_A AT91_PINCTRL_NONE>;	/* PB2 periph A SPI0_SPCK pin */
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					};
				};

				spi1 {
					pinctrl_spi1: spi1-0 {
						atmel,pins =
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							<AT91_PIOB 14 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PB14 periph A SPI1_MISO pin */
							 AT91_PIOB 15 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PB15 periph A SPI1_MOSI pin */
							 AT91_PIOB 16 AT91_PERIPH_A AT91_PINCTRL_NONE>;	/* PB16 periph A SPI1_SPCK pin */
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					};
				};

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				tcb0 {
					pinctrl_tcb0_tclk0: tcb0_tclk0-0 {
						atmel,pins = <AT91_PIOD 23 AT91_PERIPH_A AT91_PINCTRL_NONE>;
					};

					pinctrl_tcb0_tclk1: tcb0_tclk1-0 {
						atmel,pins = <AT91_PIOD 29 AT91_PERIPH_A AT91_PINCTRL_NONE>;
					};

					pinctrl_tcb0_tclk2: tcb0_tclk2-0 {
						atmel,pins = <AT91_PIOC 10 AT91_PERIPH_B AT91_PINCTRL_NONE>;
					};

					pinctrl_tcb0_tioa0: tcb0_tioa0-0 {
						atmel,pins = <AT91_PIOD 20 AT91_PERIPH_A AT91_PINCTRL_NONE>;
					};

					pinctrl_tcb0_tioa1: tcb0_tioa1-0 {
						atmel,pins = <AT91_PIOD 21 AT91_PERIPH_A AT91_PINCTRL_NONE>;
					};

					pinctrl_tcb0_tioa2: tcb0_tioa2-0 {
						atmel,pins = <AT91_PIOD 22 AT91_PERIPH_A AT91_PINCTRL_NONE>;
					};

					pinctrl_tcb0_tiob0: tcb0_tiob0-0 {
						atmel,pins = <AT91_PIOD 30 AT91_PERIPH_A AT91_PINCTRL_NONE>;
					};

					pinctrl_tcb0_tiob1: tcb0_tiob1-0 {
						atmel,pins = <AT91_PIOD 31 AT91_PERIPH_A AT91_PINCTRL_NONE>;
					};

					pinctrl_tcb0_tiob2: tcb0_tiob2-0 {
						atmel,pins = <AT91_PIOA 26 AT91_PERIPH_B AT91_PINCTRL_NONE>;
					};
				};

				tcb1 {
					pinctrl_tcb1_tclk0: tcb1_tclk0-0 {
						atmel,pins = <AT91_PIOA 0 AT91_PERIPH_B AT91_PINCTRL_NONE>;
					};

					pinctrl_tcb1_tclk1: tcb1_tclk1-0 {
						atmel,pins = <AT91_PIOA 3 AT91_PERIPH_B AT91_PINCTRL_NONE>;
					};

					pinctrl_tcb1_tclk2: tcb1_tclk2-0 {
						atmel,pins = <AT91_PIOD 9 AT91_PERIPH_B AT91_PINCTRL_NONE>;
					};

					pinctrl_tcb1_tioa0: tcb1_tioa0-0 {
						atmel,pins = <AT91_PIOA 1 AT91_PERIPH_B AT91_PINCTRL_NONE>;
					};

					pinctrl_tcb1_tioa1: tcb1_tioa1-0 {
						atmel,pins = <AT91_PIOA 4 AT91_PERIPH_B AT91_PINCTRL_NONE>;
					};

					pinctrl_tcb1_tioa2: tcb1_tioa2-0 {
						atmel,pins = <AT91_PIOD 7 AT91_PERIPH_B AT91_PINCTRL_NONE>;
					};

					pinctrl_tcb1_tiob0: tcb1_tiob0-0 {
						atmel,pins = <AT91_PIOA 2 AT91_PERIPH_B AT91_PINCTRL_NONE>;
					};

					pinctrl_tcb1_tiob1: tcb1_tiob1-0 {
						atmel,pins = <AT91_PIOA 5 AT91_PERIPH_B AT91_PINCTRL_NONE>;
					};

					pinctrl_tcb1_tiob2: tcb1_tiob2-0 {
						atmel,pins = <AT91_PIOD 8 AT91_PERIPH_B AT91_PINCTRL_NONE>;
					};
				};

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				pioA: gpio@fffff200 {
					compatible = "atmel,at91rm9200-gpio";
					reg = <0xfffff200 0x200>;
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					interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>;
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					#gpio-cells = <2>;
					gpio-controller;
					interrupt-controller;
					#interrupt-cells = <2>;
				};

				pioB: gpio@fffff400 {
					compatible = "atmel,at91rm9200-gpio";
					reg = <0xfffff400 0x200>;
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					interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>;
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					#gpio-cells = <2>;
					gpio-controller;
					interrupt-controller;
					#interrupt-cells = <2>;
				};

				pioC: gpio@fffff600 {
					compatible = "atmel,at91rm9200-gpio";
					reg = <0xfffff600 0x200>;
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					interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>;
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					#gpio-cells = <2>;
					gpio-controller;
					interrupt-controller;
					#interrupt-cells = <2>;
				};

				pioD: gpio@fffff800 {
					compatible = "atmel,at91rm9200-gpio";
					reg = <0xfffff800 0x200>;
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					interrupts = <5 IRQ_TYPE_LEVEL_HIGH 1>;
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					#gpio-cells = <2>;
					gpio-controller;
					interrupt-controller;
					#interrupt-cells = <2>;
				};

				pioE: gpio@fffffa00 {
					compatible = "atmel,at91rm9200-gpio";
					reg = <0xfffffa00 0x200>;
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					interrupts = <5 IRQ_TYPE_LEVEL_HIGH 1>;
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					#gpio-cells = <2>;
					gpio-controller;
					interrupt-controller;
					#interrupt-cells = <2>;
				};
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			};

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			dbgu: serial@ffffee00 {
				compatible = "atmel,at91sam9260-usart";
				reg = <0xffffee00 0x200>;
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				interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
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				pinctrl-names = "default";
				pinctrl-0 = <&pinctrl_dbgu>;
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				status = "disabled";
			};

			usart0: serial@fff8c000 {
				compatible = "atmel,at91sam9260-usart";
				reg = <0xfff8c000 0x200>;
491
				interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>;
492 493
				atmel,use-dma-rx;
				atmel,use-dma-tx;
494
				pinctrl-names = "default";
495
				pinctrl-0 = <&pinctrl_usart0>;
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				status = "disabled";
			};

			usart1: serial@fff90000 {
				compatible = "atmel,at91sam9260-usart";
				reg = <0xfff90000 0x200>;
502
				interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>;
503 504
				atmel,use-dma-rx;
				atmel,use-dma-tx;
505
				pinctrl-names = "default";
506
				pinctrl-0 = <&pinctrl_usart1>;
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				status = "disabled";
			};

			usart2: serial@fff94000 {
				compatible = "atmel,at91sam9260-usart";
				reg = <0xfff94000 0x200>;
513
				interrupts = <9 IRQ_TYPE_LEVEL_HIGH 5>;
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				atmel,use-dma-rx;
				atmel,use-dma-tx;
516
				pinctrl-names = "default";
517
				pinctrl-0 = <&pinctrl_usart2>;
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				status = "disabled";
			};

			usart3: serial@fff98000 {
				compatible = "atmel,at91sam9260-usart";
				reg = <0xfff98000 0x200>;
524
				interrupts = <10 IRQ_TYPE_LEVEL_HIGH 5>;
525 526
				atmel,use-dma-rx;
				atmel,use-dma-tx;
527
				pinctrl-names = "default";
528
				pinctrl-0 = <&pinctrl_usart3>;
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				status = "disabled";
			};
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			macb0: ethernet@fffbc000 {
				compatible = "cdns,at32ap7000-macb", "cdns,macb";
				reg = <0xfffbc000 0x100>;
535
				interrupts = <25 IRQ_TYPE_LEVEL_HIGH 3>;
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				pinctrl-names = "default";
				pinctrl-0 = <&pinctrl_macb_rmii>;
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				status = "disabled";
			};
540

541 542 543
			i2c0: i2c@fff84000 {
				compatible = "atmel,at91sam9g10-i2c";
				reg = <0xfff84000 0x100>;
544
				interrupts = <12 IRQ_TYPE_LEVEL_HIGH 6>;
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				#address-cells = <1>;
				#size-cells = <0>;
				status = "disabled";
			};

			i2c1: i2c@fff88000 {
				compatible = "atmel,at91sam9g10-i2c";
				reg = <0xfff88000 0x100>;
553
				interrupts = <13 IRQ_TYPE_LEVEL_HIGH 6>;
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				#address-cells = <1>;
				#size-cells = <0>;
				status = "disabled";
			};

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			ssc0: ssc@fff9c000 {
				compatible = "atmel,at91sam9g45-ssc";
				reg = <0xfff9c000 0x4000>;
562
				interrupts = <16 IRQ_TYPE_LEVEL_HIGH 5>;
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				pinctrl-names = "default";
				pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
565
				status = "disabled";
566 567 568 569 570
			};

			ssc1: ssc@fffa0000 {
				compatible = "atmel,at91sam9g45-ssc";
				reg = <0xfffa0000 0x4000>;
571
				interrupts = <17 IRQ_TYPE_LEVEL_HIGH 5>;
572 573
				pinctrl-names = "default";
				pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>;
574
				status = "disabled";
575 576
			};

577 578 579
			adc0: adc@fffb0000 {
				compatible = "atmel,at91sam9260-adc";
				reg = <0xfffb0000 0x100>;
580
				interrupts = <20 IRQ_TYPE_LEVEL_HIGH 0>;
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				atmel,adc-use-external-triggers;
				atmel,adc-channels-used = <0xff>;
				atmel,adc-vref = <3300>;
				atmel,adc-num-channels = <8>;
				atmel,adc-startup-time = <40>;
				atmel,adc-channel-base = <0x30>;
				atmel,adc-drdy-mask = <0x10000>;
				atmel,adc-status-register = <0x1c>;
				atmel,adc-trigger-register = <0x08>;
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				atmel,adc-res = <8 10>;
				atmel,adc-res-names = "lowres", "highres";
				atmel,adc-use-res = "highres";
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				trigger@0 {
					trigger-name = "external-rising";
					trigger-value = <0x1>;
					trigger-external;
				};
				trigger@1 {
					trigger-name = "external-falling";
					trigger-value = <0x2>;
					trigger-external;
				};

				trigger@2 {
					trigger-name = "external-any";
					trigger-value = <0x3>;
					trigger-external;
				};

				trigger@3 {
					trigger-name = "continuous";
					trigger-value = <0x6>;
				};
			};
616 617 618 619

			mmc0: mmc@fff80000 {
				compatible = "atmel,hsmci";
				reg = <0xfff80000 0x600>;
620
				interrupts = <11 IRQ_TYPE_LEVEL_HIGH 0>;
621
				dmas = <&dma 1 AT91_DMA_CFG_PER_ID(0)>;
622
				dma-names = "rxtx";
623 624 625 626 627 628 629 630
				#address-cells = <1>;
				#size-cells = <0>;
				status = "disabled";
			};

			mmc1: mmc@fffd0000 {
				compatible = "atmel,hsmci";
				reg = <0xfffd0000 0x600>;
631
				interrupts = <29 IRQ_TYPE_LEVEL_HIGH 0>;
632
				dmas = <&dma 1 AT91_DMA_CFG_PER_ID(13)>;
633
				dma-names = "rxtx";
634 635 636
				#address-cells = <1>;
				#size-cells = <0>;
				status = "disabled";
637 638
			};

639 640 641 642
			watchdog@fffffd40 {
				compatible = "atmel,at91sam9260-wdt";
				reg = <0xfffffd40 0x10>;
				status = "disabled";
643 644 645 646 647 648 649 650
			};

			spi0: spi@fffa4000 {
				#address-cells = <1>;
				#size-cells = <0>;
				compatible = "atmel,at91rm9200-spi";
				reg = <0xfffa4000 0x200>;
				interrupts = <14 4 3>;
651 652
				pinctrl-names = "default";
				pinctrl-0 = <&pinctrl_spi0>;
653 654 655 656 657 658 659 660 661
				status = "disabled";
			};

			spi1: spi@fffa8000 {
				#address-cells = <1>;
				#size-cells = <0>;
				compatible = "atmel,at91rm9200-spi";
				reg = <0xfffa8000 0x200>;
				interrupts = <15 4 3>;
662 663
				pinctrl-names = "default";
				pinctrl-0 = <&pinctrl_spi1>;
664
				status = "disabled";
665
			};
666 667 668 669 670 671 672 673 674 675 676 677 678 679 680 681 682 683 684 685 686 687 688 689 690 691 692 693 694 695 696 697 698 699 700 701 702 703 704 705 706 707 708 709 710 711 712 713 714 715 716 717 718 719 720 721 722 723 724 725 726 727

			usb2: gadget@fff78000 {
				#address-cells = <1>;
				#size-cells = <0>;
				compatible = "atmel,at91sam9rl-udc";
				reg = <0x00600000 0x80000
				       0xfff78000 0x400>;
				interrupts = <27 IRQ_TYPE_LEVEL_HIGH 0>;
				status = "disabled";

				ep0 {
					reg = <0>;
					atmel,fifo-size = <64>;
					atmel,nb-banks = <1>;
				};

				ep1 {
					reg = <1>;
					atmel,fifo-size = <1024>;
					atmel,nb-banks = <2>;
					atmel,can-dma;
					atmel,can-isoc;
				};

				ep2 {
					reg = <2>;
					atmel,fifo-size = <1024>;
					atmel,nb-banks = <2>;
					atmel,can-dma;
					atmel,can-isoc;
				};

				ep3 {
					reg = <3>;
					atmel,fifo-size = <1024>;
					atmel,nb-banks = <3>;
					atmel,can-dma;
				};

				ep4 {
					reg = <4>;
					atmel,fifo-size = <1024>;
					atmel,nb-banks = <3>;
					atmel,can-dma;
				};

				ep5 {
					reg = <5>;
					atmel,fifo-size = <1024>;
					atmel,nb-banks = <3>;
					atmel,can-dma;
					atmel,can-isoc;
				};

				ep6 {
					reg = <6>;
					atmel,fifo-size = <1024>;
					atmel,nb-banks = <3>;
					atmel,can-dma;
					atmel,can-isoc;
				};
			};
728
		};
729 730 731 732 733 734 735 736 737 738

		nand0: nand@40000000 {
			compatible = "atmel,at91rm9200-nand";
			#address-cells = <1>;
			#size-cells = <1>;
			reg = <0x40000000 0x10000000
			       0xffffe200 0x200
			      >;
			atmel,nand-addr-offset = <21>;
			atmel,nand-cmd-offset = <22>;
739 740
			pinctrl-names = "default";
			pinctrl-0 = <&pinctrl_nand>;
741 742
			gpios = <&pioC 8 GPIO_ACTIVE_HIGH
				 &pioC 14 GPIO_ACTIVE_HIGH
743 744 745 746
				 0
				>;
			status = "disabled";
		};
747 748 749 750

		usb0: ohci@00700000 {
			compatible = "atmel,at91rm9200-ohci", "usb-ohci";
			reg = <0x00700000 0x100000>;
751
			interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>;
752 753
			status = "disabled";
		};
754 755 756 757

		usb1: ehci@00800000 {
			compatible = "atmel,at91sam9g45-ehci", "usb-ehci";
			reg = <0x00800000 0x100000>;
758
			interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>;
759 760
			status = "disabled";
		};
761
	};
762 763 764

	i2c@0 {
		compatible = "i2c-gpio";
765 766
		gpios = <&pioA 20 GPIO_ACTIVE_HIGH /* sda */
			 &pioA 21 GPIO_ACTIVE_HIGH /* scl */
767 768 769 770 771 772 773 774
			>;
		i2c-gpio,sda-open-drain;
		i2c-gpio,scl-open-drain;
		i2c-gpio,delay-us = <5>;	/* ~100 kHz */
		#address-cells = <1>;
		#size-cells = <0>;
		status = "disabled";
	};
775
};