- 16 6月, 2015 28 次提交
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由 Andrew Jones 提交于
Signed-off-by: NAndrew Jones <drjones@redhat.com> Tested-by: NShannon Zhao <shannon.zhao@linaro.org> Reviewed-by: NIgor Mammedov <imammedo@redhat.com> Acked-by: NMichael S. Tsirkin <mst@redhat.com> Message-id: 1433929959-29530-3-git-send-email-drjones@redhat.com Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
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由 Andrew Jones 提交于
SPCR is the Serial Port Console Redirection Table. See the document linked from http://uefi.org/acpi. For serial port types, "Interface Type", see the documentation for the Debug Port Table 2 (DBG2). Signed-off-by: NAndrew Jones <drjones@redhat.com> Tested-by: NShannon Zhao <shannon.zhao@linaro.org> Reviewed-by: NIgor Mammedov <imammedo@redhat.com> Acked-by: NMichael S. Tsirkin <mst@redhat.com> Message-id: 1433929959-29530-2-git-send-email-drjones@redhat.com Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
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由 Peter Maydell 提交于
The architecture defines that when taking an exception trying to access a coprocessor register, the "preferred return address" for the exception is the address of the instruction that caused the exception. Correct an off-by-4 error which meant we were returning the address after the instruction for traps which happened because of a failure of a runtime access-check function on an AArch32 register. (Traps caused by translate-time checkable permissions failures had the correct address, as did traps on AArch64 registers.) This fixes https://bugs.launchpad.net/qemu/+bug/1463338Reported-by: NRobert Buhren <robert@robertbuhren.de> Signed-off-by: NPeter Maydell <peter.maydell@linaro.org> Message-id: 1433861440-30133-1-git-send-email-peter.maydell@linaro.org
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由 Eric Auger 提交于
commit ac9d32e3 had the consequence to register the do_cpu_reset after the rom_reset one. Hence they get executed in the wrong order. This commit restores the registration of do_cpu_reset in arm_load_kernel. Signed-off-by: NEric Auger <eric.auger@linaro.org> Reported-by: NPeter Crosthwaite <peter.crosthwaite@xilinx.com> Reviewed-by: NPeter Crosthwaite <peter.crosthwaite@xilinx.com> Tested-by: NPeter Crosthwaite <peter.crosthwaite@xilinx.com> Message-id: 1434111582-9325-1-git-send-email-eric.auger@linaro.org Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
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由 Peter Crosthwaite 提交于
This get_phys_addr is really for pmsav5. Rename it accordingly. Reviewed-by: NPeter Maydell <peter.maydell@linaro.org> Signed-off-by: NPeter Crosthwaite <peter.crosthwaite@xilinx.com> Message-id: bf4b019aa87d682a45998105ef8e4d4e97a5e117.1434066412.git.peter.crosthwaite@xilinx.com Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
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由 Peter Crosthwaite 提交于
For processors that support MPUs, add a property to de-feature it. This is similar to the implementation of the EL3 feature. The processor definition in init sets ARM_FEATURE_MPU if it can support an MPU. post_init exposes the property, defaulting to true. If cleared by the instantiator, ARM_FEATURE_MPU is then removed at realize time. This is to support R profile processors that may or may-not have an MPU configured. Signed-off-by: NPeter Crosthwaite <peter.crosthwaite@xilinx.com> Message-id: 632918cc48786e868ea18aa6bd12f70597994cad.1434066412.git.peter.crosthwaite@xilinx.com Reviewed-by: NPeter Maydell <peter.maydell@linaro.org> Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
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由 Peter Crosthwaite 提交于
Add a boolean for indicating uniprocessors with MP extensions. This drives the U bit in MPIDR. Prepares support for Cortex-R5. Signed-off-by: NPeter Crosthwaite <peter.crosthwaite@xilinx.com> Message-id: a70a80583df265e0174f01fa1fc92b33ea6d1db5.1434066412.git.peter.crosthwaite@xilinx.com Reviewed-by: NPeter Maydell <peter.maydell@linaro.org> Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
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由 Peter Crosthwaite 提交于
Currently, the return code for get_phys_addr is overloaded for both success/fail and FSR value return. This doesn't handle the case where there is an error with a 0 FSR. This case exists in PMSAv7. So rework get_phys_addr and friends to return a success/failure boolean return code and populate the FSR via a caller provided uint32_t pointer. Signed-off-by: NPeter Crosthwaite <peter.crosthwaite@xilinx.com> Message-id: a209e3d8ae00cda55260c970891f520210e26bad.1434066412.git.peter.crosthwaite@xilinx.com Reviewed-by: NPeter Maydell <peter.maydell@linaro.org> Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
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由 Peter Crosthwaite 提交于
V6+ PMSA and VMSA share some common registers that are currently in the VMSA definition block. Split them out into a new def that can be shared to PMSA. Signed-off-by: NPeter Crosthwaite <peter.crosthwaite@xilinx.com> Message-id: 284db78a43c63c9bfbb60de539672c361bcb6af8.1434066412.git.peter.crosthwaite@xilinx.com Reviewed-by: NPeter Maydell <peter.maydell@linaro.org> Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
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由 Peter Crosthwaite 提交于
These registers are VMSA specific so they should be conditional on VMSA (i.e. !MPU). Signed-off-by: NPeter Crosthwaite <peter.crosthwaite@xilinx.com> Message-id: 7bb8843e45f2635c6b7a583c5bb5da51ed4442a0.1434066412.git.peter.crosthwaite@xilinx.com Reviewed-by: NPeter Maydell <peter.maydell@linaro.org> Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
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由 Peter Crosthwaite 提交于
If doing a PMSA (MPU) system do not define the VMSA specific TLBTR CP. The def is done separately from VMSA registers group as it is affected by both the OMAP/STRONGARM RW errata and the MIDR backgrounding. Signed-off-by: NPeter Crosthwaite <peter.crosthwaite@xilinx.com> Message-id: b03fea3840207edf633f5c9189400c3dd6a28d14.1434066412.git.peter.crosthwaite@xilinx.com Reviewed-by: NPeter Maydell <peter.maydell@linaro.org> Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
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由 Aurelio C. Remonda 提交于
Create an ARM_FEATURE_THUMB_DSP controlling the Thumb encodings of the 85 DSP instructions (these are all Thumb2). This is enabled for all non-M-profile CPUs with Thumb2 support, as the instructions are mandatory for R and A profiles. On M profile they are optional and not present in the Cortex-M3 (though they are in the M4). The effect of this commit is that we will now treat the DSP encodings as illegal instructions on M3, when previously we incorrectly implemented them. Signed-off-by: NAurelio C. Remonda <aurelioremonda@gmail.com> Message-id: 1434311355-26554-1-git-send-email-aurelioremonda@gmail.com [PMM: added clz/crc32/crc32c and default case to the early-decode switch; minor format/spacing fixups; reworded commit message a bit] Reviewed-by: NPeter Maydell <peter.maydell@linaro.org> Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
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由 Peter Maydell 提交于
Update the pxa2xx_mmci device to stop using the old_mmio read and write callbacks in its MemoryRegionOps. This actually simplifies the code because the separate byte/halfword/word access functions were all calling into a single function to do the work anyway. Signed-off-by: NPeter Maydell <peter.maydell@linaro.org> Reviewed-by: NPeter Crosthwaite <peter.crosthwaite@xilinx.com> Message-id: 1434117989-7367-6-git-send-email-peter.maydell@linaro.org
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由 Peter Maydell 提交于
The pxa2xx-ssp device is already a QOM device but is still using the old-style register_savevm(); convert to VMState. Signed-off-by: NPeter Maydell <peter.maydell@linaro.org> Reviewed-by: NPeter Crosthwaite <peter.crosthwaite@xilinx.com> Message-id: 1434117989-7367-5-git-send-email-peter.maydell@linaro.org
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由 Peter Maydell 提交于
The pxa2xx_ssp device was missing a reset method; add one. Signed-off-by: NPeter Maydell <peter.maydell@linaro.org> Reviewed-by: NPeter Crosthwaite <peter..crosthwaite@xilinx.com> Message-id: 1434117989-7367-4-git-send-email-peter.maydell@linaro.org
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由 Peter Maydell 提交于
Convert the pxa2xx-fir device to QOM, including using a VMState for its migration info. Signed-off-by: NPeter Maydell <peter.maydell@linaro.org> Reviewed-by: NPeter Crosthwaite <peter.crosthwaite@xilinx.com> Message-id: 1434117989-7367-3-git-send-email-peter.maydell@linaro.org
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由 Peter Maydell 提交于
The pxa2xx custom coprocessor registers in cp6 and cp14 do device accesses, so mark the non-constant regs as ARM_CP_IO so that icount works correctly and doesn't abort. Signed-off-by: NPeter Maydell <peter.maydell@linaro.org> Reviewed-by: NPeter Crosthwaite <peter.crosthwaite@xilinx.com> Message-id: 1434117989-7367-2-git-send-email-peter.maydell@linaro.org
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由 Pavel Fedin 提交于
When we're using KVM, the kernel's internal idea of the MPIDR affinity fields must match the values we tell it for the guest vcpu cluster configuration in the device tree. Since at the moment the kernel doesn't support letting userspace tell it the correct affinity fields to use, we must read the kernel's view and reflect that back in the device tree. Signed-off-by: NShlomo Pongratz <shlomo.pongratz@huawei.com> Signed-off-by: NPavel Fedin <p.fedin@samsung.com> Message-id: 02f601d0a1e6$90c7d630$b2578290$@samsung.com [PMM: Use a local #define rather than a global variable for the TCG ARM_CPUS_PER_CLUSTER setting. Tweak a comment. Update the commit message.] Reviewed-by: NPeter Maydell <peter.maydell@linaro.org> Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
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由 Shannon Zhao 提交于
Add Shannon Zhao as the maintainer for the ARM ACPI Subsystem. Signed-off-by: NShannon Zhao <zhaoshenglong@huawei.com> Signed-off-by: NShannon Zhao <shannon.zhao@linaro.org> Reviewed-by: NClaudio Fontana <claudio.fontana@huawei.com> Acked-by: NPeter Maydell <peter.maydell@linaro.org> Message-id: 1433248318-6076-1-git-send-email-shannon.zhao@linaro.org Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
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由 Sergey Fedorov 提交于
According to ARMv8 ARM, there are additional aliases to MIDR system register in AArch32 state. So add them to the list. Signed-off-by: NSergey Fedorov <serge.fdrv@gmail.com> Message-id: 1433321048-23793-3-git-send-email-serge.fdrv@gmail.com Reviewed-by: NPeter Maydell <peter.maydell@linaro.org> Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
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由 Sergey Fedorov 提交于
According to ARM Cortex-A53/A57 TRM, REVIDR reset value should be zero. So let REVIDR reset value be specified by CPU model and correct it for Cortex-A53/A57. Signed-off-by: NSergey Fedorov <serge.fdrv@gmail.com> Message-id: 1433321048-23793-2-git-send-email-serge.fdrv@gmail.com Reviewed-by: NPeter Maydell <peter.maydell@linaro.org> Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
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由 Shannon Zhao 提交于
Add cortex-a53 cpu support in machine virt, so it can be used for TCG and KVM. Signed-off-by: NShannon Zhao <zhaoshenglong@huawei.com> Signed-off-by: NShannon Zhao <shannon.zhao@linaro.org> Reviewed-by: NPeter Maydell <peter.maydell@linaro.org> Message-id: 1433207452-4512-3-git-send-email-shannon.zhao@linaro.org Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
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由 Shannon Zhao 提交于
Since commit e3531026(target-arm: cpu64: Add support for Cortex-A53) has added Cortex-A53 cpu support for target-arm, this patch just enables it for kvm-arm. Here adding XGENE_POTENZA just makes the enum continuous. Signed-off-by: NShannon Zhao <zhaoshenglong@huawei.com> Signed-off-by: NShannon Zhao <shannon.zhao@linaro.org> Message-id: 1433207452-4512-2-git-send-email-shannon.zhao@linaro.org [PMM: Don't add the CPU types to cpus_to_try[]; this array only lists old CPUs which were supported in pre-PREFERRED_TARGET kernels] Reviewed-by: NPeter Maydell <peter.maydell@linaro.org> Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
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由 Alex Bennée 提交于
This isn't used by any of the code. In fact it looks like it was never used as it came in with ARMv7 support. Signed-off-by: NAlex Bennée <alex.bennee@linaro.org> Message-id: 1434020015-8868-1-git-send-email-alex.bennee@linaro.org Reviewed-by: NPeter Maydell <peter.maydell@linaro.org> Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
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由 Peter Maydell 提交于
fimd_swap_data() includes code to reverse the bits in a 64-bit integer, but an off-by-one error meant that it would try to shift off the top of the integer. Correct the bug (spotted by Coverity). Signed-off-by: NPeter Maydell <peter.maydell@linaro.org> Message-id: 1432912615-23107-1-git-send-email-peter.maydell@linaro.org
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由 Johan Karlsson 提交于
This patch fixes so that gic_update always updates all the cores with new pending irq states. If the function returns early it is possible to get interrupts that has already been acknowledged. Signed-off-by: NJohan Karlsson <johan.karlsson@enea.com> [PMM: rebased to apply to current master] Reviewed-by: NPeter Maydell <peter.maydell@linaro.org> Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
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由 Sergey Fedorov 提交于
Since ARMv7 with LPAE support, a supersection short translation table descriptor has had extended base address fields which hold bits 39:32 of translated address. These fields are IMPDEF in ARMv6 and ARMv7 without LPAE support. Signed-off-by: NSergey Fedorov <serge.fdrv@gmail.com> Message-id: 1433235718-30485-1-git-send-email-serge.fdrv@gmail.com Reviewed-by: NPeter Maydell <peter.maydell@linaro.org> Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
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由 Peter Maydell 提交于
The old ARMv5-style page table format includes a kind of second level descriptor named the "extended small page" format, whose primary purpose is to allow specification of the TEX memory attribute bits on a 4K page. This exists on ARMv6 and also (as an implementation extension) on XScale CPUs; it's UNPREDICTABLE on v5. We were mishandling this in two ways: (1) we weren't implementing it for v6 (probably never noticed because Linux will use the new-style v6 page table format there) (2) we were not correctly setting the page_size, which is 4K, not 1K The latter bug went unnoticed for years because the only thing which the page_size affects is which TLB entries get flushed when the guest does a TLB invalidate on an address in the page, and prior to commit 2f0d8631 we were doing a full TLB flush very frequently due to Linux's habit of writing the SCTLR pointlessly a lot. (We can assume that after commit 2f0d8631 the bug went unnoticed for a year because nobody's actually using the Zaurus/XScale emulation...) Report the correct page size for these descriptors, and permit them on ARMv6 CPUs. This fixes a problem where a kernel image for Zaurus can boot the kernel OK but gets random segfaults when it tries to run userspace programs. Signed-off-by: NPeter Maydell <peter.maydell@linaro.org> Message-id: 1432844085-16441-1-git-send-email-peter.maydell@linaro.org
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- 15 6月, 2015 12 次提交
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由 Peter Maydell 提交于
audio: remove obsolete backends (esd, fmod, winwave). audio: stop using global variables, small fixes. audio: remove some obsolte and unused code. # gpg: Signature made Mon Jun 15 13:24:44 2015 BST using RSA key ID D3E87138 # gpg: Good signature from "Gerd Hoffmann (work) <kraxel@redhat.com>" # gpg: aka "Gerd Hoffmann <gerd@kraxel.org>" # gpg: aka "Gerd Hoffmann (private) <kraxel@gmail.com>" * remotes/kraxel/tags/pull-audio-20150615-1: ossaudio: use trace events instead of debug config flag alsaaudio: use trace events instead of verbose dsoundaudio: remove primary buffer dsoundaudio: remove *_retries kludges audio: remove plive audio: remove LOG_TO_MONITOR along with default_mon MAINTAINERS: remove malc from audio sdlaudio: do not allow multiple instances coreaudio: do not use global variables where possible dsoundaudio: do not use global variables paaudio: fix possible resource leak wavaudio: do not use global variables ossaudio: do not use global variables alsaaudio: do not use global variables paaudio: do not use global variables audio: expose drv_opaque to init_out and init_in only enable dsound in case the header file is present audio: remove winwave audio driver audio: remove fmod backend audio: remove esd backend Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
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由 Peter Maydell 提交于
s390x/kvm/watchdog 1. Implement a diag288 based watchdog 2. Fix virtio-ccw BIOS for gcc >= 4.9 # gpg: Signature made Mon Jun 15 12:36:25 2015 BST using RSA key ID B5A61C7C # gpg: Good signature from "Christian Borntraeger (IBM) <borntraeger@de.ibm.com>" * remotes/borntraeger/tags/s390x-20150615: s390/bios: build with -fdelete-null-pointer-checks watchdog: Add new Virtual Watchdog action INJECT-NMI nmi: Implement inject_nmi() for non-monitor context use s390x/watchdog: diag288 migration support s390x/kvm: diag288 instruction interception and handling s390x/watchdog: introduce diag288 watchdog device watchdog: change option wording to allow for more watchdogs Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
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由 Aurelien Jarno 提交于
Starting with version 4.9, GCC assumes it can't safely dereference null pointers, and uses this for some optimizations. On s390, the lowcore memory is located at address 0, so this assumption is wrong and breaks the s390-ccw firmware. Pass -fdelete-null-pointer-checks to avoid that. Cc: Cornelia Huck <cornelia.huck@de.ibm.com> Cc: Christian Borntraeger <borntraeger@de.ibm.com> Cc: Alexander Graf <agraf@suse.de> Signed-off-by: NAurelien Jarno <aurelien@aurel32.net> Message-Id: <1434363843-14576-1-git-send-email-aurelien@aurel32.net> Signed-off-by: NChristian Borntraeger <borntraeger@de.ibm.com>
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由 Kővágó, Zoltán 提交于
Signed-off-by: NKővágó, Zoltán <DirtY.iCE.hu@gmail.com> Signed-off-by: NGerd Hoffmann <kraxel@redhat.com>
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由 Kővágó, Zoltán 提交于
Signed-off-by: NKővágó, Zoltán <DirtY.iCE.hu@gmail.com> Signed-off-by: NGerd Hoffmann <kraxel@redhat.com>
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由 Kővágó, Zoltán 提交于
Enabling this option just creates a playback buffer with the specified settings, and then ignores it. It's probably some outdated hack to set audio formats on windows. (The first created stream dictates all other streams settings, at least on some Windows versions). Setting DAC_FIXED_SETTINGS should have the same effect as setting (the now removed) primary buffer. Signed-off-by: NKővágó, Zoltán <DirtY.iCE.hu@gmail.com> Signed-off-by: NGerd Hoffmann <kraxel@redhat.com>
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由 Kővágó, Zoltán 提交于
According to MSDN this may happen when the window is not in the foreground, but the default is 1 since a long time (which means no retries), so it should be ok. I've found no problems during testing it on Windows 7 and wine, so this was probably only the case with some old Windows versions. Signed-off-by: NKővágó, Zoltán <DirtY.iCE.hu@gmail.com> Signed-off-by: NGerd Hoffmann <kraxel@redhat.com>
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由 Kővágó, Zoltán 提交于
It was useless even 3 years ago, so it can probably safely go away: https://lists.nongnu.org/archive/html/qemu-devel/2012-03/msg02427.htmlSigned-off-by: NKővágó, Zoltán <DirtY.iCE.hu@gmail.com> Signed-off-by: NGerd Hoffmann <kraxel@redhat.com>
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由 Kővágó, Zoltán 提交于
Setting QEMU_AUDIO_LOG_TO_MONITOR=1 can crash qemu (if qemu tries to log to the monitor before it's being initialized), and also nothing else in qemu logs to the monitor. This log to monitor feature was the last thing that used the default_mon variable, so I removed it too (as using it can cause problems). Signed-off-by: NKővágó, Zoltán <DirtY.iCE.hu@gmail.com> Signed-off-by: NGerd Hoffmann <kraxel@redhat.com>
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由 Gerd Hoffmann 提交于
email bounces, with a appearently permanent error: "av1474@comtv.ru mail receiving disabled, rejecting" Signed-off-by: NGerd Hoffmann <kraxel@redhat.com> Reviewed-by: NGonglei <arei.gonglei@huawei.com>
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由 Kővágó, Zoltán 提交于
Since SDL uses a lot of global data, we can't create independent instances of sdl audio backend. Signed-off-by: NKővágó, Zoltán <DirtY.iCE.hu@gmail.com> Signed-off-by: NGerd Hoffmann <kraxel@redhat.com>
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由 Kővágó, Zoltán 提交于
Signed-off-by: NKővágó, Zoltán <DirtY.iCE.hu@gmail.com> Signed-off-by: NGerd Hoffmann <kraxel@redhat.com>
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