Add mips32r5-generic among CPU definitions for MIPS.
Define ISA_MIPS32R3 and ISA_MIPS32R5.
Signed-off-by: NPetar Jovanovic <petar.jovanovic@imgtec.com>
Reviewed-by: NEric Johnson <eric.johnson@imgtec.com>

Signed-off-by: NHuacai Chen <zltjiangshi@gmail.com>
Signed-off-by: NAurelien Jarno <aurelien@aurel32.net>

Add instruction decoding for the microMIPS ASE.  All we do is decode and
then forward to the existing gen_* routines.
Signed-off-by: NNathan Froyd <froydnj@codesourcery.com>
Signed-off-by: NAurelien Jarno <aurelien@aurel32.net>

Signed-off-by: NAurelien Jarno <aurelien@aurel32.net>

Removes a set of ifdefs from exec.c.

Introduce TARGET_VIRT_ADDR_SPACE_BITS for all targets other
than Alpha.  This will be used for page_find_alloc, which is
supposed to be using virtual addresses in the first place.
Signed-off-by: NRichard Henderson <rth@twiddle.net>

The only target dependency for most hardware is sizeof(target_phys_addr_t).
Build these files into a convenience library, and use that instead of
building for every target.

Remove and poison various target specific macros to avoid bogus target
dependencies creeping back in.

Big/Little endian is not handled because devices should not know or care
about this to start with.
Signed-off-by: NPaul Brook <paul@codesourcery.com>

by Dirk Behme.


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defines for linux-user.


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Poussineau for debugging this.


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it would involve counting the actually executed instructions.


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MIPS_STRICT_STANDARD define to adhere more to the spec than it makes
sense in normal operation.


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decoding. This is also the first percent towards MIPS64 support.


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