1. 12 6月, 2015 1 次提交
  2. 28 4月, 2015 1 次提交
  3. 05 3月, 2015 1 次提交
  4. 03 11月, 2014 1 次提交
  5. 19 6月, 2014 1 次提交
  6. 17 6月, 2014 1 次提交
  7. 11 2月, 2014 9 次提交
  8. 20 12月, 2013 1 次提交
    • A
      roms: Flush icache when writing roms to guest memory · 582b55a9
      Alexander Graf 提交于
      We use the rom infrastructure to write firmware and/or initial kernel
      blobs into guest address space. So we're basically emulating the cache
      off phase on very early system bootup.
      
      That phase is usually responsible for clearing the instruction cache for
      anything it writes into cachable memory, to ensure that after reboot we
      don't happen to execute stale bits from the instruction cache.
      
      So we need to invalidate the icache every time we write a rom into guest
      address space. We do not need to do this for every DMA since the guest
      expects it has to flush the icache manually in that case.
      
      This fixes random reboot issues on e5500 (booke ppc) for me.
      Signed-off-by: NAlexander Graf <agraf@suse.de>
      582b55a9
  9. 13 12月, 2013 1 次提交
    • A
      roms: Flush icache when writing roms to guest memory · a94b36dd
      Alexander Graf 提交于
      We use the rom infrastructure to write firmware and/or initial kernel
      blobs into guest address space. So we're basically emulating the cache
      off phase on very early system bootup.
      
      That phase is usually responsible for clearing the instruction cache for
      anything it writes into cachable memory, to ensure that after reboot we
      don't happen to execute stale bits from the instruction cache.
      
      So we need to invalidate the icache every time we write a rom into guest
      address space. We do not need to do this for every DMA since the guest
      expects it has to flush the icache manually in that case.
      
      This fixes random reboot issues on e5500 (booke ppc) for me.
      Signed-off-by: NAlexander Graf <agraf@suse.de>
      Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com>
      a94b36dd
  10. 04 7月, 2013 2 次提交
  11. 28 6月, 2013 1 次提交
  12. 27 6月, 2013 1 次提交
  13. 29 5月, 2013 2 次提交
  14. 25 5月, 2013 3 次提交
  15. 19 12月, 2012 2 次提交
  16. 02 11月, 2012 1 次提交
  17. 23 10月, 2012 1 次提交
    • A
      Rename target_phys_addr_t to hwaddr · a8170e5e
      Avi Kivity 提交于
      target_phys_addr_t is unwieldly, violates the C standard (_t suffixes are
      reserved) and its purpose doesn't match the name (most target_phys_addr_t
      addresses are not target specific).  Replace it with a finger-friendly,
      standards conformant hwaddr.
      
      Outstanding patchsets can be fixed up with the command
      
        git rebase -i --exec 'find -name "*.[ch]"
                              | xargs s/target_phys_addr_t/hwaddr/g' origin
      Signed-off-by: NAvi Kivity <avi@redhat.com>
      Signed-off-by: NAnthony Liguori <aliguori@us.ibm.com>
      a8170e5e
  18. 05 10月, 2012 1 次提交
  19. 02 7月, 2012 2 次提交
  20. 05 6月, 2012 1 次提交
  21. 04 3月, 2012 1 次提交
    • S
      w64: Fix size of ram_addr_t · 53576999
      Stefan Weil 提交于
      ram_addr_t must be large enough to address any address of the host.
      
      For hosts with sizeof(unsigned long) == sizeof(void *), this patch
      changes nothing. All currently supported hosts fall into this category.
      
      For w64 hosts, sizeof(unsigned long) is 4 while sizeof(void *) is 8,
      so the use of uintptr_t is needed.
      Signed-off-by: NStefan Weil <sw@weilnetz.de>
      Signed-off-by: NBlue Swirl <blauwirbel@gmail.com>
      53576999
  22. 04 1月, 2012 5 次提交