提交 · e189e7486867e36c35f99cbac27d503ce4e7c71d · openeuler / qemu

24 9月, 2007 1 次提交
- T
  Per-CPU instruction decoding implementation, by Aurelien Jarno. · e189e748
  由 ths 提交于 9月 24, 2007
```
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3228 c046a42c-6fe2-441c-8c8c-71466251a162
```
  e189e748
13 5月, 2007 1 次提交
- T
  MIPS TLB style selection at runtime, by Herve Poussineau. · 29929e34
  由 ths 提交于 5月 13, 2007
```
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2809 c046a42c-6fe2-441c-8c8c-71466251a162
```
  29929e34
30 4月, 2007 1 次提交

Kill broken host register definitions, thanks to Paul Brook and Herve · 01179c38

由 ths 提交于 4月 29, 2007

Poussineau for debugging this.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2747 c046a42c-6fe2-441c-8c8c-71466251a162

01179c38

20 4月, 2007 1 次提交

Update comment. We can't easily adhere to the architecture spec because · 19221bda

由 ths 提交于 4月 19, 2007

it would involve counting the actually executed instructions.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2708 c046a42c-6fe2-441c-8c8c-71466251a162

19221bda

17 4月, 2007 1 次提交
- T
  Choose number of TLBs at runtime, by Herve Poussineau. · fcb4a419
  由 ths 提交于 4月 17, 2007
```
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2693 c046a42c-6fe2-441c-8c8c-71466251a162
```
  fcb4a419
11 4月, 2007 1 次提交

Throw RI for invalid MFMC0-class instructions. Introduce optional · b48cfdff

由 ths 提交于 4月 11, 2007

MIPS_STRICT_STANDARD define to adhere more to the spec than it makes
sense in normal operation.

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2650 c046a42c-6fe2-441c-8c8c-71466251a162

b48cfdff

01 4月, 2007 1 次提交

Actually enable 64bit configuration. · 60aa19ab

由 ths 提交于 4月 01, 2007


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2565 c046a42c-6fe2-441c-8c8c-71466251a162

60aa19ab

21 3月, 2007 1 次提交
- T
  Move mips CPU specific initialization to translate_init.c. · 3953d786
  由 ths 提交于 3月 21, 2007
```
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2522 c046a42c-6fe2-441c-8c8c-71466251a162
```
  3953d786
18 3月, 2007 1 次提交

MIPS -cpu selection support, by Herve Poussineau. · 33d68b5f

由 ths 提交于 3月 18, 2007


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2491 c046a42c-6fe2-441c-8c8c-71466251a162

33d68b5f

01 3月, 2007 1 次提交
- T
  MIPS FPU dynamic activation, part 1, by Herve Poussineau. · 36d23958
  由 ths 提交于 2月 28, 2007
```
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2463 c046a42c-6fe2-441c-8c8c-71466251a162
```
  36d23958
21 12月, 2006 1 次提交
- T
  Preliminiary MIPS64 support, disabled by default due to performance impact. · c570fd16
  由 ths 提交于 12月 21, 2006
```
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2250 c046a42c-6fe2-441c-8c8c-71466251a162
```
  c570fd16
07 12月, 2006 2 次提交

Add MIPS32R2 instructions, and generally straighten out the instruction · 7a387fff

由 ths 提交于 12月 06, 2006

decoding. This is also the first percent towards MIPS64 support.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2224 c046a42c-6fe2-441c-8c8c-71466251a162

7a387fff

T
MIPS TLB performance improvements, by Daniel Jacobowitz. · 814b9a47
由 ths 提交于 12月 06, 2006
```
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2220 c046a42c-6fe2-441c-8c8c-71466251a162
```
814b9a47

15 6月, 2006 1 次提交
- B
  mips config fixes (initial patch by Stefan Weil) · c5d6edc3
  由 bellard 提交于 6月 14, 2006
```
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1977 c046a42c-6fe2-441c-8c8c-71466251a162
```
  c5d6edc3
14 6月, 2006 1 次提交

MIPS FPU support (Marius Goeger) · 6ea83fed

由 bellard 提交于 6月 14, 2006


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1964 c046a42c-6fe2-441c-8c8c-71466251a162

6ea83fed

02 7月, 2005 1 次提交

MIPS target (Jocelyn Mayer) · 6af0bf9c

由 bellard 提交于 7月 02, 2005


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1464 c046a42c-6fe2-441c-8c8c-71466251a162

6af0bf9c