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  1. 12 12月, 2008 2 次提交
  3. 09 12月, 2008 1 次提交
    • A
      target-ppc: memory load/store rework · 76db3ba4
      由 aurel32 提交于 
      Rework the memory load/store:
- Unify load/store functions for 32-bit and 64-bit CPU
- Don't swap values twice for bit-reverse load/store functions
  in little endian mode.
- On a 64-bit CPU in 32-bit mode, do the address truncation for
  address computation instead of every load store. Truncate the
  address when incrementing the address (if needed)
- Cache writes to access_types.
- Add a few missing calls to gen_set_access_type()
Signed-off-by: NAurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5949 c046a42c-6fe2-441c-8c8c-71466251a162
      76db3ba4
  5. 08 12月, 2008 2 次提交
  7. 07 12月, 2008 5 次提交
  9. 06 12月, 2008 2 次提交
  11. 05 12月, 2008 2 次提交
  13. 01 12月, 2008 12 次提交
  15. 28 11月, 2008 3 次提交
  17. 26 11月, 2008 1 次提交
  19. 24 11月, 2008 5 次提交
  21. 23 11月, 2008 1 次提交
  23. 22 11月, 2008 1 次提交
  25. 20 11月, 2008 2 次提交
  27. 19 11月, 2008 1 次提交
    • A
      Refactor and enhance break/watchpoint API (Jan Kiszka) · a1d1bb31
      由 aliguori 提交于 
      This patch prepares the QEMU cpu_watchpoint/breakpoint API to allow the
succeeding enhancements this series comes with.

First of all, it overcomes MAX_BREAKPOINTS/MAX_WATCHPOINTS by switching
to dynamically allocated data structures that are kept in linked lists.
This also allows to return a stable reference to the related objects,
required for later introduced x86 debug register support.

Breakpoints and watchpoints are stored with their full information set
and an additional flag field that makes them easily extensible for use
beyond pure guest debugging.
Signed-off-by: NJan Kiszka <jan.kiszka@siemens.com>
Signed-off-by: NAnthony Liguori <aliguori@us.ibm.com>



git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5738 c046a42c-6fe2-441c-8c8c-71466251a162
      a1d1bb31