提交 · cd7d3cb7a26297c2ca28da68bbc7aacec0c04d25 · openeuler / qemu

28 1月, 2019 19 次提交

R
tcg/arm: enable dynamic TLB sizing · cd7d3cb7
由 Richard Henderson 提交于 1月 22, 2019
```
Signed-off-by: NRichard Henderson <richard.henderson@linaro.org>
```
cd7d3cb7

tcg/riscv: enable dynamic TLB sizing · 41b70f22

由 Richard Henderson 提交于 12月 26, 2018

Reviewed-by: NAlistair Francis <alistair.francis@wdc.com>
Signed-off-by: NRichard Henderson <richard.henderson@linaro.org>

41b70f22

R
tcg/s390: enable dynamic TLB sizing · 4f47e338
由 Richard Henderson 提交于 12月 26, 2018
```
Signed-off-by: NRichard Henderson <richard.henderson@linaro.org>
```
4f47e338
R
tcg/sparc: enable dynamic TLB sizing · 17ff9f78
由 Richard Henderson 提交于 12月 26, 2018
```
Signed-off-by: NRichard Henderson <richard.henderson@linaro.org>
```
17ff9f78
R
tcg/ppc: enable dynamic TLB sizing · 644f591a
由 Richard Henderson 提交于 12月 26, 2018
```
Signed-off-by: NRichard Henderson <richard.henderson@linaro.org>
```
644f591a

tcg/aarch64: enable dynamic TLB sizing · f7bcd966

由 Richard Henderson 提交于 12月 25, 2018

Reviewed-by: NAlex Bennée <alex.bennee@linaro.org>
Tested-by: NAlex Bennée <alex.bennee@linaro.org>
Signed-off-by: NRichard Henderson <richard.henderson@linaro.org>

f7bcd966

tcg/i386: enable dynamic TLB sizing · 54eaf40b

由 Emilio G. Cota 提交于 1月 16, 2019

As the following experiments show, this series is a net perf gain,
particularly for memory-heavy workloads. Experiments are run on an
Intel(R) Xeon(R) Gold 6142 CPU @ 2.60GHz.

1. System boot + shudown, debian aarch64:

- Before (v3.1.0):
 Performance counter stats for './die.sh v3.1.0' (10 runs):

       9019.797015      task-clock (msec)         #    0.993 CPUs utilized            ( +-  0.23% )
    29,910,312,379      cycles                    #    3.316 GHz                      ( +-  0.14% )
    54,699,252,014      instructions              #    1.83  insn per cycle           ( +-  0.08% )
    10,061,951,686      branches                  # 1115.541 M/sec                    ( +-  0.08% )
       172,966,530      branch-misses             #    1.72% of all branches          ( +-  0.07% )

       9.084039051 seconds time elapsed                                          ( +-  0.23% )

- After:
 Performance counter stats for './die.sh tlb-dyn-v5' (10 runs):

       8624.084842      task-clock (msec)         #    0.993 CPUs utilized            ( +-  0.23% )
    28,556,123,404      cycles                    #    3.311 GHz                      ( +-  0.13% )
    51,755,089,512      instructions              #    1.81  insn per cycle           ( +-  0.05% )
     9,526,513,946      branches                  # 1104.641 M/sec                    ( +-  0.05% )
       166,578,509      branch-misses             #    1.75% of all branches          ( +-  0.19% )

       8.680540350 seconds time elapsed                                          ( +-  0.24% )

That is, a 4.4% perf increase.

2. System boot + shutdown, ubuntu 18.04 x86_64:

- Before (v3.1.0):
      56100.574751      task-clock (msec)         #    1.016 CPUs utilized            ( +-  4.81% )
   200,745,466,128      cycles                    #    3.578 GHz                      ( +-  5.24% )
   431,949,100,608      instructions              #    2.15  insn per cycle           ( +-  5.65% )
    77,502,383,330      branches                  # 1381.490 M/sec                    ( +-  6.18% )
       844,681,191      branch-misses             #    1.09% of all branches          ( +-  3.82% )

      55.221556378 seconds time elapsed                                          ( +-  5.01% )

- After:
      56603.419540      task-clock (msec)         #    1.019 CPUs utilized            ( +- 10.19% )
   202,217,930,479      cycles                    #    3.573 GHz                      ( +- 10.69% )
   439,336,291,626      instructions              #    2.17  insn per cycle           ( +- 14.14% )
    80,538,357,447      branches                  # 1422.853 M/sec                    ( +- 16.09% )
       776,321,622      branch-misses             #    0.96% of all branches          ( +-  3.77% )

      55.549661409 seconds time elapsed                                          ( +- 10.44% )

No improvement (within noise range). Note that for this workload,
increasing the time window too much can lead to perf degradation,
since it flushes the TLB *very* frequently.

3. x86_64 SPEC06int:

           x86_64-softmmu speedup vs. v3.1.0 for SPEC06int (test set)
            Host: Intel(R) Xeon(R) Gold 6142 CPU @ 2.60GHz (Skylake)

5.5 +------------------------------------------------------------------------+
    |                   +-+                                                  |
  5 |-+.................+-+...............................tlb-dyn-v5.......+-|
    |                   * *                                                  |
4.5 |-+.................*.*................................................+-|
    |                   * *                                                  |
  4 |-+.................*.*................................................+-|
    |                   * *                                                  |
3.5 |-+.................*.*................................................+-|
    |                   * *                                                  |
  3 |-+......+-+*.......*.*................................................+-|
    |        *  *       * *                                                  |
2.5 |-+......*..*.......*.*.................................+-+*...........+-|
    |        *  *       * *                                 *  *             |
  2 |-+......*..*.......*.*.................................*..*...........+-|
    |        *  *       * *                                 *  *  +-+        |
1.5 |-+......*..*.......*.*.................................*..*.*+-+.*+-+.+-|
    |        *  * *+-+  * *  +-+       *+-+  +-+       +-+  *  * *  * *  *   |
  1 |++++-+*+*++*+*++*++*+*++*+*+++-+*+*+-++*+-++++-++++-+++*++*+*++*+*++*+++|
    |   *  * *  * *  *  * *  * *  *  * *  * *  *  * *  * *  *  * *  * *  *   |
0.5 +------------------------------------------------------------------------+
  400.perlb401.bzip403.g429445.g456.hm462.libq464.h471.omn47483.xalancbgeomean
  png: https://imgur.com/YRF90f7

That is, a 1.51x average speedup over the baseline, with a max speedup
of 5.17x.

Here's a different look at the SPEC06int results, using KVM as the baseline:

             x86_64-softmmu slowdown vs. KVM for SPEC06int (test set)
             Host: Intel(R) Xeon(R) Gold 6142 CPU @ 2.60GHz (Skylake)

25 +---------------------------------------------------------------------------+
   |                   +-+                                        +-+          |
   |                   * *                             +-+      v3.1.0         |
   |                   * *                             +-+  tlb-dyn-v5         |
   |                   * *                             * *        +-+          |
20 |-+.................*.*.............................*.+-+......*.*........+-|
   |                   * *                             * # #      * *          |
   |        +-+        * *                             * # #      * *          |
   |        * *        * *                             * # #      * *          |
15 |-+......*.*........*.*.............................*.#.#......*.+-+......+-|
   |        * *        * *                             * # #      * #|#        |
   |        * *        * *        +-+                  * # #      * +-+        |
   |        * *  +-+   * *        ++-+       +-+       * # #      * # # +-+    |
   |        * *  +-+   * *        * ##       *|   +-+  * # #      * # # +-+    |
10 |-+......*.*..*.+-+.*.*........*.##.......++-+.*.+-+*.#.#......*.#.#.*.*..+-|
   |        * *  * +-+ * *        * ## +-+   *# # * # #* # # +-+  * # # * *    |
   |        * *  * # # * *  +-+   * ## * +-+ *# # * # #* # # * *  * # # *+-+   |
   |        * *  * # # * *  * +-+ * ## * # # *# # * # #* # # * *  * # # * ##   |
 5 |-+......*.+-+*.#.#.*.*..*.#.#.*.##.*.#.#.*#.#.*.#.#*.#.#.*.*..*.#.#.*.##.+-|
   |        * # #* # # * +-+* # # * ## * # # *# # * # #* # # * *  * # # * ##   |
   |        * # #* # # * # #* # # * ## * # # *# # * # #* # # * +-+* # # * ##   |
   |   ++-+ * # #* # # * # #* # # * ## * # # *# # * # #* # # * # #* # # * ##   |
   |+++*#+#+*+#+#*+#+#+*+#+#*+#+#+*+##+*+#+#+*#+#+*+#+#*+#+#+*+#+#*+#+#+*+##+++|
 0 +---------------------------------------------------------------------------+
 400.perlbe401.bzi403.gc429445.go456.h462.libqu464.h471.omne4483.xalancbmgeomean
  png: https://imgur.com/YzAMNEV

After this series, we bring down the average SPEC06int slowdown vs KVM
from 11.47x to 7.58x.
Tested-by: NAlex Bennée <alex.bennee@linaro.org>
Reviewed-by: NAlex Bennée <alex.bennee@linaro.org>
Signed-off-by: NEmilio G. Cota <cota@braap.org>
Message-Id: <20190116170114.26802-4-cota@braap.org>
Signed-off-by: NRichard Henderson <richard.henderson@linaro.org>

54eaf40b

tcg: introduce dynamic TLB sizing · 86e1eff8

由 Emilio G. Cota 提交于 1月 16, 2019

Disabled in all TCG backends for now.
Tested-by: NAlex Bennée <alex.bennee@linaro.org>
Reviewed-by: NAlex Bennée <alex.bennee@linaro.org>
Signed-off-by: NEmilio G. Cota <cota@braap.org>
Message-Id: <20190116170114.26802-3-cota@braap.org>
Signed-off-by: NRichard Henderson <richard.henderson@linaro.org>

86e1eff8

cputlb: do not evict empty entries to the vtlb · 3cea94bb

由 Emilio G. Cota 提交于 1月 16, 2019

Currently we evict an entry to the victim TLB when it doesn't match
the current address. But it could be that there's no match because
the current entry is empty (i.e. all -1's, for instance via tlb_flush).
Do not evict the entry to the vtlb in that case.

This change will help us keep track of the TLB's use rate, which
we'll use to implement a policy for dynamic TLB sizing.
Tested-by: NAlex Bennée <alex.bennee@linaro.org>
Reviewed-by: NAlex Bennée <alex.bennee@linaro.org>
Reviewed-by: NRichard Henderson <richard.henderson@linaro.org>
Signed-off-by: NEmilio G. Cota <cota@braap.org>
Message-Id: <20190116170114.26802-2-cota@braap.org>
Signed-off-by: NRichard Henderson <richard.henderson@linaro.org>

3cea94bb

R
tcg/aarch64: Implement vector minmax arithmetic · 93f332a5
由 Richard Henderson 提交于 12月 18, 2018
```
Signed-off-by: NRichard Henderson <richard.henderson@linaro.org>
```
93f332a5
R
tcg/aarch64: Implement vector saturating arithmetic · d32648d4
由 Richard Henderson 提交于 12月 18, 2018
```
Signed-off-by: NRichard Henderson <richard.henderson@linaro.org>
```
d32648d4

tcg/i386: Implement vector minmax arithmetic · bc37faf4

由 Richard Henderson 提交于 12月 17, 2018

The avx instruction set does not directly provide MO_64.
We can still implement 64-bit with comparison and vpblendvb.
Signed-off-by: NRichard Henderson <richard.henderson@linaro.org>

bc37faf4

tcg/i386: Implement vector saturating arithmetic · 8ffafbce

由 Richard Henderson 提交于 12月 17, 2018

Only MO_8 and MO_16 are implemented, since that's all the
instruction set provides.
Signed-off-by: NRichard Henderson <richard.henderson@linaro.org>

8ffafbce

R
tcg/i386: Split subroutines out of tcg_expand_vec_op · 44f1441d
由 Richard Henderson 提交于 12月 18, 2018
```
This routine was becoming too large.
Signed-off-by: NRichard Henderson <richard.henderson@linaro.org>
```
44f1441d
R
tcg: Add opcodes for vector minmax arithmetic · dd0a0fcd
由 Richard Henderson 提交于 12月 17, 2018
```
Signed-off-by: NRichard Henderson <richard.henderson@linaro.org>
```
dd0a0fcd
R
tcg: Add opcodes for vector saturated arithmetic · 8afaf050
由 Richard Henderson 提交于 12月 17, 2018
```
Signed-off-by: NRichard Henderson <richard.henderson@linaro.org>
```
8afaf050

tcg: Add write_aofs to GVecGen4 · 5d6acdd4

由 Richard Henderson 提交于 12月 17, 2018

This allows writing 2 output, 3 input operations.
Signed-off-by: NRichard Henderson <richard.henderson@linaro.org>

5d6acdd4

tcg: Add gvec expanders for nand, nor, eqv · f550805d

由 Richard Henderson 提交于 12月 17, 2018

Reviewed-by: NDavid Gibson <david@gibson.dropbear.id.au>
Signed-off-by: NRichard Henderson <richard.henderson@linaro.org>

f550805d

tcg: Add logical simplifications during gvec expand · 9a9eda78

由 Richard Henderson 提交于 12月 17, 2018

We handle many of these during integer expansion, and the
rest of them during integer optimization.
Reviewed-by: NDavid Gibson <david@gibson.dropbear.id.au>
Signed-off-by: NRichard Henderson <richard.henderson@linaro.org>

9a9eda78

26 1月, 2019 2 次提交

Merge remote-tracking branch 'remotes/ehabkost/tags/python-next-pull-request' into staging · ad7a21e8

由 Peter Maydell 提交于 1月 25, 2019

Python 3 compatibility fixes

# gpg: Signature made Fri 25 Jan 2019 14:04:56 GMT
# gpg:                using RSA key 2807936F984DC5A6
# gpg: Good signature from "Eduardo Habkost <ehabkost@redhat.com>" [full]
# Primary key fingerprint: 5A32 2FD5 ABC4 D3DB ACCF  D1AA 2807 936F 984D C5A6

* remotes/ehabkost/tags/python-next-pull-request:
  decodetree: re.fullmatch was added in 3.4
  device-crash-test: Python 3 compatibility fix
Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>

ad7a21e8

Merge remote-tracking branch 'remotes/amarkovic/tags/mips-queue-january-25-2019' into staging · 2dc2f10d

由 Peter Maydell 提交于 1月 25, 2019

MIPS queue for January 25, 2019

# gpg: Signature made Fri 25 Jan 2019 13:25:57 GMT
# gpg:                using RSA key D4972A8967F75A65
# gpg: Good signature from "Aleksandar Markovic <amarkovic@wavecomp.com>" [unknown]
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg:          There is no indication that the signature belongs to the owner.
# Primary key fingerprint: 8526 FBF1 5DA3 811F 4A01  DD75 D497 2A89 67F7 5A65

* remotes/amarkovic/tags/mips-queue-january-25-2019:
  docs/qemu-cpu-models: Add MIPS/nanoMIPS QEMU supported CPU models
  qemu-doc: Add nanoMIPS ISA information
  tests: tcg: mips: Remove old directories
  tests: tcg: mips: Add two new Makefiles
  tests: tcg: mips: Move source files to new locations
  MAINTAINERS: Update MIPS sections
  target/mips: Add I6500 core configuration
  target/mips: nanoMIPS: Fix branch handling
  disas: nanoMIPS: Amend DSP instructions related comments
  target/mips: Extend gen_scwp() functionality to support EVA
  target/mips: Correct the second argument type of cpu_supports_isa()
  target/mips: nanoMIPS: Rename macros for extracting 3-bit-coded GPR numbers
  target/mips: nanoMIPS: Remove an unused macro
  target/mips: nanoMIPS: Remove duplicate macro definitions
Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>

2dc2f10d

25 1月, 2019 19 次提交

decodetree: re.fullmatch was added in 3.4 · 651514df

由 Paolo Bonzini 提交于 1月 25, 2019

Python 3 versions earlier than 3.4 do not have it, use the
same workaround that is in place for 3.0.
Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com>
Message-Id: <1548410602-16008-1-git-send-email-pbonzini@redhat.com>
Reviewed-by: NPhilippe Mathieu-Daudé <philmd@redhat.com>
Signed-off-by: NEduardo Habkost <ehabkost@redhat.com>

651514df

device-crash-test: Python 3 compatibility fix · 55e0a346

由 Nisarg Shah 提交于 1月 17, 2019

Restrict whitelist entry stats in debug mode to be sorted only by
"count", since Python 3 does not implicitly support comparing
dictionaries.
Signed-off-by: NNisarg Shah <nshah@disroot.org>
Message-Id: <20190116183358.30287-1-nshah@disroot.org>
[ehabkost: removed 2 unnecessary hunks from patch]
[ehabkost: edited commit message]
Signed-off-by: NEduardo Habkost <ehabkost@redhat.com>

55e0a346

Merge remote-tracking branch 'remotes/armbru/tags/pull-qapi-2019-01-24' into staging · 9dd0d811

由 Peter Maydell 提交于 1月 25, 2019

QAPI patches for 2019-01-24

# gpg: Signature made Thu 24 Jan 2019 14:25:19 GMT
# gpg:                using RSA key 3870B400EB918653
# gpg: Good signature from "Markus Armbruster <armbru@redhat.com>"
# gpg:                 aka "Markus Armbruster <armbru@pond.sub.org>"
# Primary key fingerprint: 354B C8B3 D7EB 2A6B 6867  4E5F 3870 B400 EB91 8653

* remotes/armbru/tags/pull-qapi-2019-01-24:
  json: Fix % handling when not interpolating
  qmp: Add examples to qom list, get, and set commands
  qapi: Eliminate indirection through qmp_event_get_func_emit()
  qapi: Belatedly update docs for commit 9c2f56e9Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>

9dd0d811

Merge remote-tracking branch 'remotes/kraxel/tags/audio-20190124-pull-request' into staging · 87f6a866

由 Peter Maydell 提交于 1月 25, 2019

audio: pc speaker init fix, rework driver probing

# gpg: Signature made Thu 24 Jan 2019 13:19:52 GMT
# gpg:                using RSA key 4CB6D8EED3E87138
# gpg: Good signature from "Gerd Hoffmann (work) <kraxel@redhat.com>"
# gpg:                 aka "Gerd Hoffmann <gerd@kraxel.org>"
# gpg:                 aka "Gerd Hoffmann (private) <kraxel@gmail.com>"
# Primary key fingerprint: A032 8CFF B93A 17A7 9901  FE7D 4CB6 D8EE D3E8 7138

* remotes/kraxel/tags/audio-20190124-pull-request:
  audio: probe audio drivers by default
  audio: error message tweak
  audio: check for pulseaudio daemon pidfile
  audio: use try-sdl for openbsd
  audio: allow optional audio drivers.
  audio: use pkg-config
  audio: fix pc speaker init
Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>

87f6a866

Merge remote-tracking branch 'remotes/vivier2/tags/trivial-patches-pull-request' into staging · 7d8df327

由 Peter Maydell 提交于 1月 25, 2019

- Some typo and UTF-8 fixes
- a ppc e6500 fix to remove duplicate SPR registering

# gpg: Signature made Thu 24 Jan 2019 12:48:05 GMT
# gpg:                using RSA key F30C38BD3F2FBE3C
# gpg: Good signature from "Laurent Vivier <lvivier@redhat.com>"
# gpg:                 aka "Laurent Vivier <laurent@vivier.eu>"
# gpg:                 aka "Laurent Vivier (Red Hat) <lvivier@redhat.com>"
# Primary key fingerprint: CD2F 75DD C8E3 A4DC 2E4F  5173 F30C 38BD 3F2F BE3C

* remotes/vivier2/tags/trivial-patches-pull-request:
  hw/i386/pc.c: fix one typo in function name
  virtio-net: Fix a typo
  ppc: e6500 registers SPR 604 twice
  contrib/gitdm: Fix a typo
  MAINTAINERS: Fix utf-8 mangling
Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>

7d8df327

Merge remote-tracking branch 'remotes/berrange/tags/qio-next-pull-request' into staging · feff0208

由 Peter Maydell 提交于 1月 25, 2019

Merge qio 2010/01/24

Fixes accidental deletion of VNC server UNIX listener socket

# gpg: Signature made Thu 24 Jan 2019 12:24:43 GMT
# gpg:                using RSA key BE86EBB415104FDF
# gpg: Good signature from "Daniel P. Berrange <dan@berrange.com>"
# gpg:                 aka "Daniel P. Berrange <berrange@redhat.com>"
# Primary key fingerprint: DAF3 A6FD B26B 6291 2D0E  8E3F BE86 EBB4 1510 4FDF

* remotes/berrange/tags/qio-next-pull-request:
  io: ensure UNIX client doesn't unlink server socket
Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>

feff0208

docs/qemu-cpu-models: Add MIPS/nanoMIPS QEMU supported CPU models · e5a5b1bb

由 Stefan Markovic 提交于 1月 24, 2019

Add list of supported and preferred CPU models for MIPS32, MIPS64
and nanoMIPS hosts.
Signed-off-by: NAleksandar Markovic <amarkovic@wavecomp.com>
Signed-off-by: NStefan Markovic <smarkovic@wavecomp.com>
Signed-off-by: NAleksandar Markovic <amarkovic@wavecomp.com>

e5a5b1bb

qemu-doc: Add nanoMIPS ISA information · f7d257cb

由 Stefan Markovic 提交于 1月 24, 2019

Add nanoMIPS information in qemu-doc.texi. An example of usage
is included.
Reviewed-by: NAleksandar Markovic <amarkovic@wavecomp.com>
Signed-off-by: NStefan Markovic <smarkovic@wavecomp.com>
Signed-off-by: NAleksandar Markovic <amarkovic@wavecomp.com>

f7d257cb

tests: tcg: mips: Remove old directories · dcca150f

由 Aleksandar Markovic 提交于 1月 24, 2019

Remove old test directories.
Reviewed-by: NAleksandar Rikalo <arikalo@wavecomp.com>
Signed-off-by: NAleksandar Markovic <amarkovic@wavecomp.com>

dcca150f

tests: tcg: mips: Add two new Makefiles · 5e0aa63b

由 Aleksandar Markovic 提交于 1月 24, 2019

Add Makefiles for two new direcitories.
Reviewed-by: NAleksandar Rikalo <arikalo@wavecomp.com>
Signed-off-by: NAleksandar Markovic <amarkovic@wavecomp.com>

5e0aa63b

tests: tcg: mips: Move source files to new locations · 073d9f2c

由 Aleksandar Markovic 提交于 1月 22, 2019

MIPS TCG test will be organized by ISAs and ASEs in future.
Reviewed-by: NAleksandar Rikalo <arikalo@wavecomp.com>
Signed-off-by: NAleksandar Markovic <amarkovic@wavecomp.com>

073d9f2c

MAINTAINERS: Update MIPS sections · b304981f

由 Aleksandar Markovic 提交于 1月 22, 2019

Remove Stefan Markovic as a reviewer for MIPS directories and
files, as he left Wave Computing.
Reviewed-by: NPhilippe Mathieu-Daudé <philmd@redhat.com>
Tested-by: NPhilippe Mathieu-Daudé <philmd@redhat.com>
Signed-off-by: NAleksandar Markovic <amarkovic@wavecomp.com>

b304981f

target/mips: Add I6500 core configuration · ca1ffd14

由 Yongbok Kim 提交于 1月 21, 2019

Add I6500 core configuration. Note that this configuration is
supported only on best-effort basis due to the lack of certain
features in QEMU.
Reviewed-by: NAleksandar Rikalo <arikalo@wavecomp.com>
Signed-off-by: NYongbok Kim <yongbok.kim@imgtec.com>
Signed-off-by: NAleksandar Markovic <amarkovic@wavecomp.com>

ca1ffd14

target/mips: nanoMIPS: Fix branch handling · 697b7b6b

由 Stefan Markovic 提交于 1月 22, 2019

Fix nanoMIPS branch handling.
Reviewed-by: NAleksandar Rikalo <arikalo@wavecomp.com>
Signed-off-by: NStefan Markovic <smarkovic@wavecomp.com>
Signed-off-by: NAleksandar Markovic <amarkovic@wavecomp.com>

697b7b6b

disas: nanoMIPS: Amend DSP instructions related comments · fc95c241

由 Aleksandar Markovic 提交于 1月 21, 2019

Amend some DSP instructions related comments.
Reviewed-by: NAleksandar Rikalo <arikalo@wavecomp.com>
Signed-off-by: NAleksandar Markovic <amarkovic@wavecomp.com>

fc95c241

target/mips: Extend gen_scwp() functionality to support EVA · 8d5388c1

由 Aleksandar Markovic 提交于 1月 21, 2019

Extend gen_scwp() functionality to support EVA by adding an
additional argument, modify internals of the function to handle
new functionality, and accordingly change its invocations.
Reviewed-by: NAleksandar Rikalo <arikalo@wavecomp.com>
Signed-off-by: NAleksandar Markovic <amarkovic@wavecomp.com>

8d5388c1

target/mips: Correct the second argument type of cpu_supports_isa() · 5b1e0981

由 Aleksandar Markovic 提交于 1月 03, 2019

"insn_flags" bitfield was expanded from 32-bit to 64-bit in commit
f9c9cd63. However, this was not reflected on the second argument
of the function cpu_supports_isa(). By chance, this did not create
some wrong behavior, since the left-most halves of all instances of
the second argument are currently all zeros. However, this is still
a bug waiting to happen. Correct this by changing the type of the
second argument to be always 64-bit.
Reviewed-by: NPhilippe Mathieu-Daudé <philmd@redhat.com>
Signed-off-by: NAleksandar Markovic <amarkovic@wavecomp.com>

5b1e0981

target/mips: nanoMIPS: Rename macros for extracting 3-bit-coded GPR numbers · 99e49abf

由 Aleksandar Markovic 提交于 1月 03, 2019

Rename macros for extracting 3-bit-coded GPR numbers, to achieve
better consistency with the nanoMIPS documentation.
Reviewed-by: NAleksandar Rikalo <arikalo@wavecomp.com>
Signed-off-by: NAleksandar Markovic <amarkovic@wavecomp.com>

99e49abf

target/mips: nanoMIPS: Remove an unused macro · be3a131a

由 Aleksandar Markovic 提交于 1月 03, 2019

Remove a macro that is never used.
Reviewed-by: NPhilippe Mathieu-Daudé <philmd@redhat.com>
Signed-off-by: NAleksandar Markovic <amarkovic@wavecomp.com>

be3a131a