1. 13 6月, 2010 8 次提交
  2. 07 2月, 2010 1 次提交
  3. 07 11月, 2009 1 次提交
    • G
      v3: don't call reset functions on cpu initialization · c1699988
      Glauber Costa 提交于
      There is absolutely no need to call reset functions when initializing
      devices. Since we are already registering them, calling qemu_system_reset()
      should suffice. Actually, it is what happens when we reboot the machine,
      and using the same process instead of a special case semantics will even
      allow us to find bugs easier.
      
      Furthermore, the fact that we initialize things like the cpu quite early,
      leads to the need to introduce synchronization stuff like qemu_system_cond.
      This patch removes it entirely. All we need to do is call qemu_system_reset()
      only when we're already sure the system is up and running
      
      I tested it with qemu (with and without io-thread) and qemu-kvm, and it
      seems to be doing okay - although qemu-kvm uses a slightly different patch.
      
      [ v2: user mode still needs cpu_reset, so put it in ifdef. ]
      [ v3: leave qemu_system_cond for now. ]
      Signed-off-by: NGlauber Costa <glommer@redhat.com>
      Signed-off-by: NBlue Swirl <blauwirbel@gmail.com>
      c1699988
  4. 05 10月, 2009 2 次提交
  5. 02 10月, 2009 2 次提交
  6. 12 9月, 2009 2 次提交
  7. 26 8月, 2009 1 次提交
  8. 28 7月, 2009 1 次提交
    • B
      HPET fixes for reg writes · ce536cfd
      Beth Kon 提交于
      This patch addresses the problems found by Andriy Gapon:
      
      - The code was incorrectly overwriting the high order 32
        bits of the timer and hpet config registers. This didn't show up
        in testing because linux and windows use hpet in legacy mode,
        where the high order 32 bits (advertising available interrupts)
        of the timer config register are ignored, and the high order 32
        bits of the hpet config register are reserved and unused.
      
      - The mask for level-triggered interrupts was off by a bit. (hpet
        doesn't currently support level-triggered interrupts).
      
      In addition, I removed some unused #defines, and corrected the ioapic
      interrupt values advertised. I'd set this up early in hpet development
      and never went back to correct it, and no bugs resulted since linux and
      windows use hpet in legacy mode where available interrupts are ignored.
      Signed-off-by: NBeth Kon <eak@us.ibm.com>
      Signed-off-by: NAnthony Liguori <aliguori@us.ibm.com>
      ce536cfd
  9. 17 7月, 2009 2 次提交
  10. 30 6月, 2009 1 次提交
  11. 17 6月, 2009 1 次提交
  12. 22 5月, 2009 1 次提交
    • J
      Introduce reset notifier order · 8217606e
      Jan Kiszka 提交于
      Add the parameter 'order' to qemu_register_reset and sort callbacks on
      registration. On system reset, callbacks with lower order will be
      invoked before those with higher order. Update all existing users to the
      standard order 0.
      
      Note: At least for x86, the existing users seem to assume that handlers
      are called in their registration order. Therefore, the patch preserves
      this property. If someone feels bored, (s)he could try to identify this
      dependency and express it properly on callback registration.
      Signed-off-by: NJan Kiszka <jan.kiszka@siemens.com>
      Signed-off-by: NAnthony Liguori <aliguori@us.ibm.com>
      8217606e
  13. 18 4月, 2009 1 次提交
    • A
      hpet: Fix emulation of HPET_TN_SETVAL (Jan Kiszka) · 37873241
      aliguori 提交于
      While Intel's spec is not that clear here, latest changes to Linux' HPET
      code (commit c23e253e67c9d8a91a0ffa33c1f571a17f0a2403, "x86: hpet: stop
      HPET_COUNTER when programming periodic mode") strongly suggest that
      HPET_TN_SETVAL rather means: Set _both_ the comparator value and
      register.
      
      With this patch applied, I'm again able to boot 2.6.30-rc kernels as
      they no longer panic like this (which was due to the comparator
      register remaining 0):
      
      ENABLING IO-APIC IRQs
      ..TIMER: vector=0x30 apic1=0 pin1=2 apic2=-1 pin2=-1
      ..MP-BIOS bug: 8254 timer not connected to IO-APIC
      ...trying to set up timer (IRQ0) through the 8259A ...
      ..... (found apic 0 pin 2) ...
      ....... failed.
      ...trying to set up timer as Virtual Wire IRQ...
      ..... failed.
      ...trying to set up timer as ExtINT IRQ...
      ..... failed :(.
      Kernel panic - not syncing: IO-APIC + timer doesn't work! [...]
      Signed-off-by: NJan Kiszka <jan.kiszka@siemens.com>
      Signed-off-by: NAnthony Liguori <aliguori@us.ibm.com>
      
      
      git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@7168 c046a42c-6fe2-441c-8c8c-71466251a162
      37873241
  14. 17 1月, 2009 1 次提交
  15. 05 1月, 2009 1 次提交
  16. 19 12月, 2008 2 次提交
  17. 18 12月, 2008 1 次提交