V7 => THUMB2
Signed-off-by: NAndreas Färber <andreas.faerber@web.de>
Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>

V6 && !M => AUXCR
Signed-off-by: NAndreas Färber <andreas.faerber@web.de>
Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>

V7 && M => V6
V7 && !M => V6K
Signed-off-by: NAndreas Färber <andreas.faerber@web.de>
Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>

V6K => V6
Signed-off-by: NAndreas Färber <andreas.faerber@web.de>
Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>

V6 => V5
Signed-off-by: NAndreas Färber <andreas.faerber@web.de>
Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>

V5 => V4T
Signed-off-by: NAndreas Färber <andreas.faerber@web.de>
Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>

Return the correct value in the domain field in the cp15 DFSR
(C5) -- bug noticed during Xvisor development.
Signed-off-by: NJean-Christophe DUBOIS <jcd@tribudubois.net>
[Peter Maydell: reworded commit message]
Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>

Don't call arm_translate_init() (which allocates TCG resources)
unless TCG is enabled.
Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
Signed-off-by: NAndrzej Zaborowski <andrew.zaborowski@intel.com>

Clarify some slightly misleading comments in the Thumb decoder's
handling of the memory hint space -- in particular one code path
marked as 'UNPREDICTABLE or unallocated hint' also includes some
legitimate preload instructions.
Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
Signed-off-by: NAndrzej Zaborowski <andrew.zaborowski@intel.com>

env is allocated in cpu_arm_init() with g_malloc0(), so free with g_free().
Signed-off-by: NAndreas Färber <afaerber@suse.de>
Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>

Fix the restoring of VFP registers on vmload.
Signed-off-by: NDmitry Koshelev <karaghiozis@gmail.com>
Reviewed-by: NJuan Quintela <quintela@redhat.com>
[peter.maydell: improved commit message a little]
Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>

Implement the fused multiply-accumulate instructions (VFMA, VFMS,
VFNMA, VFNMS) which are new in VFPv4.
Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>

Add support for UDIV and SDIV in ARM mode. This is a new optional
feature for A profile cores (Thumb mode has had UDIV and SDIV for
M profile cores for some time).
Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>

Rename the ARM_FEATURE_DIV feature bit to _THUMB_DIV, to
make room for a new feature switch enabling DIV in the ARM
encoding. (Cores may implement either (a) no divide insns
(b) divide insns in Thumb encodings only (c) divide insns
in both ARM and Thumb encodings.)
Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>

Clean up the decoding of the v6 media multiply space so that we UNDEF
on unassigned encodings rather than randomly interpreting them as
some instruction in this space.
Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>

Indeed, the result is known to be always positive.
Signed-off-by: NChristophe Lyon <christophe.lyon@st.com>
Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>

Fix a bug in bccd9ec5,
target-arm/op_helper.c missed a change unlike all other targets.
This lead to a NULL pointer dereferences.
Reviewed-by: NPeter Maydell <peter.maydell@linaro.org>
Signed-off-by: NBlue Swirl <blauwirbel@gmail.com>

The command line option is called -kernel, not -kenrel.

Cc: Paul Brook <paul@codesourcery.com>
Reviewed-by: NPeter Maydell <peter.maydell@linaro.org>
Signed-off-by: NAndreas Färber <andreas.faerber@web.de>
Signed-off-by: NStefan Hajnoczi <stefanha@linux.vnet.ibm.com>

Pass CPUState pointer to tlb_fill() instead of architecture local
cpu_single_env hacks.
Signed-off-by: NBlue Swirl <blauwirbel@gmail.com>

qemu_malloc/qemu_free no longer exist after this commit.
Signed-off-by: NAnthony Liguori <aliguori@us.ibm.com>

Parameter is_softmmu (and its evil mutant twin brother is_softmuu)
is not used in cpu_*_handle_mmu_fault() functions, remove them
and adjust callers.
Acked-by: NRichard Henderson <rth@twiddle.net>
Signed-off-by: NBlue Swirl <blauwirbel@gmail.com>

Move softmmu_exec.h include directives from target-*/exec.h to
target-*/op_helper.c. Move also various other stuff only used in
op_helper.c there.

Define global env in dyngen-exec.h.

For i386, move wrappers for segment and FPU helpers from user-exec.c
to op_helper.c. Implement raise_exception_err_env() to handle dynamic
CPUState. Move the function declarations to cpu.h since they can be
used outside of op_helper.c context.

LM32, s390x, UniCore32: remove unused cpu_halted(), regs_to_env() and
env_to_regs().

ARM: make raise_exception() static.

Convert
#include "exec.h"
to
#include "cpu.h"
#include "dyngen-exec.h"
and remove now unused target-*/exec.h.
Signed-off-by: NBlue Swirl <blauwirbel@gmail.com>

Remove some stray printfs for cases which don't generally happen
(some VFP UNDEF cases, reads and writes to unknown cp14 registers);
we should simply generate an UNDEF when the instruction is executed.
Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>

VCVTT/VCVTB with bit 8 set is UNPREDICTABLE; we choose to UNDEF.
This avoids a TCG assert later when the VCVTT/VCVTB code tries to
use a source register that wasn't ever set up.

We pull the check for the presence of the half-precision extension
up in to this common code as well.
Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>

Handle the UNDEF and UNPREDICTABLE cases for VLDM and VSTM. In
particular, we now generate an undef exception for overlarge imm8
values rather than generating 1000+ TCG ops and hitting an assertion.
Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>

ARMv6 implemented various operations as special cases of cp15 accesses
which are true instructions in v7; this includes barriers (DMB, DSB, ISB).
Catch this special case at translate time, so that it works in linux-user
mode (which doesn't provide a functional get_cp15 helper) as well as
system mode.

Includes minor cleanup of the existing cases (single switch statement,
and doing the "OK in user mode?" test explicitly rather than hiding it in
cp15_user_ok()).
Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>

The 1136r1 is actually a v6K core (unlike the 1136r0); mark it as such,
thus enabling the TLS registers, NOP hints, CLREX, half and byte wide
exclusive load/stores, etc.

The VA-to-PA translation registers are not present on 1136r1, so
introduce a new feature flag for them, which is enabled on 1176,
11MPCore and all v7 cores.
Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
Reviewed-by: NJamie Iles <jamie@jamieiles.com>

Add support for v6K ARM1176JZF-S.  This core includes the VA<->PA
translation capability and security extensions.
Signed-off-by: NJamie Iles <jamie@jamieiles.com>
Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>

The VMSAv7 remapping and access permissions were introduced in ARMv6K
and not ARMv7.
Signed-off-by: NJamie Iles <jamie@jamieiles.com>
Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>

Correct typos of "licenced" to "licensed".
Reviewed-by: NStefan Weil <weil@mail.berlios.de>
Reviewed-by: NAndreas F=E4rber <andreas.faerber@web.de>
Signed-off-by: NMatthew Fernandez <matthew.fernandez@gmail.com>
Signed-off-by: NAnthony Liguori <aliguori@us.ibm.com>

Parameter 'info' is const, so add the missing attribute.

v2:
Add 'const' to the local variable info in do_cpu_reset() and to
the boot_info field in CPUARMState (suggested by Peter Maydell).

Cc: Andrzej Zaborowski <balrogg@gmail.com>
Cc: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: NStefan Weil <weil@mail.berlios.de>
Signed-off-by: NAndrzej Zaborowski <andrew.zaborowski@intel.com>

Most exec-all.h include directives are now useless, remove them.
Signed-off-by: NBlue Swirl <blauwirbel@gmail.com>

Move functions cpu_has_work() and cpu_pc_from_tb() from exec.h to cpu.h. This is
needed by later patches.
Signed-off-by: NBlue Swirl <blauwirbel@gmail.com>

Before the next patch, fix coding style of the areas affected.

Change the type of the return value from cpu_has_work() and
qemu_cpu_has_work() to bool.
Signed-off-by: NBlue Swirl <blauwirbel@gmail.com>

Make cpu_loop_exit() take a parameter for CPUState instead of relying
on global env.
Signed-off-by: NBlue Swirl <blauwirbel@gmail.com>

Correct the decode of the register numbers for BASEPRI, BASEPRI_MAX
and FAULTMASK, according to "ARMv7-M Architecture Reference Manual"
issue D section "B5.2.3 MRS" and "B5.2.3 MSR".
Signed-off-by: NSebastian Huber <sebastian.huber@embedded-brains.de>
Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>

Newer Linux kernels assume the existence of the performance counter
cp15 registers. Provide a minimal implementation of these registers.
We support no events. This should be compliant with the ARM ARM,
except that we don't implement the cycle counter.
Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>

This effectively reverts commit 2a3f75b4
so that we return to passing CPUState to helpers as an explicit parameter.
(There were a number of conflicts in target-arm/translate.c which had
to be resolved by hand so it is not a pure revert.)
Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>

Make the Neon helpers for various floating point operations take an
explicit pointer to the float_status they use, so they don't rely on
the global environment pointer any more. This also allows us to drop
the mul/sub/add helpers completely and just use the vfp versions.
Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>

Make the VFP binop helper functions take a pointer to the fp status, not
the entire CPUState. This will allow us to use them for Neon operations too.
Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>