- 08 8月, 2011 1 次提交
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由 Avi Kivity 提交于
This lets us register BARs in the I/O address space. Reviewed-by: NRichard Henderson <rth@twiddle.net> Reviewed-by: NAnthony Liguori <aliguori@us.ibm.com> Signed-off-by: NAvi Kivity <avi@redhat.com> Signed-off-by: NAnthony Liguori <aliguori@us.ibm.com>
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- 29 7月, 2011 1 次提交
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由 Avi Kivity 提交于
This is now done sloppily, via get_system_memory(). Eventually callers will be converted to stop using that. Reviewed-by: NAnthony Liguori <aliguori@us.ibm.com> Signed-off-by: NAvi Kivity <avi@redhat.com> Signed-off-by: NAnthony Liguori <aliguori@us.ibm.com>
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- 12 6月, 2011 1 次提交
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由 Isaku Yamahata 提交于
use PCIDeviceInfo to initialize ids. Signed-off-by: NIsaku Yamahata <yamahata@valinux.co.jp> Signed-off-by: NMichael S. Tsirkin <mst@redhat.com>
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- 20 1月, 2011 1 次提交
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由 Aurelien Jarno 提交于
Signed-off-by: NAurelien Jarno <aurelien@aurel32.net>
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- 11 12月, 2010 2 次提交
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由 Alexander Graf 提交于
This patch converts the ISA MMIO bridge code to always use little endian mmio. All bswap code that existed was only there to convert from native cpu endianness to little endian ISA devices. Signed-off-by: NAlexander Graf <agraf@suse.de> Signed-off-by: NBlue Swirl <blauwirbel@gmail.com>
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由 Alexander Graf 提交于
As stated before, devices can be little, big or native endian. The target endianness is not of their concern, so we need to push things down a level. This patch adds a parameter to cpu_register_io_memory that allows a device to choose its endianness. For now, all devices simply choose native endian, because that's the same behavior as before. Signed-off-by: NAlexander Graf <agraf@suse.de> Signed-off-by: NBlue Swirl <blauwirbel@gmail.com>
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- 14 4月, 2010 1 次提交
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由 Aurelien Jarno 提交于
Since commit 8da3ff18 ("MMIO callback interface changes"), the addresses passed to the I/O functions are an offset to the start of the area. As a consequence, there is no need to correct the address using the value of IOBR. This make possible the use of the default MMIO functions. Moreover the addresses are now remaped when the value if IOBR change. The memory area corresponds to the devices behing the PCI bus, it should not be mapped by the PCI controller. Remove the corresponding code. Signed-off-by: NAurelien Jarno <aurelien@aurel32.net>
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- 01 12月, 2009 2 次提交
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由 Isaku Yamahata 提交于
Now pci host stuff has been moved from pci.[hc] to pci_host.[hc] so the declaration of pci_data_{read, write}() should be in pci_host.h This patch moves them from pci.h to pci_host.h for consistency. Signed-off-by: NIsaku Yamahata <yamahata@valinux.co.jp> Signed-off-by: NMichael S. Tsirkin <mst@redhat.com>
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由 Michael S. Tsirkin 提交于
pci.h declares some functions which aren't defined in pci.h. Clean up moving things to appropriate headers, and update all users. Signed-off-by: NMichael S. Tsirkin <mst@redhat.com>
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- 02 10月, 2009 2 次提交
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由 Anthony Liguori 提交于
In the very least, a change like this requires discussion on the list. The naming convention is goofy and it causes a massive merge problem. Something like this _must_ be presented on the list first so people can provide input and cope with it. This reverts commit 99a0949b. Signed-off-by: NAnthony Liguori <aliguori@us.ibm.com>
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由 malc 提交于
Some not so obvious bits, slirp and Xen were left alone for the time being. Signed-off-by: Nmalc <av1474@comtv.ru>
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- 21 9月, 2009 1 次提交
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由 Blue Swirl 提交于
The CPU state parameter is not used, remove it and adjust callers. Now we can compile ioport.c once for all targets. Signed-off-by: NBlue Swirl <blauwirbel@gmail.com>
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- 04 9月, 2009 1 次提交
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由 Juan Quintela 提交于
piix_pci want to pass more things that the pic Signed-off-by: NJuan Quintela <quintela@redhat.com> Signed-off-by: NAnthony Liguori <aliguori@us.ibm.com>
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- 26 8月, 2009 1 次提交
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由 Blue Swirl 提交于
Signed-off-by: NBlue Swirl <blauwirbel@gmail.com>
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- 17 6月, 2009 1 次提交
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由 Avi Kivity 提交于
The parameter is always zero except when registering the three internal io regions (ROM, unassigned, notdirty). Remove the parameter to reduce the API's power, thus facilitating future change. Signed-off-by: NAvi Kivity <avi@redhat.com> Signed-off-by: NAnthony Liguori <aliguori@us.ibm.com>
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- 23 5月, 2009 1 次提交
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由 Paul Brook 提交于
Implement and use a common device bus state. The main side-effect is that creating a bus and attaching it to a parent device are no longer separate operations. For legacy code we allow a NULL parent, but that should go away eventually. Also tweak creation code to veriry theat a device in on the right bus. Signed-off-by: NPaul Brook <paul@codesourcery.com>
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- 13 3月, 2009 1 次提交
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由 aliguori 提交于
This patch adds and uses #defines for the remaining hardcoded PCI device IDs. It also moves definitions taken from linux/pci_ids.h into a separate header (hw/pci_ids.h), removes the 'RTL' from PCI_DEVICE_ID_REALTEK_RTL8029, and renames PCI_DEVICE_ID_FSL_E500 to PCI_DEVICE_ID_MPC8533E to match Linux's definition. Changes in v2: * Don't use C99-style comments * Move definitions from linux/pci_ids.h into a separate header * Rename PCI_DEVICE_ID_FSL_E500 to PCI_DEVICE_ID_MPC8533E Signed-off-by: NStuart Brady <stuart.brady@gmail.com> Signed-off-by: NAnthony Liguori <aliguori@us.ibm.com> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6841 c046a42c-6fe2-441c-8c8c-71466251a162
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- 26 1月, 2009 1 次提交
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由 aliguori 提交于
This patch defines PCI vendor and device IDs in pci.h (matching those from Linux's pci_ids.h), and uses those definitions where appropriate. Change from v1: Introduces pci_config_set_vendor_id() / pci_config_set_device_id() accessors as suggested by Anthony Liguori. Signed-off-by: NStuart Brady <stuart.brady@gmail.com> Signed-off-by: NAnthony Liguori <aliguori@us.ibm.com> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6442 c046a42c-6fe2-441c-8c8c-71466251a162
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- 25 1月, 2009 1 次提交
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由 aurel32 提交于
Add resource registration both for P4 and A7. This is needed because of #5935 SH4: Eliminate P4 to A7 mangling. Additionally, {reg,iop,mem}base which is no longer used are removed. Signed-off-by: NTakashi YOSHII <takasi-y@ops.dti.ne.jp> Signed-off-by: NAurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6433 c046a42c-6fe2-441c-8c8c-71466251a162
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- 13 12月, 2008 1 次提交
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由 blueswir1 提交于
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6000 c046a42c-6fe2-441c-8c8c-71466251a162
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- 08 12月, 2008 2 次提交
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由 balrog 提交于
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5928 c046a42c-6fe2-441c-8c8c-71466251a162
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由 balrog 提交于
This patch adds SuperH on-chip PCI controller(PCIC) support. Signed-off-by: NTakashi YOSHII <takasi-y@ops.dti.ne.jp> Signed-off-by: NAndrzej Zaborowski <andrew.zaborowski@intel.com> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5927 c046a42c-6fe2-441c-8c8c-71466251a162
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