- 29 1月, 2016 1 次提交
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由 Peter Maydell 提交于
Clean up includes so that osdep.h is included first and headers which it implies are not included manually. This commit was created with scripts/clean-includes. Signed-off-by: NPeter Maydell <peter.maydell@linaro.org> Message-id: 1453832250-766-16-git-send-email-peter.maydell@linaro.org
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- 25 8月, 2015 1 次提交
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由 Laurent Vivier 提交于
As we have removed CONFIG_USE_GUEST_BASE, we always use a guest base and the macros GUEST_BASE and RESERVED_VA become useless: replace them by their values. Reviewed-by: NAlexander Graf <agraf@suse.de> Signed-off-by: NLaurent Vivier <laurent@vivier.eu> Message-Id: <1440420834-8388-1-git-send-email-laurent@vivier.eu> Signed-off-by: NRichard Henderson <rth@twiddle.net>
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- 09 6月, 2015 1 次提交
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由 Richard Henderson 提交于
The addition of MO_AMASK means that places that used inverted masks need to be changed to use positive masks, and places that failed to mask the intended bits need updating. Reviewed-by: NYongbok Kim <yongbok.kim@imgtec.com> Tested-by: NYongbok Kim <yongbok.kim@imgtec.com> Signed-off-by: NRichard Henderson <rth@twiddle.net>
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- 15 5月, 2015 2 次提交
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由 Richard Henderson 提交于
The extra information is not yet used but it is now available. This requires minor changes through all of the tcg backends. Reviewed-by: NPeter Maydell <peter.maydell@linaro.org> Signed-off-by: NRichard Henderson <rth@twiddle.net>
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由 Richard Henderson 提交于
At the tcg opcode level, not at the tcg-op.h generator level. This requires minor changes through all of the tcg backends, but none of the cpu translators. Reviewed-by: NPeter Maydell <peter.maydell@linaro.org> Signed-off-by: NRichard Henderson <rth@twiddle.net>
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- 14 3月, 2015 1 次提交
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由 Richard Henderson 提交于
This is less about improved type checking than enabling a subsequent change to the representation of labels. Acked-by: NClaudio Fontana <claudio.fontana@huawei.com> Tested-by: NClaudio Fontana <claudio.fontana@huawei.com> Cc: Andrzej Zaborowski <balrogg@gmail.com> Cc: Peter Maydell <peter.maydell@linaro.org> Cc: Aurelien Jarno <aurelien@aurel32.net> Cc: Blue Swirl <blauwirbel@gmail.com> Cc: Stefan Weil <sw@weilnetz.de> Reviewed-by: NBastian Koppelmann <kbastian@mail.uni-paderborn.de> Signed-off-by: NRichard Henderson <rth@twiddle.net>
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- 29 5月, 2014 1 次提交
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由 Richard Henderson 提交于
Signed-off-by: NRichard Henderson <rth@twiddle.net>
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- 13 5月, 2014 2 次提交
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由 Richard Henderson 提交于
The INDEX_op_call case has just been obsoleted; the mov and movi cases have not been reachable for years. Attempt to document this both in each tcg_out_op switch, and via TCG_OPF_NOT_PRESENT. Because of the TCG_OPF_NOT_PRESENT change, this must be done for all targets in a single commit. Signed-off-by: NRichard Henderson <rth@twiddle.net>
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由 Richard Henderson 提交于
And use tcg pointer differencing functions as appropriate. Reviewed-by: NPeter Maydell <peter.maydell@linaro.org> Signed-off-by: NRichard Henderson <rth@twiddle.net>
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- 19 4月, 2014 2 次提交
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由 Richard Henderson 提交于
Most 64-bit targets need to be able to ignore the high bits of a TCG_TYPE_I32 value. Suggested-by: NStuart Brady <sdb@zubnet.me.uk> Signed-off-by: NRichard Henderson <rth@twiddle.net>
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由 Stefan Weil 提交于
Static code analyzers complain about signed bitfields with only a single bit. is_ld is used as a boolean value, so make it bool. ppc64 already used bool for the 2nd argument is_ld of the local function add_qemu_ldst_label. Modify all other TCG targets to do follow this example. Signed-off-by: NStefan Weil <sw@weilnetz.de> Signed-off-by: NRichard Henderson <rth@twiddle.net>
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- 28 3月, 2014 1 次提交
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由 Richard Henderson 提交于
The arm ldrd/strd insns must cause alignment traps, whereas at least for armv7 ldr/str must handle unaligned operations. While this is hardly the only problem facing user-only emu, this solves one problem for i386 on armv7 emulation. Reviewed-by: NPeter Maydell <peter.maydell@linaro.org> Reported-by: NHuw Davies <huw@codeweavers.com> Signed-off-by: NRichard Henderson <rth@twiddle.net>
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- 18 2月, 2014 1 次提交
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由 Huw Davies 提交于
It's this that should be subtracted from 0x20 when converting to a right rotate. Cc: qemu-stable@nongnu.org Signed-off-by: NHuw Davies <huw@codeweavers.com> Signed-off-by: NRichard Henderson <rth@twiddle.net>
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- 30 11月, 2013 1 次提交
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由 Richard Henderson 提交于
Allow host detection on linux systems without glibc 2.16 or later. Reviewed-by: NPeter Maydell <peter.maydell@linaro.org> Signed-off-by: NRichard Henderson <rth@twiddle.net>
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- 13 10月, 2013 5 次提交
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由 Richard Henderson 提交于
If we pull the code to emit the actual load/store into a subroutine, we can share the reg+reg addressing mode code between softmmu and usermode. This lets us load GUEST_BASE into a temporary register rather than attempting to add it piece-wise to the address. Which lets us use movw+movt for armv7, rather than (up to) 4 adds. Code size for pre-armv7 stays the same. Signed-off-by: NRichard Henderson <rth@twiddle.net>
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由 Richard Henderson 提交于
Signed-off-by: NRichard Henderson <rth@twiddle.net>
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由 Richard Henderson 提交于
s/addr_reg2/addrhi/ s/addr_reg/addrlo/ s/data_reg2/datahi/ s/data_reg/datalo/ Signed-off-by: NRichard Henderson <rth@twiddle.net>
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由 Richard Henderson 提交于
Signed-off-by: NRichard Henderson <rth@twiddle.net>
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由 Richard Henderson 提交于
Signed-off-by: NRichard Henderson <rth@twiddle.net>
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- 11 10月, 2013 1 次提交
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由 Richard Henderson 提交于
Move TCGLabelQemuLdst and related stuff out of tcg.h. Signed-off-by: NRichard Henderson <rth@twiddle.net>
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- 02 10月, 2013 8 次提交
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由 Richard Henderson 提交于
There are free scheduling slots between the sequence of comparison instructions. This requires changing the register in use to avoid conflict with those compares. Signed-off-by: NRichard Henderson <rth@twiddle.net>
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由 Richard Henderson 提交于
The main intent of the patch is to allow the tlb addend register to be changed, without tying that change to the constraint. But the most common side-effect seems to be to enable usage of ldrd with the r0,r1 pair. Signed-off-by: NRichard Henderson <rth@twiddle.net>
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由 Richard Henderson 提交于
Preparatory to rescheduling the tlb load, and changing said register. Continues to use R1 for now. Signed-off-by: NRichard Henderson <rth@twiddle.net>
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由 Richard Henderson 提交于
This allows us to make more intelligent decisions about the relative offsets of the tlb comparator and the addend, avoiding any need of writeback addressing. Signed-off-by: NRichard Henderson <rth@twiddle.net>
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由 Richard Henderson 提交于
One of the two constraints we already checked via #if, but the tlb offset distance was only checked at runtime. Signed-off-by: NRichard Henderson <rth@twiddle.net>
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由 Richard Henderson 提交于
Signed-off-by: NRichard Henderson <rth@twiddle.net>
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由 Richard Henderson 提交于
Use the new helper_ret_*_mmu routines. Use a conditional call to arrange for a tail-call from the store path, and to load the return address for the helper for the load path. Signed-off-by: NRichard Henderson <rth@twiddle.net>
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由 Richard Henderson 提交于
Reviewed-by: NAurelien Jarno <aurelien@aurel32.net> Signed-off-by: NRichard Henderson <rth@twiddle.net>
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- 03 9月, 2013 3 次提交
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由 Richard Henderson 提交于
The _cmmu helpers can be moved to exec-all.h. The helpers that are used from TCG will shortly need access to tcg_target_long so move their declarations into tcg.h. This requires minor include adjustments to all TCG backends. Reviewed-by: NAurelien Jarno <aurelien@aurel32.net> Signed-off-by: NRichard Henderson <rth@twiddle.net>
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由 Richard Henderson 提交于
Reviewed-by: NAurelien Jarno <aurelien@aurel32.net> Signed-off-by: NRichard Henderson <rth@twiddle.net>
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由 Richard Henderson 提交于
Reviewed-by: NAurelien Jarno <aurelien@aurel32.net> Signed-off-by: NRichard Henderson <rth@twiddle.net>
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- 09 7月, 2013 6 次提交
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由 Richard Henderson 提交于
Allows unwinding past the code_gen_buffer. Reviewed-by: NPeter Maydell <peter.maydell@linaro.org> Signed-off-by: NRichard Henderson <rth@twiddle.net>
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由 Richard Henderson 提交于
With this we can generate armv7 insns even when the OS compiles for a lower common denominator. The macros are arranged so that when we do compile for a given ISA, all of the runtime checks for that ISA are optimized away. Reviewed-by: NPeter Maydell <peter.maydell@linaro.org> Signed-off-by: NRichard Henderson <rth@twiddle.net>
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由 Richard Henderson 提交于
GCC 4.8 defines a handy __ARM_ARCH symbol that we can use, which will make us nicely forward compatible with ARMv8 AArch32. Reviewed-by: NPeter Maydell <peter.maydell@linaro.org> Signed-off-by: NRichard Henderson <rth@twiddle.net>
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由 Richard Henderson 提交于
As it really controls the availability of a thumb interworking instruction on armv5t. Reviewed-by: NPeter Maydell <peter.maydell@linaro.org> Signed-off-by: NRichard Henderson <rth@twiddle.net>
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由 Richard Henderson 提交于
We can now detect and use divide instructions at runtime, rather than having to restrict their availability to compile-time. Reviewed-by: NPeter Maydell <peter.maydell@linaro.org> Signed-off-by: NRichard Henderson <rth@twiddle.net>
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由 Richard Henderson 提交于
Reviewed-by: NPeter Maydell <peter.maydell@linaro.org> Signed-off-by: NRichard Henderson <rth@twiddle.net>
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- 05 6月, 2013 1 次提交
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由 Richard Henderson 提交于
We've got a compile-time check for the condition in exec/cpu-defs.h. Reviewed-by: NAndreas Färber <afaerber@suse.de> Reviewed-by: Nliguang <lig.fnst@cn.fujitsu.com> Signed-off-by: NRichard Henderson <rth@twiddle.net>
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- 03 5月, 2013 2 次提交
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由 Richard Henderson 提交于
Avoid the mini constant pool for armv7, and avoid replicating the test for pre-v7. Signed-off-by: NRichard Henderson <rth@twiddle.net> Signed-off-by: NAurelien Jarno <aurelien@aurel32.net>
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由 Richard Henderson 提交于
Found by inspection, since the effect of the bug was simply to send all memory ops through the slow path. Signed-off-by: NRichard Henderson <rth@twiddle.net> Signed-off-by: NAurelien Jarno <aurelien@aurel32.net>
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