1. 27 6月, 2016 28 次提交
  2. 25 6月, 2016 1 次提交
  3. 24 6月, 2016 11 次提交
    • A
      target-mips: Add FCR31's FS bit definition · 77be4199
      Aleksandar Markovic 提交于
      Add preprocessor definition of FCR31's FS bit, and update related
      code for setting this bit.
      Signed-off-by: NAleksandar Markovic <aleksandar.markovic@imgtec.com>
      Reviewed-by: NLeon Alrae <leon.alrae@imgtec.com>
      Signed-off-by: NLeon Alrae <leon.alrae@imgtec.com>
      77be4199
    • A
      target-mips: Implement FCR31's R/W bitmask and related functionalities · 599bc5e8
      Aleksandar Markovic 提交于
      This patch implements read and write access rules for Mips floating
      point control and status register (FCR31). The change can be divided
      into following parts:
      
      - Add fields that will keep FCR31's R/W bitmask in procesor
        definitions and processor float_status structure.
      
      - Add appropriate value for FCR31's R/W bitmask for each supported
        processor.
      
      - Add function for setting snan_bit_is_one, and integrate it in
        appropriate places.
      
      - Modify handling of CTC1 (case 31) instruction to use FCR31's R/W
        bitmask.
      
      - Modify handling user mode executables for Mips, in relation to the
        bit EF_MIPS_NAN2008 from ELF header, that is in turn related to
        reading and writing to FCR31.
      
      - Modify gdb behavior in relation to FCR31.
      Signed-off-by: NThomas Schwinge <thomas@codesourcery.com>
      Signed-off-by: NMaciej W. Rozycki <macro@codesourcery.com>
      Signed-off-by: NAleksandar Markovic <aleksandar.markovic@imgtec.com>
      Reviewed-by: NLeon Alrae <leon.alrae@imgtec.com>
      Signed-off-by: NLeon Alrae <leon.alrae@imgtec.com>
      599bc5e8
    • A
      target-mips: Add nan2008 flavor of <CEIL|CVT|FLOOR|ROUND|TRUNC>.<L|W>.<S|D> · 87552089
      Aleksandar Markovic 提交于
      New set of helpers for handling nan2008-syle versions of instructions
      <CEIL|CVT|FLOOR|ROUND|TRUNC>.<L|W>.<S|D>, for Mips R6.
      
      All involved instructions have float operand and integer result. Their
      core functionality is implemented via invocations of appropriate SoftFloat
      functions. The problematic cases are when the operand is a NaN, and also
      when the operand (float) is out of the range of the result.
      
      Here one can distinguish three cases:
      
      CASE MIPS-A: (FCR31.NAN2008 == 1)
      
         1. Operand is a NaN, result should be 0;
         2. Operand is larger than INT_MAX, result should be INT_MAX;
         3. Operand is smaller than INT_MIN, result should be INT_MIN.
      
      CASE MIPS-B: (FCR31.NAN2008 == 0)
      
         1. Operand is a NaN, result should be INT_MAX;
         2. Operand is larger than INT_MAX, result should be INT_MAX;
         3. Operand is smaller than INT_MIN, result should be INT_MAX.
      
      CASE SoftFloat:
      
         1. Operand is a NaN, result is INT_MAX;
         2. Operand is larger than INT_MAX, result is INT_MAX;
         3. Operand is smaller than INT_MIN, result is INT_MIN.
      
      Current implementation of <CEIL|CVT|FLOOR|ROUND|TRUNC>.<L|W>.<S|D>
      implements case MIPS-B. This patch relates to case MIPS-A. For case
      MIPS-A, only return value for NaN-operands should be corrected after
      appropriate SoftFloat library function is called.
      
      Related MSA instructions FTRUNC_S and FTINT_S already handle well
      all cases, in the fashion similar to the code from this patch.
      Signed-off-by: NAleksandar Markovic <aleksandar.markovic@imgtec.com>
      Reviewed-by: NLeon Alrae <leon.alrae@imgtec.com>
      [leon.alrae@imgtec.com:
       * removed a statement from the description which caused slight confusion]
      Signed-off-by: NLeon Alrae <leon.alrae@imgtec.com>
      87552089
    • A
      target-mips: Add abs2008 flavor of <ABS|NEG>.<S|D> · 6be77480
      Aleksandar Markovic 提交于
      Updated handling of instructions <ABS|NEG>.<S|D>. Note that legacy
      (pre-abs2008) ABS and NEG instructions are arithmetic (and, therefore,
      any NaN operand causes signaling invalid operation), while abs2008
      ones are non-arithmetic, always and only changing the sign bit, even
      for NaN-like operands. Details on these instructions are documented
      in [1] p. 35 and 359.
      
      Implementation-wise, abs2008 versions are implemented without helpers,
      for simplicity and performance sake.
      
      [1] "MIPS Architecture For Programmers Volume II-A:
          The MIPS64 Instruction Set Reference Manual",
          Imagination Technologies LTD, Revision 6.04, November 13, 2015
      Signed-off-by: NThomas Schwinge <thomas@codesourcery.com>
      Signed-off-by: NMaciej W. Rozycki <macro@codesourcery.com>
      Signed-off-by: NAleksandar Markovic <aleksandar.markovic@imgtec.com>
      Reviewed-by: NLeon Alrae <leon.alrae@imgtec.com>
      Signed-off-by: NLeon Alrae <leon.alrae@imgtec.com>
      6be77480
    • A
      target-mips: Activate IEEE 754-2008 signaling NaN bit meaning for MSA · 40bd6dd4
      Aleksandar Markovic 提交于
      Function msa_reset() is updated so that flag snan_bit_is_one is
      properly set to 0.
      
      By applying this patch, a number of incorrect MSA behaviors that
      require IEEE 754-2008 compliance will be fixed. Those are behaviors
      that (up to the moment of applying this patch) did not get the desired
      functionality from SoftFloat library with respect to distinguishing
      between quiet and signaling NaN, getting default NaN values (both
      quiet and signaling), establishing if a floating point number is NaN
      or not, etc.
      
      Two examples:
      
      * FMAX, FMIN will now correctly detect and propagate NaNs.
      * FCLASS.D ans FCLASS.S will now correcty detect NaN flavors.
      Signed-off-by: NAleksandar Markovic <aleksandar.markovic@imgtec.com>
      Reviewed-by: NLeon Alrae <leon.alrae@imgtec.com>
      Signed-off-by: NLeon Alrae <leon.alrae@imgtec.com>
      40bd6dd4
    • A
      52d4c8ee
    • A
      softfloat: Handle snan_bit_is_one == 0 in MIPS pickNaNMulAdd() · c27644f0
      Aleksandar Markovic 提交于
      Only for Mips platform, and only for cases when snan_bit_is_one is 0,
      correct the order of argument comparisons in pickNaNMulAdd().
      
      For more info, see [1], page 53, section "3.5.3 NaN Propagation".
      
      [1] "MIPS Architecture for Programmers Volume IV-j:
          The MIPS32 SIMD Architecture Module",
          Imagination Technologies LTD, Revision 1.12, February 3, 2016
      Signed-off-by: NAleksandar Markovic <aleksandar.markovic@imgtec.com>
      Reviewed-by: NLeon Alrae <leon.alrae@imgtec.com>
      Reviewed-by: NPeter Maydell <peter.maydell@linaro.org>
      [leon.alrae@imgtec.com:
       * reworded the subject of the patch
       * swapped if/else code blocks to match the commit description]
      Signed-off-by: NLeon Alrae <leon.alrae@imgtec.com>
      c27644f0
    • A
      softfloat: For Mips only, correct default NaN values · a7c04d54
      Aleksandar Markovic 提交于
      Only for Mips platform, and only for cases when snan_bit_is_one is 0,
      correct default NaN values (in their 16-, 32-, and 64-bit flavors).
      
      For more info, see [1], page 84, Table 6.3 "Value Supplied When a New
      Quiet NaN Is Created", and [2], page 52, Table 3.7 "Default NaN
      Encodings".
      
      [1] "MIPS Architecture For Programmers Volume II-A:
          The MIPS64 Instruction Set Reference Manual",
          Imagination Technologies LTD, Revision 6.04, November 13, 2015
      
      [2] "MIPS Architecture for Programmers Volume IV-j:
          The MIPS32 SIMD Architecture Module",
          Imagination Technologies LTD, Revision 1.12, February 3, 2016
      Signed-off-by: NAleksandar Markovic <aleksandar.markovic@imgtec.com>
      Reviewed-by: NLeon Alrae <leon.alrae@imgtec.com>
      Reviewed-by: NPeter Maydell <peter.maydell@linaro.org>
      Signed-off-by: NLeon Alrae <leon.alrae@imgtec.com>
      a7c04d54
    • A
      softfloat: Clean code format in fpu/softfloat-specialize.h · a59eaea6
      Aleksandar Markovic 提交于
      fpu/softfloat-specialize.h is the most critical file in SoftFloat
      library, since it handles numerous differences between platforms in
      relation to floating point arithmetics. This patch makes the code
      in this file more consistent format-wise, and hopefully easier to
      debug and maintain.
      Signed-off-by: NAleksandar Markovic <aleksandar.markovic@imgtec.com>
      Reviewed-by: NPeter Maydell <peter.maydell@linaro.org>
      Signed-off-by: NLeon Alrae <leon.alrae@imgtec.com>
      a59eaea6
    • A
      softfloat: Implement run-time-configurable meaning of signaling NaN bit · af39bc8c
      Aleksandar Markovic 提交于
      This patch modifies SoftFloat library so that it can be configured in
      run-time in relation to the meaning of signaling NaN bit, while, at the
      same time, strictly preserving its behavior on all existing platforms.
      
      Background:
      
      In floating-point calculations, there is a need for denoting undefined or
      unrepresentable values. This is achieved by defining certain floating-point
      numerical values to be NaNs (which stands for "not a number"). For additional
      reasons, virtually all modern floating-point unit implementations use two
      kinds of NaNs: quiet and signaling. The binary representations of these two
      kinds of NaNs, as a rule, differ only in one bit (that bit is, traditionally,
      the first bit of mantissa).
      
      Up to 2008, standards for floating-point did not specify all details about
      binary representation of NaNs. More specifically, the meaning of the bit
      that is used for distinguishing between signaling and quiet NaNs was not
      strictly prescribed. (IEEE 754-2008 was the first floating-point standard
      that defined that meaning clearly, see [1], p. 35) As a result, different
      platforms took different approaches, and that presented considerable
      challenge for multi-platform emulators like QEMU.
      
      Mips platform represents the most complex case among QEMU-supported
      platforms regarding signaling NaN bit. Up to the Release 6 of Mips
      architecture, "1" in signaling NaN bit denoted signaling NaN, which is
      opposite to IEEE 754-2008 standard. From Release 6 on, Mips architecture
      adopted IEEE standard prescription, and "0" denotes signaling NaN. On top of
      that, Mips architecture for SIMD (also known as MSA, or vector instructions)
      also specifies signaling bit in accordance to IEEE standard. MSA unit can be
      implemented with both pre-Release 6 and Release 6 main processor units.
      
      QEMU uses SoftFloat library to implement various floating-point-related
      instructions on all platforms. The current QEMU implementation allows for
      defining meaning of signaling NaN bit during build time, and is implemented
      via preprocessor macro called SNAN_BIT_IS_ONE.
      
      On the other hand, the change in this patch enables SoftFloat library to be
      configured in run-time. This configuration is meant to occur during CPU
      initialization, at the moment when it is definitely known what desired
      behavior for particular CPU (or any additional FPUs) is.
      
      The change is implemented so that it is consistent with existing
      implementation of similar cases. This means that structure float_status is
      used for passing the information about desired signaling NaN bit on each
      invocation of SoftFloat functions. The additional field in float_status is
      called snan_bit_is_one, which supersedes macro SNAN_BIT_IS_ONE.
      
      IMPORTANT:
      
      This change is not meant to create any change in emulator behavior or
      functionality on any platform. It just provides the means for SoftFloat
      library to be used in a more flexible way - in other words, it will just
      prepare SoftFloat library for usage related to Mips platform and its
      specifics regarding signaling bit meaning, which is done in some of
      subsequent patches from this series.
      
      Further break down of changes:
      
        1) Added field snan_bit_is_one to the structure float_status, and
           correspondent setter function set_snan_bit_is_one().
      
        2) Constants <float16|float32|float64|floatx80|float128>_default_nan
           (used both internally and externally) converted to functions
           <float16|float32|float64|floatx80|float128>_default_nan(float_status*).
           This is necessary since they are dependent on signaling bit meaning.
           At the same time, for the sake of code cleanup and simplicity, constants
           <floatx80|float128>_default_nan_<low|high> (used only internally within
           SoftFloat library) are removed, as not needed.
      
        3) Added a float_status* argument to SoftFloat library functions
           XXX_is_quiet_nan(XXX a_), XXX_is_signaling_nan(XXX a_),
           XXX_maybe_silence_nan(XXX a_). This argument must be present in
           order to enable correct invocation of new version of functions
           XXX_default_nan(). (XXX is <float16|float32|float64|floatx80|float128>
           here)
      
        4) Updated code for all platforms to reflect changes in SoftFloat library.
           This change is twofolds: it includes modifications of SoftFloat library
           functions invocations, and an addition of invocation of function
           set_snan_bit_is_one() during CPU initialization, with arguments that
           are appropriate for each particular platform. It was established that
           all platforms zero their main CPU data structures, so snan_bit_is_one(0)
           in appropriate places is not added, as it is not needed.
      
      [1] "IEEE Standard for Floating-Point Arithmetic",
          IEEE Computer Society, August 29, 2008.
      Signed-off-by: NThomas Schwinge <thomas@codesourcery.com>
      Signed-off-by: NMaciej W. Rozycki <macro@codesourcery.com>
      Signed-off-by: NAleksandar Markovic <aleksandar.markovic@imgtec.com>
      Tested-by: NBastian Koppelmann <kbastian@mail.uni-paderborn.de>
      Reviewed-by: NLeon Alrae <leon.alrae@imgtec.com>
      Tested-by: NLeon Alrae <leon.alrae@imgtec.com>
      Reviewed-by: NPeter Maydell <peter.maydell@linaro.org>
      [leon.alrae@imgtec.com:
       * cherry-picked 2 chunks from patch #2 to fix compilation warnings]
      Signed-off-by: NLeon Alrae <leon.alrae@imgtec.com>
      af39bc8c
    • P
      Merge remote-tracking branch 'remotes/mst/tags/for_upstream' into staging · a01aef5d
      Peter Maydell 提交于
      pc, pci, virtio: new features, cleanups, fixes
      
      nvdimm label support
      cpu acpi hotplug rework
      virtio rework
      misc cleanups and fixes
      Signed-off-by: NMichael S. Tsirkin <mst@redhat.com>
      
      # gpg: Signature made Fri 24 Jun 2016 06:50:32 BST
      # gpg:                using RSA key 0x281F0DB8D28D5469
      # gpg: Good signature from "Michael S. Tsirkin <mst@kernel.org>"
      # gpg:                 aka "Michael S. Tsirkin <mst@redhat.com>"
      # Primary key fingerprint: 0270 606B 6F3C DF3D 0B17  0970 C350 3912 AFBE 8E67
      #      Subkey fingerprint: 5D09 FD08 71C8 F85B 94CA  8A0D 281F 0DB8 D28D 5469
      
      * remotes/mst/tags/for_upstream: (34 commits)
        virtio-bus: remove old set_host_notifier callback
        virtio-mmio: convert to ioeventfd callbacks
        virtio-pci: convert to ioeventfd callbacks
        virtio-ccw: convert to ioeventfd callbacks
        virtio-bus: have callers tolerate new host notifier api
        virtio-bus: common ioeventfd infrastructure
        pc: acpi: drop intermediate PCMachineState.node_cpu
        acpi-test-data: update expected
        pc: use new CPU hotplug interface since 2.7 machine type
        acpi: cpuhp: add cpu._OST handling
        acpi: cpuhp: implement hot-remove parts of CPU hotplug interface
        acpi: cpuhp: implement hot-add parts of CPU hotplug interface
        pc: acpi: introduce AcpiDeviceIfClass.madt_cpu hook
        acpi: cpuhp: add CPU devices AML with _STA method
        pc: piix4/ich9: add 'cpu-hotplug-legacy' property
        docs: update ACPI CPU hotplug spec with new protocol
        i386: pci-assign: Fix MSI-X table size
        docs: add NVDIMM ACPI documentation
        nvdimm acpi: support Set Namespace Label Data function
        nvdimm acpi: support Get Namespace Label Data function
        ...
      Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
      a01aef5d