introduce pci bridge library.
convert apb bridge and dec p2p bridge to use new pci bridge library.
save/restore is supported as a side effect.
This is also preparation for pci express root/upstream/downstream port.
Signed-off-by: NIsaku Yamahata <yamahata@valinux.co.jp>
Signed-off-by: NMichael S. Tsirkin <mst@redhat.com>

Remove pci_{register, unregister}_secondary_bus() by open code.
They are old stype API and aren't used any more by others. So eliminate it.
Signed-off-by: NIsaku Yamahata <yamahata@valinux.co.jp>
Signed-off-by: NMichael S. Tsirkin <mst@redhat.com>

To avoid confusion of primary bus with secondary bus,
rename PCIBridge::bus to PCIBridge::sec_bus.
Signed-off-by: NIsaku Yamahata <yamahata@valinux.co.jp>
Signed-off-by: NMichael S. Tsirkin <mst@redhat.com>

Move pci bridge related code into pci_bridge.c from pci.c
for further enhancement. pci.c is big enough now, so split it out.
No code change but exporting some accesser functions.

In fact, few pci bridge functions stays in pci.c.
Signed-off-by: NIsaku Yamahata <yamahata@valinux.co.jp>
Signed-off-by: NMichael S. Tsirkin <mst@redhat.com>

move out pci internal structures, PCIBus, PCIBridge and pci_bus_info into
private header file, pci_internals.h.
This is a preparation. Later pci bridge implementation will be
split out form pci.c into pci_bridge.c.
Signed-off-by: NIsaku Yamahata <yamahata@valinux.co.jp>
Signed-off-by: NMichael S. Tsirkin <mst@redhat.com>

We need to know ring layout to allocate log buffer.
So init rings first.

Also fixes a theoretical memory-leak-on-error.

https://bugzilla.redhat.com/show_bug.cgi?id=615228Signed-off-by: NMichael S. Tsirkin <mst@redhat.com>
Tested-by: NGerd Hoffmann <kraxel@redhat.com>

Add support for secrc field. Reportedly needed by old RHEL guests.
Signed-off-by: NMichael S. Tsirkin <mst@redhat.com>

We do range check for size, and get size as buffer,
but copy size + 4 bytes (4 is for FCS).
Let's copy size bytes but put size + 4 in length.
Signed-off-by: NMichael S. Tsirkin <mst@redhat.com>

Add support for the following missing priviledged intructions:

For SH4:
- stc sgr, Rn
- stc.l sgr, @-Rn

For SH4A:
- ldc Rm, sgr
- ldc.l @Rm+, sgr
Signed-off-by: NAlexandre Courbot <gnurou@gmail.com>
Signed-off-by: NAurelien Jarno <aurelien@aurel32.net>

The LDST macro is used to generate ldc and stc instructions that work with a
specific register. However, the SGR register only supports stc up to SH4A,
which supports both stc and ldc. This patch creates two sub-macros named LD
and ST that handle generating ldc and stc instructions separately, and
redeclares LDST to use these sub-macro.
Signed-off-by: NAlexandre Courbot <gnurou@gmail.com>
Signed-off-by: NAurelien Jarno <aurelien@aurel32.net>

bridge config write should trigger updates
on the secondary bus. never on the primary bus.
Signed-off-by: NMichael S. Tsirkin <mst@redhat.com>

We were requesting too much when checking buffer
length: size already includes host header length.

Further, we should not exit if we get a packet that
is too long, since this might not be under control
of the guest. Just drop the packet.

Red Hat bz 591494
Signed-off-by: NMichael S. Tsirkin <mst@redhat.com>

make pci hotplug callback return value to caller.
And when returning error, allocated resources are freed.
Signed-off-by: NIsaku Yamahata <yamahata@valinux.co.jp>
Signed-off-by: NMichael S. Tsirkin <mst@redhat.com>

Make init value for this register match the spec.
BAR address is 0 at init, so enabling it
only works by chance.
Signed-off-by: NMichael S. Tsirkin <mst@redhat.com>

Make rtl8139 spec compliant, fixing reset values
for command register.
Signed-off-by: NMichael S. Tsirkin <mst@redhat.com>

Signed-off-by: NIsaku Yamahata <yamahata@valinux.co.jp>
Acked-by: NGerd Hoffmann <kraxel@redhat.com>
Signed-off-by: NMichael S. Tsirkin <mst@redhat.com>

pcnet enables memory/io on init, which
does not make sense as BAR values are wrong.
Signed-off-by: NMichael S. Tsirkin <mst@redhat.com>
Tested-by: NJan Kiszka <jan.kiszka@siemens.com>

Clear interrupt disable bit on reset, according to PCI spec.
Fix pci_device_reset() with 64bit BAR.
Signed-off-by: NIsaku Yamahata <yamahata@valinux.co.jp>
Signed-off-by: NMichael S. Tsirkin <mst@redhat.com>

Intel Macs have a chip called the "AppleSMC" which they use to control
certain Apple specific parts of the hardware, like the keyboard background
light.

That chip is also used to store a key that Mac OS X uses to decrypt binaries.

This patch adds emulation for that chip, so we're getting one step further
to having Mac OS X run natively on Qemu.
Signed-off-by: NAlexander Graf <agraf@suse.de>
Signed-off-by: NBlue Swirl <blauwirbel@gmail.com>

rewuired -> required
ths      -> this
Signed-off-by: NStefan Weil <weil@mail.berlios.de>
Signed-off-by: NBlue Swirl <blauwirbel@gmail.com>

So interpret it by hand.
Signed-off-by: NHidetoshi Seto <seto.hidetoshi@jp.fujitsu.com>
Signed-off-by: NBlue Swirl <blauwirbel@gmail.com>

There were fsdev/qemu-fsdev.{o,d} not removed at "make clean".
Signed-off-by: NHidetoshi Seto <seto.hidetoshi@jp.fujitsu.com>
Signed-off-by: NBlue Swirl <blauwirbel@gmail.com>

Set PCI multi-function bit according to multifunction property.
PCI address, devfn ,is exported to users as addr property,
so users can populate pci function(PCIDevice in qemu)
at arbitrary devfn.
It means each function(PCIDevice) don't know whether pci device
(PCIDevice[8]) is multi function or not.
So this patch allows user to set multifunction bit via property
and checks whether multifunction bit is set correctly.

Cc:  Juan Quintela <quintela@redhat.com>
Signed-off-by: NIsaku Yamahata <yamahata@valinux.co.jp>
Signed-off-by: NBlue Swirl <blauwirbel@gmail.com>

make pci bridge aware of pci multi function property and let pci generic
code to set the bit.

Cc: Blue Swirl <blauwirbel@gmail.com>
Signed-off-by: NIsaku Yamahata <yamahata@valinux.co.jp>
Signed-off-by: NBlue Swirl <blauwirbel@gmail.com>

use pci_create_simple_multifunction() for normal device which sets
multifunction bit.
At the moment, only pc_piix.c and mips_malta.c uses multifunction
devices with piix3/4 pci-isa bridge.
And other boards don't populate those devices.
Signed-off-by: NIsaku Yamahata <yamahata@valinux.co.jp>
Signed-off-by: NBlue Swirl <blauwirbel@gmail.com>

introduce multifunction property.
Also introduce new convenient device creation function which
will be used later.

For bisectability this patch doesn't do anything, but sets the property
resulting in no functional changes.
Actual changes will be introduced by later patch.
Signed-off-by: NIsaku Yamahata <yamahata@valinux.co.jp>
Signed-off-by: NBlue Swirl <blauwirbel@gmail.com>

implement qdev_prop_set_bit().
Signed-off-by: NIsaku Yamahata <yamahata@valinux.co.jp>
Signed-off-by: NBlue Swirl <blauwirbel@gmail.com>

replace PCIDeviceInfo::header_type with is_bridge
as suggested by Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: NIsaku Yamahata <yamahata@valinux.co.jp>
Signed-off-by: NBlue Swirl <blauwirbel@gmail.com>

Don't overwrite pci header type.
Otherwise, multi function bit which pci_init_header_type() sets
appropriately is lost.
Anyway PCI_HEADER_TYPE_NORMAL is zero, so it is unnecessary to zero
which is already zero cleared.

how to test:
run qemu and issue info pci to see whether a device in question is
normal device, not pci-to-pci bridge.
This is handy because guest os isn't required.

tested changes:
The following files are covered by using following commands.
sparc64-softmmu
  apb_pci.c, vga-pci.c, cmd646.c, ne2k_pci.c, sun4u.c
ppc-softmmu
  grackle_pci.c, cmd646.c, ne2k_pci.c, vga-pci.c, macio.c
ppc-softmmu -M mac99
  unin_pci.c(uni-north, uni-north-agp)
ppc64-softmmu
  pci-ohci, ne2k_pci, vga-pci, unin_pci.c(u3-agp)
x86_64-softmmu
  acpi_piix4.c, ide/piix.c, piix_pci.c
  -vga vmware vmware_vga.c
  -watchdog i6300esb wdt_i6300esb.c
  -usb usb-uhci.c
  -sound ac97 ac97.c
  -nic model=rtl8139 rtl8139.c
  -nic model=pcnet pcnet.c
  -balloon virtio virtio-pci.c:

untested changes:
The following changes aren't tested.
prep_pci.c: ppc-softmmu -M prep should cover, but core dumped.
unin_pci.c(uni-north-pci): the caller is commented out.
openpic.c: the caller is commented out in ppc_prep.c
Signed-off-by: NIsaku Yamahata <yamahata@valinux.co.jp>
Signed-off-by: NBlue Swirl <blauwirbel@gmail.com>

Auto-assigned-address pci function (passing devfn = -1) is always
single function.
This patch adds assert() to guarantee that auto-assigned-address function
is always single function device at function = 0.
Signed-off-by: NIsaku Yamahata <yamahata@valinux.co.jp>
Signed-off-by: NBlue Swirl <blauwirbel@gmail.com>

Use PCI_DEVFN() and PCI_FUNC_MAX where appropriate.
This patch make it clear that func = 0.

test:
The following object files with/without this patch are stripped and compared.
They remains same.
  arm-softmmu/versatile_pci.o
  libhw32/ppce500_pci.o
  libhw32/unin_pci.o
  libhw64/ppce500_pci.o
  libhw64/unin_pci.o
  mips-softmmu/gt64xxx.o
  mips64-softmmu/gt64xxx.o
  mips64el-softmmu/gt64xxx.o
  mipsel-softmmu/gt64xxx.o

Cc: Aurelien Jarno <aurelien@aurel32.net>
Cc: Yu Liu <yu.liu@freescale.com>
Cc: Paul Brook <paul@codesourcery.com>
Signed-off-by: NIsaku Yamahata <yamahata@valinux.co.jp>
Signed-off-by: NBlue Swirl <blauwirbel@gmail.com>

This patch adds support for loongson 2E & 2F instructions. They are the
same instructions, but differ by the opcode encoding.
Signed-off-by: NAurelien Jarno <aurelien@aurel32.net>

With gcc 4.2.1-sjlj (mingw32-2) I get this warning:
/src/qemu/exec.c: In function 'qemu_ram_alloc':
/src/qemu/exec.c:2777: warning: 'offset' may be used uninitialized in this function

Fix by initializing the variable.
Signed-off-by: NBlue Swirl <blauwirbel@gmail.com>

WIN32 is not only the system which doesn't have TCP_CORK (e.g. OS X).
Signed-off-by: NMORITA Kazutaka <morita.kazutaka@lab.ntt.co.jp>
Signed-off-by: NBlue Swirl <blauwirbel@gmail.com>

Now that we have a working qemu_ram_free() and the primary runtime
user of it has been updated, don't be lenient about duplicate id strings.
We also shouldn't need to create them ondemand at the target.
Signed-off-by: NAlex Williamson <alex.williamson@redhat.com>
Signed-off-by: NAnthony Liguori <aliguori@us.ibm.com>

Signed-off-by: NAlex Williamson <alex.williamson@redhat.com>
Signed-off-by: NAnthony Liguori <aliguori@us.ibm.com>

Now that we can support a ram_addr_t space with holes, we can implement
qemu_ram_free().
Signed-off-by: NAlex Williamson <alex.williamson@redhat.com>
Signed-off-by: NAnthony Liguori <aliguori@us.ibm.com>

Allows us to compress the protocol a bit by setting a flag on the
offset which indicates we're still working within the same block
as last time.  That way we can avoid sending the block name for
every page.  Suggested by Anthony Liguori.
Signed-off-by: NAlex Williamson <alex.williamson@redhat.com>
Signed-off-by: NAnthony Liguori <aliguori@us.ibm.com>