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  1. 30 5月, 2019 2 次提交
    • P
      Merge remote-tracking branch 'remotes/jnsnow/tags/bitmaps-pull-request' into staging · 62f6849e
      由 Peter Maydell 提交于 
      Pull request

# gpg: Signature made Wed 29 May 2019 00:58:33 BST
# gpg:                using RSA key F9B7ABDBBCACDF95BE76CBD07DEF8106AAFC390E
# gpg: Good signature from "John Snow (John Huston) <jsnow@redhat.com>" [full]
# Primary key fingerprint: FAEB 9711 A12C F475 812F  18F2 88A9 064D 1835 61EB
#      Subkey fingerprint: F9B7 ABDB BCAC DF95 BE76  CBD0 7DEF 8106 AAFC 390E

* remotes/jnsnow/tags/bitmaps-pull-request:
  iotests: test external snapshot with bitmap copying
  qapi: support external bitmaps in block-dirty-bitmap-merge
  migration/dirty-bitmaps: change bitmap enumeration method
Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
      62f6849e
    • P
      Merge remote-tracking branch 'remotes/maxreitz/tags/pull-block-2019-05-28' into staging · e5714b5b
      由 Peter Maydell 提交于 
      Block patches:
- qcow2: Use threads for encrypted I/O
- qemu-img rebase: Optimizations
- backup job: Allow any source node, and some refactoring
- Some general simplifications in the block layer

# gpg: Signature made Tue 28 May 2019 20:26:56 BST
# gpg:                using RSA key 91BEB60A30DB3E8857D11829F407DB0061D5CF40
# gpg:                issuer "mreitz@redhat.com"
# gpg: Good signature from "Max Reitz <mreitz@redhat.com>" [full]
# Primary key fingerprint: 91BE B60A 30DB 3E88 57D1  1829 F407 DB00 61D5 CF40

* remotes/maxreitz/tags/pull-block-2019-05-28: (21 commits)
  blockdev: loosen restrictions on drive-backup source node
  qcow2-bitmap: initialize bitmap directory alignment
  qcow2: skip writing zero buffers to empty COW areas
  qemu-img: rebase: Reuse in-chain BlockDriverState
  qemu-img: rebase: Reduce reads on in-chain rebase
  qemu-img: rebase: Reuse parent BlockDriverState
  block: Make bdrv_root_attach_child() unref child_bs on failure
  block: Use bdrv_unref_child() for all children in bdrv_close()
  block/backup: refactor: split out backup_calculate_cluster_size
  block/backup: unify different modes code path
  block/backup: refactor and tolerate unallocated cluster skipping
  block/backup: move to copy_bitmap with granularity
  block/backup: simplify backup_incremental_init_copy_bitmap
  qcow2: do encryption in threads
  qcow2: bdrv_co_pwritev: move encryption code out of the lock
  qcow2: qcow2_co_preadv: improve locking
  qcow2-threads: split out generic path
  qcow2-threads: qcow2_co_do_compress: protect queuing by mutex
  qcow2-threads: use thread_pool_submit_co
  qcow2: add separate file for threaded data processing functions
  ...
Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
      e5714b5b
  3. 29 5月, 2019 25 次提交
  5. 28 5月, 2019 13 次提交
    • P
      Merge remote-tracking branch 'remotes/amarkovic/tags/mips-queue-may-19-2019-v3' into staging · 4a1d38c4
      由 Peter Maydell 提交于 
      MIPS queue for May 19th, 2019 - v3

# gpg: Signature made Sun 26 May 2019 17:07:07 BST
# gpg:                using RSA key D4972A8967F75A65
# gpg: Good signature from "Aleksandar Markovic <amarkovic@wavecomp.com>" [unknown]
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg:          There is no indication that the signature belongs to the owner.
# Primary key fingerprint: 8526 FBF1 5DA3 811F 4A01  DD75 D497 2A89 67F7 5A65

* remotes/amarkovic/tags/mips-queue-may-19-2019-v3:
  BootLinuxSshTest: Test some userspace commands on Malta
  target/mips: realign comments to fix checkpatch warnings
  target/mips: add or remove space to fix checkpatch errors
  linux-user: fix __NR_semtimedop undeclared error
  mips: Decide to map PAGE_EXEC in map_address
  target/mips: Refactor and fix INSERT.<B|H|W|D> instructions
  target/mips: Refactor and fix COPY_U.<B|H|W> instructions
  target/mips: Refactor and fix COPY_S.<B|H|W|D> instructions
  target/mips: Fix MSA instructions ST.<B|H|W|D> on big endian host
  target/mips: Fix MSA instructions LD.<B|H|W|D> on big endian host
  target/mips: Make the results of MOD_<U|S>.<B|H|W|D> the same as on hardware
  target/mips: Make the results of DIV_<U|S>.<B|H|W|D> the same as on hardware
Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
      4a1d38c4
    • P
      Merge remote-tracking branch 'remotes/palmer/tags/riscv-for-master-4.1-sf0' into staging · 4bade282
      由 Peter Maydell 提交于 
      RISC-V Patches for the 4.1 Soft Freeze, Part 1

This tag contains a handful of patches that I'd like to target for 4.1:

* An emulation for SiFive's GPIO device.
* A fix to disallow sfence.vma from userspace.
* Additional decodetree cleanups that should have no functional impact.
* C extension emulation fidelity fixes that were noticed as part of that
  cleanup process.
* A new "spike" target, along with the deprecation of a handful of old
  targets and CPUs.
* Some initial infastructure related to the hypervisor extension.
* An emulation fidelity fix that prevents prevents arbitrary bits in the
  SIP CSR from being set.
* A small performance improvement that avoids excessive TLB flushing
  when the ASID does not change.

This time I've used a new testing workflow: I've tested on both 32-bit
and 64-bit builds of OpenEmbedded, via the default OpenSBI-based boot
flow.

# gpg: Signature made Sat 25 May 2019 01:05:57 BST
# gpg:                using RSA key 00CE76D1834960DFCE886DF8EF4CA1502CCBAB41
# gpg:                issuer "palmer@dabbelt.com"
# gpg: Good signature from "Palmer Dabbelt <palmer@dabbelt.com>" [unknown]
# gpg:                 aka "Palmer Dabbelt <palmer@sifive.com>" [unknown]
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg:          There is no indication that the signature belongs to the owner.
# Primary key fingerprint: 00CE 76D1 8349 60DF CE88  6DF8 EF4C A150 2CCB AB41

* remotes/palmer/tags/riscv-for-master-4.1-sf0: (29 commits)
  target/riscv: Only flush TLB if SATP.ASID changes
  target/riscv: More accurate handling of `sip` CSR
  target/riscv: Add checks for several RVC reserved operands
  target/riscv: Add the HGATP register masks
  target/riscv: Add the HSTATUS register masks
  target/riscv: Add Hypervisor CSR macros
  target/riscv: Allow setting mstatus virtulisation bits
  target/riscv: Add the MPV and MTL mstatus bits
  target/riscv: Improve the scause logic
  target/riscv: Trigger interrupt on MIP update asynchronously
  target/riscv: Mark privilege level 2 as reserved
  riscv: spike: Add a generic spike machine
  target/riscv: Deprecate the generic no MMU CPUs
  target/riscv: Add a base 32 and 64 bit CPU
  target/riscv: Create settable CPU properties
  riscv: virt: Allow specifying a CPU via commandline
  linux-user/riscv: Add the CPU type as a comment
  target/riscv: Remove unused include of riscv_htif.h for virt board riscv
  target/riscv: Remove spaces from register names
  target/riscv: Split gen_arith_imm into functional and temp
  ...
Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
      4bade282
    • P
      Merge remote-tracking branch 'remotes/ehabkost/tags/machine-next-pull-request' into staging · 2b01c1b3
      由 Peter Maydell 提交于 
      Machine Core queue, 2019-05-24

* Display more helpful message when an object type is missing
  (Philippe Mathieu-Daudé)
* Use object_initialize_child for correct reference counting
  (Philippe Mathieu-Daudé)

# gpg: Signature made Fri 24 May 2019 19:31:06 BST
# gpg:                using RSA key 2807936F984DC5A6
# gpg: Good signature from "Eduardo Habkost <ehabkost@redhat.com>" [full]
# Primary key fingerprint: 5A32 2FD5 ABC4 D3DB ACCF  D1AA 2807 936F 984D C5A6

* remotes/ehabkost/tags/machine-next-pull-request:
  hw/intc/nvic: Use object_initialize_child for correct reference counting
  hw/arm/mps2: Use object_initialize_child for correct reference counting
  hw/microblaze/zynqmp: Use object_initialize_child for correct ref. counting
  hw/microblaze/zynqmp: Use object_initialize_child for correct ref. counting
  hw/microblaze/zynqmp: Let the SoC manage the IPI devices
  hw/microblaze/zynqmp: Move the IPI state into the PMUSoC state
  hw/mips: Use object_initialize_child for correct reference counting
  hw/mips: Use object_initialize() on MIPSCPSState
  hw/arm: Use object_initialize_child for correct reference counting
  hw/arm/aspeed: Use object_initialize_child for correct ref. counting
  hw/arm/bcm2835: Use object_initialize_child for correct ref. counting
  hw/arm/bcm2835: Use object_initialize() on PL011State
  hw/arm/bcm2835: Use TYPE_PL011 instead of hardcoded string
  hw/virtio: Use object_initialize_child for correct reference counting
  hw/misc/macio: Use object_initialize_child for correct ref. counting
  hw/ppc/pnv: Use object_initialize_child for correct reference counting
  qom/object: Display more helpful message when an object type is missing
Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
      2b01c1b3
    • A
      tests/qemu-iotests: re-format output to for make check-block · 70ff5b07
      由 Alex Bennée 提交于 
      This attempts to clean-up the output to better match the output of the
rest of the QEMU check system when called with -makecheck. This includes:

  - formatting as "  TEST    iotest-FMT: nnn"
  - only dumping config on failure (when -makecheck enabled)

The non-make check output has been cleaned up as well:

  - line re-displayed (\r) at the end
  - fancy colours for pass/fail/skip
  - timestamps always printed (option removed)
Signed-off-by: NAlex Bennée <alex.bennee@linaro.org>
Message-Id: <20190503143904.31211-1-alex.bennee@linaro.org>
Tested-by: NThomas Huth <thuth@redhat.com>
      70ff5b07
    • T
      tests/qemu-iotests/group: Re-use the "auto" group for tests that can always run · d4271ce5
      由 Thomas Huth 提交于 
      Currently, all tests are in the "auto" group. This is a little bit pointless.
OTOH, we need a group for the tests that we can automatically run during
"make check" each time, too. Tests in this new group are supposed to run
with every possible QEMU configuration, for example they must run with every
QEMU binary (also non-x86), without failing when an optional features is
missing (but reporting "skip" is ok), and be able to run on all kind of host
filesystems and users (i.e. also as "nobody" or "root").
So let's use the "auto" group for this class of tests now. The initial
list has been determined by running the iotests with non-x86 QEMU targets
and with our CI pipelines on Gitlab, Cirrus-CI and Travis (i.e. including
macOS and FreeBSD).
Signed-off-by: NThomas Huth <thuth@redhat.com>
Message-Id: <20190502084506.8009-7-thuth@redhat.com>
Signed-off-by: NAlex Bennée <alex.bennee@linaro.org>
      d4271ce5
    • A
      Makefile.target: support per-target coverage reports · 90e671a9
      由 Alex Bennée 提交于 
      Add support for generating a single targets coverage report. Execute:

  make coverage-report

In the target build directory. This coverage report only cares about
target specific blobs so only searches the target build subdirectory.
Signed-off-by: NAlex Bennée <alex.bennee@linaro.org>
Reviewed-by: NRichard Henderson <richard.henderson@linaro.org>
      90e671a9
    • A
      Makefile: include per-target build directories in coverage report · 5eda6e42
      由 Alex Bennée 提交于 
      Signed-off-by: NAlex Bennée <alex.bennee@linaro.org>
Reviewed-by: NRichard Henderson <richard.henderson@linaro.org>
      5eda6e42
    • A
      Makefile: fix coverage-report reference to BUILD_DIR · 30b3718b
      由 Alex Bennée 提交于 
      Commit 337f2311 actually claimed to do this in the commit log but
didn't actually. Oops.
Signed-off-by: NAlex Bennée <alex.bennee@linaro.org>
Reviewed-by: NRichard Henderson <richard.henderson@linaro.org>
      30b3718b
    • A
      .travis.yml: enable aarch64-softmmu and alpha-softmmu tcg tests · 591ff1ff
      由 Alex Bennée 提交于 
      Signed-off-by: NAlex Bennée <alex.bennee@linaro.org>
Reviewed-by: NRichard Henderson <richard.henderson@linaro.org>
      591ff1ff
    • R
      tests/tcg/alpha: add system boot.S · 8d8a8ab5
      由 Richard Henderson 提交于 
      This provides the bootstrap and low level helper functions for an
alpha kernel.  We use direct access to the DP264 serial port for
test output, and hard machine halt to exit the emulation.
Signed-off-by: NRichard Henderson <richard.henderson@linaro.org>
Message-Id: <20190501184306.15208-1-richard.henderson@linaro.org>
Signed-off-by: NAlex Bennée <alex.bennee@linaro.org>
      8d8a8ab5
    • A
      tests/tcg/multiarch: expand system memory test to cover more · 7ac283e9
      由 Alex Bennée 提交于 
      Expand the memory test to cover move of the softmmu code. Specifically
we:

  - improve commentary
  - add some helpers (for later BE support)
  - reduce boiler plate into helpers
  - add signed reads at various sizes/offsets
  - required -DCHECK_UNALIGNED
Signed-off-by: NAlex Bennée <alex.bennee@linaro.org>
Reviewed-by: NRichard Henderson <richard.henderson@linaro.org>
      7ac283e9
    • A
      tests/tcg/minilib: support %c format char · 936647d3
      由 Alex Bennée 提交于 
      Signed-off-by: NAlex Bennée <alex.bennee@linaro.org>
Reviewed-by: NRichard Henderson <richard.henderson@linaro.org>
      936647d3
    • A
      tests/tcg/multiarch: move the system memory test · 67f3da9d
      由 Alex Bennée 提交于 
      There is nothing inherently architecture specific about the memory
test although we may have to manage different restrictions of
unaligned access across architectures.
Signed-off-by: NAlex Bennée <alex.bennee@linaro.org>
Reviewed-by: NRichard Henderson <richard.henderson@linaro.org>
      67f3da9d