1. 02 2月, 2013 1 次提交
  2. 19 12月, 2012 1 次提交
  3. 04 12月, 2012 1 次提交
  4. 23 10月, 2012 1 次提交
    • A
      Rename target_phys_addr_t to hwaddr · a8170e5e
      Avi Kivity 提交于
      target_phys_addr_t is unwieldly, violates the C standard (_t suffixes are
      reserved) and its purpose doesn't match the name (most target_phys_addr_t
      addresses are not target specific).  Replace it with a finger-friendly,
      standards conformant hwaddr.
      
      Outstanding patchsets can be fixed up with the command
      
        git rebase -i --exec 'find -name "*.[ch]"
                              | xargs s/target_phys_addr_t/hwaddr/g' origin
      Signed-off-by: NAvi Kivity <avi@redhat.com>
      Signed-off-by: NAnthony Liguori <aliguori@us.ibm.com>
      a8170e5e
  5. 07 10月, 2012 1 次提交
  6. 18 6月, 2012 1 次提交
  7. 15 6月, 2012 1 次提交
  8. 29 4月, 2012 1 次提交
  9. 04 2月, 2012 1 次提交
    • A
      qdev: register all types natively through QEMU Object Model · 39bffca2
      Anthony Liguori 提交于
      This was done in a mostly automated fashion.  I did it in three steps and then
      rebased it into a single step which avoids repeatedly touching every file in
      the tree.
      
      The first step was a sed-based addition of the parent type to the subclass
      registration functions.
      
      The second step was another sed-based removal of subclass registration functions
      while also adding virtual functions from the base class into a class_init
      function as appropriate.
      
      Finally, a python script was used to convert the DeviceInfo structures and
      qdev_register_subclass functions to TypeInfo structures, class_init functions,
      and type_register_static calls.
      
      We are almost fully converted to QOM after this commit.
      Signed-off-by: NAnthony Liguori <aliguori@us.ibm.com>
      39bffca2
  10. 28 1月, 2012 1 次提交
  11. 21 12月, 2011 2 次提交
  12. 16 10月, 2011 1 次提交
  13. 11 10月, 2011 2 次提交
  14. 10 10月, 2011 1 次提交
  15. 25 9月, 2011 2 次提交
  16. 22 8月, 2011 1 次提交
  17. 08 8月, 2011 1 次提交
  18. 21 2月, 2011 1 次提交
  19. 12 2月, 2011 1 次提交
  20. 12 12月, 2010 1 次提交
  21. 11 12月, 2010 1 次提交
  22. 22 5月, 2010 1 次提交
  23. 22 3月, 2010 1 次提交
  24. 02 10月, 2009 2 次提交
  25. 10 9月, 2009 3 次提交
  26. 28 8月, 2009 4 次提交
  27. 11 8月, 2009 1 次提交
  28. 10 7月, 2009 1 次提交
  29. 01 11月, 2008 1 次提交
    • A
      Make DMA bottom-half driven (v2) · 492c30af
      aliguori 提交于
      The current DMA routines are driven by a call in main_loop_wait() after every
      select.
      
      This patch converts the DMA code to be driven by a constantly rescheduled
      bottom half.  The advantage of using a scheduled bottom half is that we can
      stop scheduling the bottom half when there no DMA channels are runnable.  This
      means we can potentially detect this case and sleep longer in the main loop.
      
      The only two architectures implementing DMA_run() are cris and i386.  For cris,
      I converted it to a simple repeating bottom half.  I've only compile tested
      this as cris does not seem to work on a 64-bit host.  It should be functionally
      identical to the previous implementation so I expect it to work.
      
      For x86, I've made sure to only fire the DMA bottom half if there is a DMA
      channel that is runnable.  The effect of this is that unless you're using sb16
      or a floppy disk, the DMA bottom half never fires.
      
      You probably should test this malc.  My own benchmarks actually show slight
      improvement by it's possible the change in timing could affect your demos.
      
      Since v1, I've changed the code to use a BH instead of a timer.  cris at least
      seems to depend on faster than 10ms polling.
      Signed-off-by: NAnthony Liguori <aliguori@us.ibm.com>
      
      
      
      git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5573 c046a42c-6fe2-441c-8c8c-71466251a162
      492c30af
  30. 30 8月, 2008 1 次提交
  31. 18 11月, 2007 1 次提交