1. 02 12月, 2009 2 次提交
    • M
      msix: clear pending bit of an unused vector · 98304c84
      Michael S. Tsirkin 提交于
      PCI spec states:
      if a masked vector has its Pending bit set, and the associated
      underlying interrupt events are somehow satisfied (usually by software
      though the exact manner is function-specific), the function must clear
      the Pending bit, to avoid sending a spurious interrupt message later
      when software unmasks the vector.
      
      In our case this happens if vector becomes unused.
      Clear pending bit in this case.
      Signed-off-by: NMichael S. Tsirkin <mst@redhat.com>
      98304c84
    • M
      msix: fix reset value for enable bit · 1f944c66
      Michael S. Tsirkin 提交于
      On reset, we currently clear all bits in msix control register *except*
      enable bit.  This is wrong: the spec says we should clear writeable
      bits: function mask and enable bit.
      Correct this.
      Signed-off-by: NMichael S. Tsirkin <mst@redhat.com>
      1f944c66
  2. 01 12月, 2009 24 次提交
  3. 28 11月, 2009 1 次提交
  4. 23 11月, 2009 4 次提交
  5. 20 11月, 2009 1 次提交
  6. 19 11月, 2009 1 次提交
  7. 18 11月, 2009 4 次提交
  8. 17 11月, 2009 3 次提交