提交 1f944c66 编写于 作者: M Michael S. Tsirkin

msix: fix reset value for enable bit

On reset, we currently clear all bits in msix control register *except*
enable bit.  This is wrong: the spec says we should clear writeable
bits: function mask and enable bit.
Correct this.
Signed-off-by: NMichael S. Tsirkin <mst@redhat.com>
上级 ae1be0bb
......@@ -361,7 +361,8 @@ void msix_reset(PCIDevice *dev)
if (!(dev->cap_present & QEMU_PCI_CAP_MSIX))
return;
msix_free_irq_entries(dev);
dev->config[dev->msix_cap + MSIX_ENABLE_OFFSET] &= MSIX_ENABLE_MASK;
dev->config[dev->msix_cap + MSIX_ENABLE_OFFSET] &=
~dev->wmask[dev->msix_cap + MSIX_ENABLE_OFFSET];
memset(dev->msix_table_page, 0, MSIX_PAGE_SIZE);
msix_mask_all(dev, dev->msix_entries_nr);
}
......
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