1. 30 1月, 2014 1 次提交
  2. 13 1月, 2014 13 次提交
  3. 31 12月, 2013 1 次提交
  4. 20 12月, 2013 1 次提交
    • A
      roms: Flush icache when writing roms to guest memory · 582b55a9
      Alexander Graf 提交于
      We use the rom infrastructure to write firmware and/or initial kernel
      blobs into guest address space. So we're basically emulating the cache
      off phase on very early system bootup.
      
      That phase is usually responsible for clearing the instruction cache for
      anything it writes into cachable memory, to ensure that after reboot we
      don't happen to execute stale bits from the instruction cache.
      
      So we need to invalidate the icache every time we write a rom into guest
      address space. We do not need to do this for every DMA since the guest
      expects it has to flush the icache manually in that case.
      
      This fixes random reboot issues on e5500 (booke ppc) for me.
      Signed-off-by: NAlexander Graf <agraf@suse.de>
      582b55a9
  5. 13 12月, 2013 1 次提交
    • A
      roms: Flush icache when writing roms to guest memory · a94b36dd
      Alexander Graf 提交于
      We use the rom infrastructure to write firmware and/or initial kernel
      blobs into guest address space. So we're basically emulating the cache
      off phase on very early system bootup.
      
      That phase is usually responsible for clearing the instruction cache for
      anything it writes into cachable memory, to ensure that after reboot we
      don't happen to execute stale bits from the instruction cache.
      
      So we need to invalidate the icache every time we write a rom into guest
      address space. We do not need to do this for every DMA since the guest
      expects it has to flush the icache manually in that case.
      
      This fixes random reboot issues on e5500 (booke ppc) for me.
      Signed-off-by: NAlexander Graf <agraf@suse.de>
      Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com>
      a94b36dd
  6. 12 12月, 2013 1 次提交
  7. 10 12月, 2013 7 次提交
    • M
      exec: reduce L2_PAGE_SIZE · 026736ce
      Michael S. Tsirkin 提交于
      With the single exception of ppc with 16M pages,
      we get the same number of levels
      with L2_PAGE_SIZE = 10 as with L2_PAGE_SIZE = 9.
      
      by doing this we reduce memory footprint of a single level
      in the node memory map by 2x without runtime overhead.
      Signed-off-by: NMichael S. Tsirkin <mst@redhat.com>
      026736ce
    • P
      exec: make address spaces 64-bit wide · 57271d63
      Paolo Bonzini 提交于
      As an alternative to commit 818f86b8 (exec: limit system memory
      size, 2013-11-04) let's just make all address spaces 64-bit wide.
      This eliminates problems with phys_page_find ignoring bits above
      TARGET_PHYS_ADDR_SPACE_BITS and address_space_translate_internal
      consequently messing up the computations.
      
      In Luiz's reported crash, at startup gdb attempts to read from address
      0xffffffffffffffe6 to 0xffffffffffffffff inclusive.  The region it gets
      is the newly introduced master abort region, which is as big as the PCI
      address space (see pci_bus_init).  Due to a typo that's only 2^63-1,
      not 2^64.  But we get it anyway because phys_page_find ignores the upper
      bits of the physical address.  In address_space_translate_internal then
      
          diff = int128_sub(section->mr->size, int128_make64(addr));
          *plen = int128_get64(int128_min(diff, int128_make64(*plen)));
      
      diff becomes negative, and int128_get64 booms.
      
      The size of the PCI address space region should be fixed anyway.
      Reported-by: NLuiz Capitulino <lcapitulino@redhat.com>
      Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com>
      Signed-off-by: NMichael S. Tsirkin <mst@redhat.com>
      57271d63
    • M
      exec: memory radix tree page level compression · b35ba30f
      Michael S. Tsirkin 提交于
      At the moment, memory radix tree is already variable width, but it can
      only skip the low bits of address.
      
      This is efficient if we have huge memory regions but inefficient if we
      are only using a tiny portion of the address space.
      
      After we have built up the map, detect
      configurations where a single L2 entry is valid.
      
      We then speed up the lookup by skipping one or more levels.
      In case any levels were skipped, we might end up in a valid section
      instead of erroring out. We handle this by checking that
      the address is in range of the resulting section.
      Signed-off-by: NMichael S. Tsirkin <mst@redhat.com>
      b35ba30f
    • M
      exec: pass hw address to phys_page_find · 97115a8d
      Michael S. Tsirkin 提交于
      callers always shift by target page bits so let's just do this
      internally.
      Signed-off-by: NMichael S. Tsirkin <mst@redhat.com>
      97115a8d
    • M
      exec: extend skip field to 6 bit, page entry to 32 bit · 8b795765
      Michael S. Tsirkin 提交于
      Extend skip to 6 bit. As page entry doesn't fit in 16 bit
      any longer anyway, extend it to 32 bit.
      This doubles node map memory requirements, but follow-up
      patches will save this memory.
      Signed-off-by: NMichael S. Tsirkin <mst@redhat.com>
      8b795765
    • M
      exec: replace leaf with skip · 9736e55b
      Michael S. Tsirkin 提交于
      In preparation for dynamic radix tree depth support, rename is_leaf
      field to skip, telling us how many bits to skip to next level.
      Set to 0 for leaf.
      Signed-off-by: NMichael S. Tsirkin <mst@redhat.com>
      9736e55b
    • P
      split definitions for exec.c and translate-all.c radix trees · 03f49957
      Paolo Bonzini 提交于
      The exec.c and translate-all.c radix trees are quite different, and
      the exec.c one in particular is not limited to the CPU---it can be
      used also by devices that do DMA, and in that case the address space
      is not limited to TARGET_PHYS_ADDR_SPACE_BITS bits.
      
      We want to make exec.c's radix trees 64-bit wide.  As a first step,
      stop sharing the constants between exec.c and translate-all.c.
      exec.c gets P_L2_* constants, translate-all.c gets V_L2_*, for
      consistency with the existing V_L1_* symbols.  Though actually
      in the softmmu case translate-all.c is also indexed by physical
      addresses...
      
      This patch has no semantic change.
      Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com>
      Signed-off-by: NMichael S. Tsirkin <mst@redhat.com>
      03f49957
  8. 25 11月, 2013 1 次提交
  9. 10 11月, 2013 1 次提交
  10. 08 11月, 2013 1 次提交
  11. 04 11月, 2013 1 次提交
  12. 29 10月, 2013 1 次提交
    • K
      exec: Fix bounce buffer allocation in address_space_map() · e85d9db5
      Kevin Wolf 提交于
      This fixes a regression introduced by commit e3127ae0, which kept the
      allocation size of the bounce buffer limited to one page in order to
      avoid unbounded allocations (as explained in the commit message of
      6d16c2f8), but broke the reporting of the shortened bounce buffer to
      the caller. The caller therefore assumes that the full requested size
      was provided and causes memory corruption when writing beyond the end of
      the actually allocated buffer.
      Signed-off-by: NKevin Wolf <kwolf@redhat.com>
      e85d9db5
  13. 17 10月, 2013 1 次提交
  14. 14 10月, 2013 1 次提交
    • S
      exec: Fix prototype of phys_mem_set_alloc and related functions · 575ddeb4
      Stefan Weil 提交于
      phys_mem_alloc and its assigned values qemu_anon_ram_alloc and
      legacy_s390_alloc must have identical argument lists.
      
      legacy_s390_alloc uses the size parameter to call mmap, so size_t is
      good enough for all of them.
      
      This patch fixes compiler errors on i686 Linux hosts:
      
        CC    alpha-softmmu/exec.o
      exec.c:752:51: error:
       initialization from incompatible pointer type [-Werror]
      exec.c: In function 'qemu_ram_alloc_from_ptr':
      exec.c:1139:32: error:
       comparison of distinct pointer types lacks a cast [-Werror]
      exec.c: In function 'qemu_ram_remap':
      exec.c:1283:21: error:
       comparison of distinct pointer types lacks a cast [-Werror]
      Signed-off-by: NStefan Weil <sw@weilnetz.de>
      Reviewed-by: NMarkus Armbruster <armbru@redhat.com>
      Message-id: 1380481005-32399-1-git-send-email-sw@weilnetz.de
      Signed-off-by: NAnthony Liguori <aliguori@amazon.com>
      575ddeb4
  15. 07 10月, 2013 1 次提交
  16. 03 10月, 2013 1 次提交
  17. 21 9月, 2013 1 次提交
  18. 20 9月, 2013 1 次提交
    • A
      exec: always use MADV_DONTFORK · 3e469dbf
      Andrea Arcangeli 提交于
      MADV_DONTFORK prevents fork to fail with -ENOMEM if the default
      overcommit heuristics decides there's too much anonymous virtual
      memory allocated. If the KVM secondary MMU is synchronized with MMU
      notifiers or not, doesn't make a difference in that regard.
      
      Secondly it's always more efficient to avoid copying the guest
      physical address space in the fork child (so we avoid to mark all the
      guest memory readonly in the parent and so we skip the establishment
      and teardown of lots of pagetables in the child).
      
      In the common case we can ignore the error if MADV_DONTFORK is not
      available. Leave a second invocation that errors out in the KVM path
      if MMU notifiers are missing and KVM is enabled, to abort in such
      case.
      Signed-off-by: NAndrea Arcangeli <aarcange@redhat.com>
      Tested-By: NBenoit Canet <benoit@irqsave.net>
      Acked-by: NPaolo Bonzini <pbonzini@redhat.com>
      Signed-off-by: NGleb Natapov <gleb@redhat.com>
      3e469dbf
  19. 13 9月, 2013 4 次提交