MIPS queue for October 2018, part 4

# gpg: Signature made Mon 29 Oct 2018 15:11:32 GMT
# gpg:                using RSA key D4972A8967F75A65
# gpg: Good signature from "Aleksandar Markovic <amarkovic@wavecomp.com>"
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg:          There is no indication that the signature belongs to the owner.
# Primary key fingerprint: 8526 FBF1 5DA3 811F 4A01  DD75 D497 2A89 67F7 5A65

* remotes/amarkovic/tags/mips-queue-october-2018-part-4: (27 commits)
  linux-user: Add prctl() PR_SET_FP_MODE and PR_GET_FP_MODE implementations
  linux-user: Determine the desired FPU mode from MIPS.abiflags
  linux-user: Read and set FP ABI value from MIPS abiflags
  linux-user: Extract MIPS abiflags from ELF file
  linux-user: Extend image_info struct with MIPS fp_abi and interp_fp_abi fields
  elf: Define MIPS_ABI_FP_UNKNOWN macro
  target/mips: Amend MXU ASE overview note
  target/mips: Move MXU_EN check one level higher
  target/mips: Add emulation of MXU instructions S32LDD and S32LDDR
  target/mips: Add emulation of MXU instructions Q8MUL and Q8MULSU
  target/mips: Add emulation of MXU instruction D16MAC
  target/mips: Add emulation of MXU instruction D16MUL
  target/mips: Add emulation of MXU instruction S8LDD
  target/mips: Move MUL, S32M2I, S32I2M handling out of main MXU switch
  target/mips: Add emulation of MXU instructions S32I2M and S32M2I
  target/mips: Add emulation of non-MXU MULL within MXU decoding engine
  target/mips: Add bit encoding for MXU operand getting pattern 'optn3'
  target/mips: Add bit encoding for MXU operand getting pattern 'optn2'
  target/mips: Add bit encoding for MXU execute add/sub pattern 'eptn2'
  target/mips: Add bit encoding for MXU accumulate add/sub 2-bit pattern 'aptn2'
  ...
Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>

ui: sdl+spice tweaks.

# gpg: Signature made Mon 29 Oct 2018 14:18:21 GMT
# gpg:                using RSA key 4CB6D8EED3E87138
# gpg: Good signature from "Gerd Hoffmann (work) <kraxel@redhat.com>"
# gpg:                 aka "Gerd Hoffmann <gerd@kraxel.org>"
# gpg:                 aka "Gerd Hoffmann (private) <kraxel@gmail.com>"
# Primary key fingerprint: A032 8CFF B93A 17A7 9901  FE7D 4CB6 D8EE D3E8 7138

* remotes/kraxel/tags/ui-20181029-pull-request:
  spice: prepare for upcoming spice-server change
  SDL: set a hint to not bypass the window compositor
Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>

Pull request

No changelog-worthy entries, just small tweaks.

# gpg: Signature made Mon 29 Oct 2018 13:55:54 GMT
# gpg:                using RSA key 9CA4ABB381AB73C8
# gpg: Good signature from "Stefan Hajnoczi <stefanha@redhat.com>"
# gpg:                 aka "Stefan Hajnoczi <stefanha@gmail.com>"
# Primary key fingerprint: 8695 A8BF D3F9 7CDA AC35  775A 9CA4 ABB3 81AB 73C8

* remotes/stefanha/tags/block-pull-request:
  nvdimm: Add docs hint for Linux driver name
  util: aio-posix: fix a typo
Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>

audio: qom cleanups.

# gpg: Signature made Mon 29 Oct 2018 13:37:09 GMT
# gpg:                using RSA key 4CB6D8EED3E87138
# gpg: Good signature from "Gerd Hoffmann (work) <kraxel@redhat.com>"
# gpg:                 aka "Gerd Hoffmann <gerd@kraxel.org>"
# gpg:                 aka "Gerd Hoffmann (private) <kraxel@gmail.com>"
# Primary key fingerprint: A032 8CFF B93A 17A7 9901  FE7D 4CB6 D8EE D3E8 7138

* remotes/kraxel/tags/audio-20181029-pull-request:
  audio: use TYPE_MV88W8618_AUDIO instead of hardcoded string
  audio: use object link instead of qdev property to pass wm8750 reference
  audio: use TYPE_WM8750 instead of a hardcoded string
  hw: AC97: make it more QOMconventional
Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>

Implement MIPS specific prctl() PR_SET_FP_MODE and PR_GET_FP_MODE emulation.
Reviewed-by: NAleksandar Markovic <amarkovic@wavecomp.com>
Signed-off-by: NStefan Markovic <smarkovic@wavecomp.com>

Floating-point mode is calculated from MIPS.abiflags FP ABI value
(based on kernel implementation). Illegal combinations are rejected.
Reviewed-by: NAleksandar Markovic <amarkovic@wavecomp.com>
Signed-off-by: NStefan Markovic <smarkovic@wavecomp.com>

Set fp_abi and interp_fp_abi values to current fp_abi value read from
MIPS.abiflags.
Reviewed-by: NAleksandar Markovic <amarkovic@wavecomp.com>
Signed-off-by: NStefan Markovic <smarkovic@wavecomp.com>

Read MIPS.abiflags section from ELF file into Mips_elf_abiflags_v0 struct.
Reviewed-by: NAleksandar Markovic <amarkovic@wavecomp.com>
Signed-off-by: NStefan Markovic <smarkovic@wavecomp.com>

Add MIPS specific image_info struct fields fp_abi and interp_fp_abi
to store executable and interpreter fp_abi values (based on kernel
struct arch_elf_state in mips/include/asm/elf.h).
Reviewed-by: NAleksandar Markovic <amarkovic@wavecomp.com>
Signed-off-by: NStefan Markovic <smarkovic@wavecomp.com>

Add MIPS_ABI_FP_UNKNOWN as QEMU internal value to represent
unknown fp_abi (based on kernel mips/include/asm/elf.h definition)
Reviewed-by: NAleksandar Markovic <amarkovic@wavecomp.com>
Signed-off-by: NStefan Markovic <smarkovic@wavecomp.com>

Future spice-server versions will call the client_monitors_config
callback with the monitors list filtered to only include the monitors
of the given display channel (aka QXLInstance).  Luckily this is easily
detectable at runtime, so we can prepare for that in advance and also
make qemu compatible with both old and new spice-server versions.

While being at it also use the console index instead of head number as
array index.  The later doesn't work correctly in case multiple display
devices are present.

Cc: spice-devel@lists.freedesktop.org
Signed-off-by: NGerd Hoffmann <kraxel@redhat.com>
Reviewed-by: NLukáš Hrázký <lhrazky@redhat.com>
Message-id: 20181012114551.28809-1-kraxel@redhat.com

Without that, window effects in KWin get suspended as soon as any
qemu-sdl window becomes visible. While the SDL default makes sense
for games, it's not really suitable for QEMU.
Signed-off-by: NSebastian Krzyszkowiak <dos@dosowisko.net>
Message-id: 20181024143748.4425-1-dos@dosowisko.net
Signed-off-by: NGerd Hoffmann <kraxel@redhat.com>

I spent way too much time trying to figure out why the emulated NVDIMM
was missing under Linux. In an effort to help others who might be looking
for these kinds of things in the future, include a hint.
Signed-off-by: NKees Cook <keescook@chromium.org>
Message-id: 20181018201351.GA25286@beast
Signed-off-by: NStefan Hajnoczi <stefanha@redhat.com>

Cc: qemu-trivial@nongnu.org
Signed-off-by: NLi Qiang <liq3ea@gmail.com>
Reviewed-by: NPeter Maydell <peter.maydell@linaro.org>
Reviewed-by: NFam Zheng <famz@redhat.com>
Message-id: 1538964972-3223-1-git-send-email-liq3ea@gmail.com
Signed-off-by: NStefan Hajnoczi <stefanha@redhat.com>

Add prefix, suffix, operation descriptions, and other corrections
and amendments to the comment that describes MXU ASE.
Reviewed-by: NStefan Markovic <smarkovic@wavecomp.com>
Signed-off-by: NAleksandar Markovic <amarkovic@wavecomp.com>

Move MXU_EN check to the main MXU decoding function, to avoid code
repetition.
Reviewed-by: NStefan Markovic <smarkovic@wavecomp.com>
Signed-off-by: NAleksandar Markovic <amarkovic@wavecomp.com>

Add support for emulating the S32LDD and S32LDDR MXU instructions.
Reviewed-by: NAleksandar Markovic <amarkovic@wavecomp.com>
Signed-off-by: NCraig Janeczek <jancraig@amazon.com>
Signed-off-by: NAleksandar Markovic <amarkovic@wavecomp.com>

Adds support for emulating the Q8MUL and Q8MULSU MXU instructions.
Reviewed-by: NAleksandar Markovic <amarkovic@wavecomp.com>
Signed-off-by: NCraig Janeczek <jancraig@amazon.com>
Signed-off-by: NAleksandar Markovic <amarkovic@wavecomp.com>

Add support for emulating the D16MAC MXU instruction.
Reviewed-by: NAleksandar Markovic <amarkovic@wavecomp.com>
Signed-off-by: NCraig Janeczek <jancraig@amazon.com>
Signed-off-by: NAleksandar Markovic <amarkovic@wavecomp.com>

Add support for emulating the D16MUL MXU instruction.
Reviewed-by: NAleksandar Markovic <amarkovic@wavecomp.com>
Signed-off-by: NCraig Janeczek <jancraig@amazon.com>
Signed-off-by: NAleksandar Markovic <amarkovic@wavecomp.com>

Add support for emulating the S8LDD MXU instruction.
Reviewed-by: NAleksandar Markovic <amarkovic@wavecomp.com>
Signed-off-by: NCraig Janeczek <jancraig@amazon.com>
Signed-off-by: NAleksandar Markovic <amarkovic@wavecomp.com>

Move MUL, S32M2I, S32I2M handling out of switch. These are all
instructions that do not depend on MXU_EN flag of MXU_CR.
Reviewed-by: NStefan Markovic <smarkovic@wavecomp.com>
Signed-off-by: NAleksandar Markovic <amarkovic@wavecomp.com>

Add support for emulating the S32I2M and S32M2I MXU instructions.
This commit also contains utility functions for reading/writing
to MXU registers. This is required for overall MXU instruction
support.
Reviewed-by: NAleksandar Markovic <amarkovic@wavecomp.com>
Signed-off-by: NCraig Janeczek <jancraig@amazon.com>
Signed-off-by: NAleksandar Markovic <amarkovic@wavecomp.com>

Add emulation of non-MXU MULL within MXU decoding engine.
Reviewed-by: NAleksandar Markovic <amarkovic@wavecomp.com>
Signed-off-by: NCraig Janeczek <jancraig@amazon.com>
Signed-off-by: NAleksandar Markovic <amarkovic@wavecomp.com>

Add bit encoding for MXU operand getting pattern 'optn3'.
Reviewed-by: NStefan Markovic <smarkovic@wavecomp.com>
Signed-off-by: NCraig Janeczek <jancraig@amazon.com>
Signed-off-by: NAleksandar Markovic <amarkovic@wavecomp.com>

Add bit encoding for MXU operand getting pattern 'optn2'.
Reviewed-by: NStefan Markovic <smarkovic@wavecomp.com>
Signed-off-by: NCraig Janeczek <jancraig@amazon.com>
Signed-off-by: NAleksandar Markovic <amarkovic@wavecomp.com>

Add bit encoding for MXU execute 2-bit add/subtract pattern 'eptn2'.
Reviewed-by: NStefan Markovic <smarkovic@wavecomp.com>
Signed-off-by: NAleksandar Markovic <amarkovic@wavecomp.com>

Add bit encoding for MXU accumulate add/subtract 2-bit pattern
'aptn2'.
Reviewed-by: NStefan Markovic <smarkovic@wavecomp.com>
Signed-off-by: NCraig Janeczek <jancraig@amazon.com>
Signed-off-by: NAleksandar Markovic <amarkovic@wavecomp.com>

Add bit encoding for MXU accumulate add/subtract 1-bit pattern
'aptn1'.
Reviewed-by: NStefan Markovic <smarkovic@wavecomp.com>
Signed-off-by: NAleksandar Markovic <amarkovic@wavecomp.com>

Add MXU decoding engine: add handlers for all instruction pools,
and main decode handler. The handlers, for now, for the purpose
of this patch, contain only sceleton in the form of a single
switch statement.
Reviewed-by: NStefan Markovic <smarkovic@wavecomp.com>
Signed-off-by: NAleksandar Markovic <amarkovic@wavecomp.com>

Provide the placeholder and add the invocation logic for MXU
decoding engine.
Reviewed-by: NStefan Markovic <smarkovic@wavecomp.com>
Signed-off-by: NAleksandar Markovic <amarkovic@wavecomp.com>

Amend MXU instruction opcodes. Pool04 is actually only instruction
OPC_MXU_S16MAD. Two cases within S16MAD are recognized by 1-bit
subfield 'aptn1'.
Reviewed-by: NStefan Markovic <smarkovic@wavecomp.com>
Signed-off-by: NAleksandar Markovic <amarkovic@wavecomp.com>

Define a bit for MXU in insn_flags. This is the first non-MIPS
(third party) ASE supported in QEMU for MIPS, so it is placed in
the section "bits 56-63: vendor-specific ASEs".
Reviewed-by: NAleksandar Markovic <amarkovic@wavecomp.com>
Signed-off-by: NCraig Janeczek <jancraig@amazon.com>
Signed-off-by: NAleksandar Markovic <amarkovic@wavecomp.com>

Define and initialize the 16 MXU registers - 15 general computational
register, and 1 control register). There is also a zero register, but
it does not have any corresponding variable.
Reviewed-by: NRichard Henderson <richard.henderson@linaro.org>
Signed-off-by: NCraig Janeczek <jancraig@amazon.com>
Signed-off-by: NAleksandar Markovic <amarkovic@wavecomp.com>

Coverity found two fallthroughs that miss break statement. Fix them.
Revieved-by: NStefan Markovic <smarkovic@wavecomp.com>
Signed-off-by: NAleksandar Markovic <amarkovic@wavecomp.com>

vga: two fixes.

# gpg: Signature made Mon 29 Oct 2018 12:46:20 GMT
# gpg:                using RSA key 4CB6D8EED3E87138
# gpg: Good signature from "Gerd Hoffmann (work) <kraxel@redhat.com>"
# gpg:                 aka "Gerd Hoffmann <gerd@kraxel.org>"
# gpg:                 aka "Gerd Hoffmann (private) <kraxel@gmail.com>"
# Primary key fingerprint: A032 8CFF B93A 17A7 9901  FE7D 4CB6 D8EE D3E8 7138

* remotes/kraxel/tags/vga-20181029-pull-request:
  vga_int: remove unused function protype
  qxl: store channel id in qxl->id
Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>

Cc: Jan Kiszka <jan.kiszka@web.de>
Cc: Philippe Mathieu-Daudé <philmd@redhat.com>
Cc: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: NMao Zhongyi <maozhongyi@cmss.chinamobile.com>
Reviewed-by: NPhilippe Mathieu-Daudé <philmd@redhat.com>
Message-id: 20181022074050.19638-4-maozhongyi@cmss.chinamobile.com
Signed-off-by: NGerd Hoffmann <kraxel@redhat.com>

According to qdev-properties.h, properties of pointer type should
be avoided, it seems a link type property is a good substitution.

Cc: Jan Kiszka <jan.kiszka@web.de>
Cc: Peter Maydell <peter.maydell@linaro.org>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Signed-off-by: NMao Zhongyi <maozhongyi@cmss.chinamobile.com>
Reviewed-by: NPhilippe Mathieu-Daudé <philmd@redhat.com>
Message-id: 20181022074050.19638-3-maozhongyi@cmss.chinamobile.com
Signed-off-by: NGerd Hoffmann <kraxel@redhat.com>

Cc: Jan Kiszka <jan.kiszka@web.de>
Cc: Peter Maydell <peter.maydell@linaro.org>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Signed-off-by: NMao Zhongyi <maozhongyi@cmss.chinamobile.com>
Reviewed-by: NPhilippe Mathieu-Daudé <philmd@redhat.com>
Message-id: 20181022074050.19638-2-maozhongyi@cmss.chinamobile.com
Signed-off-by: NGerd Hoffmann <kraxel@redhat.com>

Signed-off-by: NLi Qiang <liq3ea@163.com>
Reviewed-by: NPhilippe Mathieu-Daudé <f4bug@amsat.org>
Message-id: 20181013060809.52496-1-liq3ea@163.com
Signed-off-by: NGerd Hoffmann <kraxel@redhat.com>