提交 5f0ce17f 编写于 作者: A Aurelien Jarno

tcg/i386: add support for ext{8,16}u_i32 TCG ops

Signed-off-by: NAurelien Jarno <aurelien@aurel32.net>
上级 64584218
......@@ -1073,6 +1073,12 @@ static inline void tcg_out_op(TCGContext *s, int opc,
case INDEX_op_ext16s_i32:
tcg_out_modrm(s, 0xbf | P_EXT, args[0], args[1]);
break;
case INDEX_op_ext8u_i32:
tcg_out_modrm(s, 0xb6 | P_EXT, args[0], args[1]);
break;
case INDEX_op_ext16u_i32:
tcg_out_modrm(s, 0xb7 | P_EXT, args[0], args[1]);
break;
case INDEX_op_qemu_ld8u:
tcg_out_qemu_ld(s, args, 0);
......@@ -1160,6 +1166,8 @@ static const TCGTargetOpDef x86_op_defs[] = {
{ INDEX_op_ext8s_i32, { "r", "q" } },
{ INDEX_op_ext16s_i32, { "r", "r" } },
{ INDEX_op_ext8u_i32, { "r", "q"} },
{ INDEX_op_ext16u_i32, { "r", "r"} },
#if TARGET_LONG_BITS == 32
{ INDEX_op_qemu_ld8u, { "r", "L" } },
......
......@@ -52,6 +52,8 @@ enum {
#define TCG_TARGET_HAS_ext8s_i32
#define TCG_TARGET_HAS_ext16s_i32
#define TCG_TARGET_HAS_rot_i32
#define TCG_TARGET_HAS_ext8u_i32
#define TCG_TARGET_HAS_ext16u_i32
#define TCG_TARGET_HAS_GUEST_BASE
......
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