From 5f0ce17ffc926f0d41cdbf90435ff7cb33a04942 Mon Sep 17 00:00:00 2001 From: Aurelien Jarno Date: Fri, 2 Oct 2009 20:55:24 +0200 Subject: [PATCH] tcg/i386: add support for ext{8,16}u_i32 TCG ops Signed-off-by: Aurelien Jarno --- tcg/i386/tcg-target.c | 8 ++++++++ tcg/i386/tcg-target.h | 2 ++ 2 files changed, 10 insertions(+) diff --git a/tcg/i386/tcg-target.c b/tcg/i386/tcg-target.c index b4e3b6fd47..dd4d4e0717 100644 --- a/tcg/i386/tcg-target.c +++ b/tcg/i386/tcg-target.c @@ -1073,6 +1073,12 @@ static inline void tcg_out_op(TCGContext *s, int opc, case INDEX_op_ext16s_i32: tcg_out_modrm(s, 0xbf | P_EXT, args[0], args[1]); break; + case INDEX_op_ext8u_i32: + tcg_out_modrm(s, 0xb6 | P_EXT, args[0], args[1]); + break; + case INDEX_op_ext16u_i32: + tcg_out_modrm(s, 0xb7 | P_EXT, args[0], args[1]); + break; case INDEX_op_qemu_ld8u: tcg_out_qemu_ld(s, args, 0); @@ -1160,6 +1166,8 @@ static const TCGTargetOpDef x86_op_defs[] = { { INDEX_op_ext8s_i32, { "r", "q" } }, { INDEX_op_ext16s_i32, { "r", "r" } }, + { INDEX_op_ext8u_i32, { "r", "q"} }, + { INDEX_op_ext16u_i32, { "r", "r"} }, #if TARGET_LONG_BITS == 32 { INDEX_op_qemu_ld8u, { "r", "L" } }, diff --git a/tcg/i386/tcg-target.h b/tcg/i386/tcg-target.h index 461ef315c6..69227c3bc5 100644 --- a/tcg/i386/tcg-target.h +++ b/tcg/i386/tcg-target.h @@ -52,6 +52,8 @@ enum { #define TCG_TARGET_HAS_ext8s_i32 #define TCG_TARGET_HAS_ext16s_i32 #define TCG_TARGET_HAS_rot_i32 +#define TCG_TARGET_HAS_ext8u_i32 +#define TCG_TARGET_HAS_ext16u_i32 #define TCG_TARGET_HAS_GUEST_BASE -- GitLab