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由 Peter A. G. Crosthwaite 提交于
Re-implemented the interconnect between the Xilinx AXI ethernet and DMA controllers. A QOM interface "stream" is created, for the two stream interfaces. As per Edgars request, this is designed to be more generic than AXI-stream, so in the future we may see more clients of this interface beyond AXI stream. This is based primarily on Paolos original refactoring of the interconnect. Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com> Signed-off-by: NPeter A.G. Crosthwaite <peter.crosthwaite@petalogix.com> Signed-off-by: NEdgar E. Iglesias <edgar.iglesias@gmail.com>
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