- 26 3月, 2020 1 次提交
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由 Christian Ehrhardt 提交于
One of the mitigation methods for TAA[1] is to disable TSX support on the host system. Linux added a mechanism to disable TSX globally through the kernel command line, and many Linux distributions now default to tsx=off. This makes existing CPU models that have HLE and RTM enabled not usable anymore. Add new versions of all CPU models that have the HLE and RTM features enabled, that can be used when TSX is disabled in the host system. On systems disabling the features without those types defined in cpu-maps users end up without modern CPU types in the list of usable CPUs to use in the likes of virsh domcapabilities or tools higher in the stack like virt-manager. This adds: -Cascadelake-Server-noTSX -Icelake-Client-noTSX -Icelake-Server-noTSX -Skylake-Server-noTSX-IBRS -Skylake-Client-noTSX-IBRS Introduced in QEMU by commit v4.2.0-rc2-3-g9ab2237f19 (function) and commit v4.2.0-rc2-4-g02fa60d101 (names) References: [1] TAA, TSX asynchronous Abort: https://software.intel.com/security-software-guidance/insights/deep-dive-intel-transactional-synchronization-extensions-intel-tsx-asynchronous-abort https://www.kernel.org/doc/html/latest/admin-guide/hw-vuln/tsx_async_abort.html Fixes: https://bugs.launchpad.net/ubuntu/+source/libvirt/+bug/1853200Signed-off-by: NChristian Ehrhardt <christian.ehrhardt@canonical.com> Message-Id: <20200310104806.2723-2-christian.ehrhardt@canonical.com> Reviewed-by: NJiri Denemark <jdenemar@redhat.com>
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- 13 12月, 2019 1 次提交
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由 Yingle Hou 提交于
Add Hygon Dhyana CPU model to the processor model. Reviewed-by: NDaniel P. Berrangé <berrange@redhat.com> Signed-off-by: NYingle Hou <houyingle@hygon.cn>
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- 08 11月, 2019 1 次提交
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由 Andrea Bolognani 提交于
The file was introduced in be03587a, but it was not added to $(cpumap_DATA) at the time and so it didn't show up in the distribution archive. Signed-off-by: NAndrea Bolognani <abologna@redhat.com>
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- 14 4月, 2019 1 次提交
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由 Michal Privoznik 提交于
In 2878278c we've added new cpu model but we've forgot to distribute the XML file it comes in. Signed-off-by: NMichal Privoznik <mprivozn@redhat.com>
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- 12 4月, 2019 1 次提交
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由 Andrea Bolognani 提交于
Vim has trouble figuring out the filetype automatically because the name doesn't follow existing conventions; annotations like the ones we already have in Makefile.ci help it out. Signed-off-by: NAndrea Bolognani <abologna@redhat.com> Reviewed-by: NDaniel P. Berrangé <berrange@redhat.com>
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- 09 4月, 2019 1 次提交
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由 Pavel Hrdina 提交于
The later is the correct CPU model name. Signed-off-by: NPavel Hrdina <phrdina@redhat.com>
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- 03 10月, 2018 1 次提交
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由 Jiri Denemark 提交于
In commit v4.7.0-168-g993d85ae I introduced two Icelake CPU models, but failed to actually include them in the CPU map index. Signed-off-by: NJiri Denemark <jdenemar@redhat.com>
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- 28 8月, 2018 3 次提交
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由 Daniel P. Berrangé 提交于
Reviewed-by: NJiri Denemark <jdenemar@redhat.com> Signed-off-by: NDaniel P. Berrangé <berrange@redhat.com>
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由 Daniel P. Berrangé 提交于
Reviewed-by: NJiri Denemark <jdenemar@redhat.com> Signed-off-by: NDaniel P. Berrangé <berrange@redhat.com>
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由 Daniel P. Berrangé 提交于
In preparation for splitting up the CPU map data file, move it into a dedicated directory of its own. Reviewed-by: NJiri Denemark <jdenemar@redhat.com> Signed-off-by: NDaniel P. Berrangé <berrange@redhat.com>
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