- 08 12月, 2020 1 次提交
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由 Robin Murphy 提交于
The only user of tlb_flush_leaf is a particularly hairy corner of the Arm short-descriptor code, which wants a synchronous invalidation to minimise the races inherent in trying to split a large page mapping. This is already far enough into "here be dragons" territory that no sensible caller should ever hit it, and thus it really doesn't need optimising. Although using tlb_flush_walk there may technically be more heavyweight than needed, it does the job and saves everyone else having to carry around useless baggage. Signed-off-by: NRobin Murphy <robin.murphy@arm.com> Reviewed-by: NSteven Price <steven.price@arm.com> Link: https://lore.kernel.org/r/9844ab0c5cb3da8b2f89c6c2da16941910702b41.1606324115.git.robin.murphy@arm.comSigned-off-by: NWill Deacon <will@kernel.org>
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- 08 8月, 2020 1 次提交
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由 Mike Rapoport 提交于
Patch series "mm: cleanup usage of <asm/pgalloc.h>" Most architectures have very similar versions of pXd_alloc_one() and pXd_free_one() for intermediate levels of page table. These patches add generic versions of these functions in <asm-generic/pgalloc.h> and enable use of the generic functions where appropriate. In addition, functions declared and defined in <asm/pgalloc.h> headers are used mostly by core mm and early mm initialization in arch and there is no actual reason to have the <asm/pgalloc.h> included all over the place. The first patch in this series removes unneeded includes of <asm/pgalloc.h> In the end it didn't work out as neatly as I hoped and moving pXd_alloc_track() definitions to <asm-generic/pgalloc.h> would require unnecessary changes to arches that have custom page table allocations, so I've decided to move lib/ioremap.c to mm/ and make pgalloc-track.h local to mm/. This patch (of 8): In most cases <asm/pgalloc.h> header is required only for allocations of page table memory. Most of the .c files that include that header do not use symbols declared in <asm/pgalloc.h> and do not require that header. As for the other header files that used to include <asm/pgalloc.h>, it is possible to move that include into the .c file that actually uses symbols from <asm/pgalloc.h> and drop the include from the header file. The process was somewhat automated using sed -i -E '/[<"]asm\/pgalloc\.h/d' \ $(grep -L -w -f /tmp/xx \ $(git grep -E -l '[<"]asm/pgalloc\.h')) where /tmp/xx contains all the symbols defined in arch/*/include/asm/pgalloc.h. [rppt@linux.ibm.com: fix powerpc warning] Signed-off-by: NMike Rapoport <rppt@linux.ibm.com> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Reviewed-by: NPekka Enberg <penberg@kernel.org> Acked-by: Geert Uytterhoeven <geert@linux-m68k.org> [m68k] Cc: Abdul Haleem <abdhalee@linux.vnet.ibm.com> Cc: Andy Lutomirski <luto@kernel.org> Cc: Arnd Bergmann <arnd@arndb.de> Cc: Christophe Leroy <christophe.leroy@csgroup.eu> Cc: Joerg Roedel <joro@8bytes.org> Cc: Max Filippov <jcmvbkbc@gmail.com> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Satheesh Rajendran <sathnaga@linux.vnet.ibm.com> Cc: Stafford Horne <shorne@gmail.com> Cc: Stephen Rothwell <sfr@canb.auug.org.au> Cc: Steven Rostedt <rostedt@goodmis.org> Cc: Joerg Roedel <jroedel@suse.de> Cc: Matthew Wilcox <willy@infradead.org> Link: http://lkml.kernel.org/r/20200627143453.31835-1-rppt@kernel.org Link: http://lkml.kernel.org/r/20200627143453.31835-2-rppt@kernel.orgSigned-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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- 24 7月, 2020 1 次提交
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由 Baolin Wang 提交于
Now the ARM page tables are always allocated by GFP_ATOMIC parameter, but the iommu_ops->map() function has been added a gfp_t parameter by commit 781ca2de ("iommu: Add gfp parameter to iommu_ops::map"), thus io_pgtable_ops->map() should use the gfp parameter passed from iommu_ops->map() to allocate page pages, which can avoid wasting the memory allocators atomic pools for some non-atomic contexts. Signed-off-by: NBaolin Wang <baolin.wang@linux.alibaba.com> Acked-by: NWill Deacon <will@kernel.org> Link: https://lore.kernel.org/r/3093df4cb95497aaf713fca623ce4ecebb197c2e.1591930156.git.baolin.wang@linux.alibaba.comSigned-off-by: NJoerg Roedel <jroedel@suse.de>
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- 22 7月, 2020 2 次提交
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由 Lad Prabhakar 提交于
Add an entry for r8a77961 in soc_rcar_gen3[] list so that we dont enable iommu unconditionally. Fixes: 17fe1618 ("iommu/renesas: Add support for r8a77961") Signed-off-by: NLad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: NGeert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/1594722055-9298-3-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.comSigned-off-by: NJoerg Roedel <jroedel@suse.de>
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由 Marian-Cristian Rotariu 提交于
Add support for RZ/G2H (R8A774E1) SoC IPMMUs. Signed-off-by: NMarian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com> Signed-off-by: NLad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: NGeert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/1594722055-9298-2-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.comSigned-off-by: NJoerg Roedel <jroedel@suse.de>
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- 30 6月, 2020 1 次提交
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由 Yoshihiro Shimoda 提交于
Add support for r8a77961 (R-Car M3-W+). Signed-off-by: NYoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Link: https://lore.kernel.org/r/1591873830-10128-3-git-send-email-yoshihiro.shimoda.uh@renesas.comSigned-off-by: NJoerg Roedel <jroedel@suse.de>
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- 13 5月, 2020 1 次提交
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由 Arnd Bergmann 提交于
gcc warns because the only reference to ipmmu_find_group is inside of an #ifdef: drivers/iommu/ipmmu-vmsa.c:878:28: error: 'ipmmu_find_group' defined but not used [-Werror=unused-function] Change the #ifdef to an equivalent IS_ENABLED(). Fixes: 6580c8a7 ("iommu/renesas: Convert to probe/release_device() call-backs") Signed-off-by: NArnd Bergmann <arnd@arndb.de> Reviewed-by: NSimon Horman <horms@verge.net.au> Link: https://lore.kernel.org/r/20200508220224.688985-1-arnd@arndb.deSigned-off-by: NJoerg Roedel <jroedel@suse.de>
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- 05 5月, 2020 1 次提交
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由 Joerg Roedel 提交于
Convert the Renesas IOMMU driver to use the probe_device() and release_device() call-backs of iommu_ops, so that the iommu core code does the group and sysfs setup. Signed-off-by: NJoerg Roedel <jroedel@suse.de> Link: https://lore.kernel.org/r/20200429133712.31431-28-joro@8bytes.orgSigned-off-by: NJoerg Roedel <jroedel@suse.de>
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- 27 3月, 2020 1 次提交
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由 Joerg Roedel 提交于
Make use of dev_iommu_priv_set/get() functions. Signed-off-by: NJoerg Roedel <jroedel@suse.de> Reviewed-by: NJean-Philippe Brucker <jean-philippe@linaro.org> Link: https://lore.kernel.org/r/20200326150841.10083-13-joro@8bytes.org
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- 10 1月, 2020 1 次提交
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由 Robin Murphy 提交于
TTBR1 values have so far been redundant since no users implement any support for split address spaces. Crucially, though, one of the main reasons for wanting to do so is to be able to manage each half entirely independently, e.g. context-switching one set of mappings without disturbing the other. Thus it seems unlikely that tying two tables together in a single io_pgtable_cfg would ever be particularly desirable or useful. Streamline the configs to just a single conceptual TTBR value representing the allocated table. This paves the way for future users to support split address spaces by simply allocating a table and dealing with the detailed TTBRn logistics themselves. Tested-by: NJordan Crouse <jcrouse@codeaurora.org> Signed-off-by: NRobin Murphy <robin.murphy@arm.com> [will: Drop change to ttbr value] Signed-off-by: NWill Deacon <will@kernel.org>
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- 11 11月, 2019 6 次提交
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由 Yoshihiro Shimoda 提交于
Since we will have changed memory mapping of the IPMMU in the future, this patch adds a utlb_offset_base into struct ipmmu_features for IMUCTR and IMUASID registers. No behavior change. Signed-off-by: NYoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Reviewed-by: NNiklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Signed-off-by: NJoerg Roedel <jroedel@suse.de>
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由 Yoshihiro Shimoda 提交于
Since we will have changed memory mapping of the IPMMU in the future, This patch adds helper functions ipmmu_utlb_reg() and ipmmu_imu{asid,ctr}_write() for "uTLB" registers. No behavior change. Signed-off-by: NYoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Reviewed-by: NGeert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: NNiklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Signed-off-by: NJoerg Roedel <jroedel@suse.de>
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由 Yoshihiro Shimoda 提交于
Since we will have changed memory mapping of the IPMMU in the future, this patch uses ipmmu_features values instead of a macro to calculate context registers offset. No behavior change. Signed-off-by: NYoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Reviewed-by: NGeert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: NNiklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Signed-off-by: NJoerg Roedel <jroedel@suse.de>
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由 Yoshihiro Shimoda 提交于
Since we will have changed memory mapping of the IPMMU in the future, This patch adds helper functions ipmmu_ctx_{reg,read,write}() for MMU "context" registers. No behavior change. Signed-off-by: NYoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Reviewed-by: NGeert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: NNiklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Signed-off-by: NJoerg Roedel <jroedel@suse.de>
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由 Yoshihiro Shimoda 提交于
To support different registers memory mapping hardware easily in the future, this patch tidies up the register definitions as below: - Add comments to state to which SoCs or SoC families they apply - Add categories about MMU "context" and uTLB registers No change behavior. Signed-off-by: NYoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Reviewed-by: NNiklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Signed-off-by: NJoerg Roedel <jroedel@suse.de>
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由 Yoshihiro Shimoda 提交于
To support different registers memory mapping hardware easily in the future, this patch removes all unused register definitions. Signed-off-by: NYoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Reviewed-by: NNiklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Signed-off-by: NJoerg Roedel <jroedel@suse.de>
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- 05 11月, 2019 1 次提交
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由 Robin Murphy 提交于
Between VMSAv8-64 and the various 32-bit formats, there is either one 64-bit MAIR or a pair of 32-bit MAIR0/MAIR1 or NMRR/PMRR registers. As such, keeping two 64-bit values in io_pgtable_cfg has always been overkill. Signed-off-by: NRobin Murphy <robin.murphy@arm.com> Signed-off-by: NWill Deacon <will@kernel.org>
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- 30 10月, 2019 1 次提交
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由 YueHaibing 提交于
platform_get_irq() will call dev_err() itself on failure, so there is no need for the driver to also do this. This is detected by coccinelle. Signed-off-by: NYueHaibing <yuehaibing@huawei.com> Reviewed-by: NGeert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: NJoerg Roedel <jroedel@suse.de>
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- 15 10月, 2019 3 次提交
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由 Geert Uytterhoeven 提交于
As platform_get_irq() now prints an error when the interrupt does not exist, calling it gratuitously causes scary messages like: ipmmu-vmsa e6740000.mmu: IRQ index 0 not found Fix this by moving the call to platform_get_irq() down, where the existence of the interrupt is mandatory. Fixes: 7723f4c5 ("driver core: platform: Add an error message to platform_get_irq*()") Signed-off-by: NGeert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: NYoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Tested-by: NYoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Reviewed-by: NStephen Boyd <swboyd@chromium.org> Signed-off-by: NJoerg Roedel <jroedel@suse.de>
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由 Biju Das 提交于
Support RZ/G2N (R8A774B1) IPMMU. Signed-off-by: NBiju Das <biju.das@bp.renesas.com> Reviewed-by: NGeert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: NJoerg Roedel <jroedel@suse.de>
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由 Tom Murphy 提交于
Add a gfp_t parameter to the iommu_ops::map function. Remove the needless locking in the AMD iommu driver. The iommu_ops::map function (or the iommu_map function which calls it) was always supposed to be sleepable (according to Joerg's comment in this thread: https://lore.kernel.org/patchwork/patch/977520/ ) and so should probably have had a "might_sleep()" since it was written. However currently the dma-iommu api can call iommu_map in an atomic context, which it shouldn't do. This doesn't cause any problems because any iommu driver which uses the dma-iommu api uses gfp_atomic in it's iommu_ops::map function. But doing this wastes the memory allocators atomic pools. Signed-off-by: NTom Murphy <murphyt7@tcd.ie> Reviewed-by: NRobin Murphy <robin.murphy@arm.com> Reviewed-by: NChristoph Hellwig <hch@lst.de> Signed-off-by: NJoerg Roedel <jroedel@suse.de>
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- 05 9月, 2019 2 次提交
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由 Hai Nguyen Pham 提交于
According to the Hardware Manual Errata for Rev. 1.50 of April 10, 2019, cache snoop transactions for page table walk requests are not supported on R-Car Gen3. Hence, this patch removes setting these fields in the IMTTBCR register, since it will have no effect, and adds comments to the register bit definitions, to make it clear they apply to R-Car Gen2 only. Signed-off-by: NHai Nguyen Pham <hai.pham.ud@renesas.com> [geert: Reword, add comments] Signed-off-by: NGeert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: NSimon Horman <horms+renesas@verge.net.au> Signed-off-by: NJoerg Roedel <jroedel@suse.de>
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由 Geert Uytterhoeven 提交于
Move the recently added IMTTBCR_SL0_TWOBIT_* definitions up, to make sure all IMTTBCR register bit definitions are sorted by decreasing bit index. Add comments to make it clear that they exist on R-Car Gen3 only. Fixes: c295f504 ("iommu/ipmmu-vmsa: Allow two bit SL0") Signed-off-by: NGeert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: NSimon Horman <horms+renesas@verge.net.au> Signed-off-by: NJoerg Roedel <jroedel@suse.de>
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- 30 7月, 2019 5 次提交
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由 Will Deacon 提交于
Update the io-pgtable ->unmap() function to take an iommu_iotlb_gather pointer as an argument, and update the callers as appropriate. Signed-off-by: NWill Deacon <will@kernel.org>
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由 Will Deacon 提交于
The ->tlb_sync() callback is no longer used, so it can be removed. Signed-off-by: NWill Deacon <will@kernel.org>
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由 Will Deacon 提交于
The ->tlb_add_flush() callback in the io-pgtable API now looks a bit silly: - It takes a size and a granule, which are always the same - It takes a 'bool leaf', which is always true - It only ever flushes a single page With that in mind, replace it with an optional ->tlb_add_page() callback that drops the useless parameters. Signed-off-by: NWill Deacon <will@kernel.org>
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由 Will Deacon 提交于
Hook up ->tlb_flush_walk() and ->tlb_flush_leaf() in drivers using the io-pgtable API so that we can start making use of them in the page-table code. For now, they can just wrap the implementations of ->tlb_add_flush and ->tlb_sync pending future optimisation in each driver. Signed-off-by: NWill Deacon <will@kernel.org>
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由 Will Deacon 提交于
To allow IOMMU drivers to batch up TLB flushing operations and postpone them until ->iotlb_sync() is called, extend the prototypes for the ->unmap() and ->iotlb_sync() IOMMU ops callbacks to take a pointer to the current iommu_iotlb_gather structure. All affected IOMMU drivers are updated, but there should be no functional change since the extra parameter is ignored for now. Signed-off-by: NWill Deacon <will@kernel.org>
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- 24 7月, 2019 1 次提交
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由 Will Deacon 提交于
In preparation for TLB flush gathering in the IOMMU API, rename the iommu_gather_ops structure in io-pgtable to iommu_flush_ops, which better describes its purpose and avoids the potential for confusion between different levels of the API. $ find linux/ -type f -name '*.[ch]' | xargs sed -i 's/gather_ops/flush_ops/g' Signed-off-by: NWill Deacon <will@kernel.org>
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- 25 6月, 2019 1 次提交
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由 Will Deacon 提交于
IO_PGTABLE_QUIRK_NO_DMA is a bit of a misnomer, since it's really just an indication of whether or not the page-table walker for the IOMMU is coherent with the CPU caches. Since cache coherency is more than just a quirk, replace the flag with its own field in the io_pgtable_cfg structure. Cc: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: NWill Deacon <will@kernel.org>
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- 03 6月, 2019 6 次提交
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由 Geert Uytterhoeven 提交于
During PSCI system suspend, R-Car Gen3 SoCs are powered down, and all IPMMU state is lost. Hence after s2ram, devices wired behind an IPMMU, and configured to use it, will see their DMA operations hang. To fix this, restore all IPMMU contexts, and re-enable all active micro-TLBs during system resume. Signed-off-by: NGeert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: NYoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Tested-by: NYoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Signed-off-by: NJoerg Roedel <jroedel@suse.de>
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由 Geert Uytterhoeven 提交于
ipmmu_domain_init_context() takes care of (1) initializing the software domain, and (2) initializing the hardware context for the domain. Extract the code to initialize the hardware context into a new subroutine ipmmu_domain_setup_context(), to prepare for later reuse. Signed-off-by: NGeert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: NSimon Horman <horms+renesas@verge.net.au> Reviewed-by: NYoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Tested-by: NYoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Signed-off-by: NJoerg Roedel <jroedel@suse.de>
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由 Geert Uytterhoeven 提交于
The maximum number of micro-TLBs per IPMMU instance is not fixed, but depends on the SoC type. Hence move it from struct ipmmu_vmsa_device to struct ipmmu_features, and set up the correct value for both R-Car Gen2 and Gen3 SoCs. Note that currently no code uses this value. Signed-off-by: NGeert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: NLaurent Pinchart <laurent.pinchart@ideasonboard.com> Reviewed-by: NSimon Horman <horms+renesas@verge.net.au> Reviewed-by: NYoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Tested-by: NYoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Signed-off-by: NJoerg Roedel <jroedel@suse.de>
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由 Geert Uytterhoeven 提交于
Make the IPMMU_CTX_MAX constant unsigned, to match the type of ipmmu_features.number_of_contexts. This allows to use plain min() instead of type-casting min_t(). Signed-off-by: NGeert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: NLaurent Pinchart <laurent.pinchart@ideasonboard.com> Reviewed-by: NSimon Horman <horms+renesas@verge.net.au> Reviewed-by: NYoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Tested-by: NYoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Signed-off-by: NJoerg Roedel <jroedel@suse.de>
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由 Geert Uytterhoeven 提交于
On R-Car Gen3, the faulting virtual address is a 40-bit address, and comprised of two registers. Read the upper address part, and combine both parts, when running on a 64-bit system. Signed-off-by: NGeert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: NSimon Horman <horms+renesas@verge.net.au> Reviewed-by: NYoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Tested-by: NYoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Signed-off-by: NJoerg Roedel <jroedel@suse.de>
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由 Geert Uytterhoeven 提交于
As of commit 7af9a5fd ("iommu/ipmmu-vmsa: Use iommu_device_sysfs_add()/remove()"), IOMMU devices show up under /sys/class/iommu/, but their "devices" subdirectories are empty. Likewise, devices tied to an IOMMU do not have an "iommu" backlink. Make sure all links are created, on both arm32 and arm64. Signed-off-by: NGeert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: NLaurent Pinchart <laurent.pinchart@ideasonboard.com> Reviewed-by: NYoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Tested-by: NYoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Signed-off-by: NJoerg Roedel <jroedel@suse.de>
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- 11 2月, 2019 1 次提交
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由 Rob Herring 提交于
Move io-pgtable.h to include/linux/ and export alloc_io_pgtable_ops and free_io_pgtable_ops. This enables drivers outside drivers/iommu/ to use the page table library. Specifically, some ARM Mali GPUs use the ARM page table formats. Cc: Will Deacon <will.deacon@arm.com> Cc: Robin Murphy <robin.murphy@arm.com> Cc: Joerg Roedel <joro@8bytes.org> Cc: Matthias Brugger <matthias.bgg@gmail.com> Cc: Rob Clark <robdclark@gmail.com> Cc: linux-arm-kernel@lists.infradead.org Cc: iommu@lists.linux-foundation.org Cc: linux-mediatek@lists.infradead.org Cc: linux-arm-msm@vger.kernel.org Signed-off-by: NRob Herring <robh@kernel.org> Signed-off-by: NJoerg Roedel <jroedel@suse.de>
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- 17 12月, 2018 2 次提交
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由 Joerg Roedel 提交于
Use the new helpers dev_iommu_fwspec_get()/set() to access the dev->iommu_fwspec pointer. This makes it easier to move that pointer later into another struct. Signed-off-by: NJoerg Roedel <jroedel@suse.de>
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由 Fabrizio Castro 提交于
Support RZ/G2E (a.k.a. R8A774C0) IPMMU. Signed-off-by: NFabrizio Castro <fabrizio.castro@bp.renesas.com> Reviewed-by: NGeert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: NSimon Horman <horms+renesas@verge.net.au> Signed-off-by: NJoerg Roedel <jroedel@suse.de>
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- 03 12月, 2018 1 次提交
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由 Paul Gortmaker 提交于
The Kconfig currently controlling compilation of this code is: drivers/iommu/Kconfig:config IPMMU_VMSA drivers/iommu/Kconfig: bool "Renesas VMSA-compatible IPMMU" ...meaning that it currently is not being built as a module by anyone. Lets remove the modular code that is essentially orphaned, so that when reading the driver there is no doubt it is builtin-only. Since module_init was not even used by this driver, the init ordering remains unchanged with this commit. We also delete the MODULE_LICENSE tag etc. since all that information was (or is now) contained at the top of the file in the comments. Also note that MODULE_DEVICE_TABLE is a no-op for non-modular code. Cc: Joerg Roedel <joro@8bytes.org> Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Cc: iommu@lists.linux-foundation.org Reviewed-by: NLaurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: NPaul Gortmaker <paul.gortmaker@windriver.com> Signed-off-by: NJoerg Roedel <jroedel@suse.de>
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