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  1. 28 2月, 2016 1 次提交
    • A
      ARM: imx: select ARM_CPU_SUSPEND only for imx6 · b4042a4c
      由 Arnd Bergmann 提交于 
      i.MX only needs to select ARM_CPU_SUSPEND manually for the
very specific case that CONFIG_PM_SLEEP is disabled and imx6
is used with CONFIG_PM enabled for runtime PM.

If we are building a kernel only for CPUs that are not using
the cpu_suspend() helper, we otherwise get a harmless
build warning:

warning: (ARCH_MXC && SOC_IMX23 && SOC_IMX28 && ARCH_PXA && MACH_MVEBU_V7 && ARCH_OMAP3 && ARCH_OMAP4 && SOC_OMAP5 && SOC_AM33XX && SOC_DRA7XX && ARCH_EXYNOS3 && ARCH_EXYNOS4 && EXYNOS5420_MCPM &&
EXYNOS_CPU_SUSPEND && ARCH_VEXPRESS_TC2_PM && ARM_BIG_LITTLE_CPUIDLE && ARM_HIGHBANK_CPUIDLE && QCOM_PM) selects ARM_CPU_SUSPEND which has unmet direct dependencies (ARCH_SUSPEND_POSSIBLE)

This moves the option to the SOC_IMX6 option that actually
requires it, in effect reverting commit f36b594f ("ARM:
mach-imx: Select ARM_CPU_SUSPEND at ARCH_MXC level") that was
meant as a cleanup and unintentionally caused this warning.
Signed-off-by: NArnd Bergmann <arnd@arndb.de>
Signed-off-by: NShawn Guo <shawnguo@kernel.org>
      b4042a4c
  3. 02 2月, 2016 1 次提交
  5. 28 1月, 2016 1 次提交
  7. 21 12月, 2015 1 次提交
  9. 02 12月, 2015 1 次提交
  11. 14 7月, 2015 1 次提交
  13. 03 6月, 2015 3 次提交
  15. 21 5月, 2015 1 次提交
    • S
      ARM: vf610: enable Cortex-M4 configuration on Vybrid SoC · 8064887e
      由 Stefan Agner 提交于 
      This patch allows to build the Kernel for Vybrid (VF6xx) SoC
when ARMv7-M CPU is selected. The resulting image runs on the
secondary Cortex-M4 core. This core has equally access to all
peripherals as the main Cortex-A5 core. However, there is no
resource control mechanism, hence when both cores are used
simultaneously, orthogonal device tree's are required.

The boot CPU is dependent on the SoC variant. The available
boards use mostly variants where the Cortex-A5 is the primary
and hence the boot CPU. Booting the secondary Cortex-M4 CPU
needs SoC specific registers written. There is no in kernel
support for this right now, a external userspace utility
called "m4boot" can be used to boot the kernel:

m4boot xipImage initramfs.cpio.lzo vf610m4-colibri.dtb
Signed-off-by: NStefan Agner <stefan@agner.ch>
Signed-off-by: NArnd Bergmann <arnd@arndb.de>
      8064887e
  17. 11 5月, 2015 1 次提交
  19. 13 3月, 2015 1 次提交
  21. 11 3月, 2015 3 次提交
  23. 08 3月, 2015 1 次提交
    • S
      irqchip: vf610-mscm-ir: Add support for Vybrid MSCM interrupt router · 0494e11a
      由 Stefan Agner 提交于 
      This adds support for Vybrid's interrupt router. On VF6xx models,
almost all peripherals can be used by either of the two CPU's,
the Cortex-A5 or the Cortex-M4. The interrupt router routes the
peripheral interrupts to the configured CPU.

This IRQ chip driver configures the interrupt router to route
the requested interrupt to the CPU the kernel is running on.
The driver makes use of the irqdomain hierarchy support. The
parent is given by the device tree. This should be one of the
two possible parents either ARM GIC or the ARM NVIC interrupt
controller. The latter is currently not yet supported.

Note that there is no resource control mechnism implemented to
avoid concurrent access of the same peripheral. The user needs
to make sure to use device trees which assign the peripherals
orthogonally. However, this driver warns the user in case the
interrupt is already configured for the other CPU. This provides
a poor man's resource controller.
Acked-by: NMarc Zyngier <marc.zyngier@arm.com>
Signed-off-by: NStefan Agner <stefan@agner.ch>
Link: https://lkml.kernel.org/r/1425249689-32354-2-git-send-email-stefan@agner.chSigned-off-by: NJason Cooper <jason@lakedaemon.net>
      0494e11a
  25. 06 3月, 2015 1 次提交
  27. 03 3月, 2015 1 次提交
  29. 26 2月, 2015 1 次提交
  31. 23 11月, 2014 3 次提交
  33. 16 9月, 2014 1 次提交
  35. 10 9月, 2014 1 次提交
  37. 01 9月, 2014 3 次提交
  39. 18 8月, 2014 1 次提交
  41. 23 7月, 2014 1 次提交
  43. 18 7月, 2014 7 次提交
  45. 19 6月, 2014 1 次提交
    • R
      ARM: l2c: fix dependencies on PL310 errata symbols · a641f3a6
      由 Russell King 提交于 
      A number of configurations spit out warnings similar to:

warning: (SOC_IMX6 && SOC_VF610 && ARCH_OMAP4) selects PL310_ERRATA_588369 which has unmet direct dependencies (CACHE_L2X0)
warning: (SOC_IMX6 && SOC_VF610 && ARCH_OMAP4) selects PL310_ERRATA_727915 which has unmet direct dependencies (CACHE_L2X0)

Clean up the dependencies here:
* PL310 symbols should only be selected when CACHE_L2X0 is enabled.
* Since the cache-l2x0 code detects PL310 presence at runtime, and we will
  eventually get rid of CACHE_PL310, surround these errata options with an
  if CACHE_L2X0 conditional rather than repeating the dependency against
  each.
Acked-by: NArnd Bergmann <arnd@arndb.de>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
      a641f3a6
  47. 17 6月, 2014 2 次提交
  49. 30 5月, 2014 1 次提交