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  1. 15 7月, 2015 1 次提交
  3. 09 7月, 2015 3 次提交
  5. 02 7月, 2015 1 次提交
  7. 12 6月, 2015 1 次提交
    • L
      ARM64: juno: add GPIO keys · 53bdd72c
      由 Linus Walleij 提交于 
      The Juno board has two keys connected to a PL061 GPIO block,
in accordance to DDI0524B "ARM Versatile Express Juno Development
Platform" revision 1.0, table 2-4 "GPIO (0) and GPIO (1) used
for additional user key entry". By trial-and-error I found that
these are connected to the two keys named "power" and "home"
on the motherboard.

Register the GPIO block and these two keys in the device tree
using the PL061 GPIO driver and the generic gpio keys.

- Map POWER, HOME, VOL+ and VOL- to the obvious input events.
- Map RLOCK to KEY_SCREENLOCK/KEY_COFFEE unless someone can
  explain better what this is for.
- Map the NMI button to KEY_SYSREQ as this is used like so
  in the SYSREQ debugging hack.
Acked-by: NLiviu Dudau <Liviu.Dudau@arm.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
Signed-off-by: NKevin Hilman <khilman@linaro.org>
      53bdd72c
  9. 06 6月, 2015 1 次提交
  11. 05 6月, 2015 1 次提交
  13. 01 6月, 2015 2 次提交
  15. 29 5月, 2015 1 次提交
  17. 22 5月, 2015 5 次提交
  19. 12 5月, 2015 2 次提交
    • M
      arm64: dts: kill skeleton.dtsi · 3ebee5a2
      由 Mark Rutland 提交于 
      While skeleton.dtsi was initially conceived as a simple way to bootstrap
writing a dts, it has proven to be problematic:

* The #address-cells and #size-cells values used in skeleton.dtsi may
  not match what a user wants (e.g. when they need to describe a range
  larger than 4GB).

* For dts files where memory nodes have unit-addresses, it adds a
  redundant /memory node, for which the reg entry may not be
  appropriately sized (e.g. where #size-cells has been overridden).

* For dts files which assume that a bootloader will fill in the memory
  node(s), no node is present in the dts (and hence there is no attached
  comment), making it hard to distinguish these cases from bad dts
  files, and masking any warnings dtc may produce w.r.t. missing nodes.

* The default empty /chosen and /aliases are somewhat useless, and it
  would be preferable for dts to fill these in (e.g. for
  /aliases/serial0 and /chosen/stdout-path).

This patch removes skeleton.dtsi from arm64. There are currently no
users, so we can remove it before any appear.
Signed-off-by: NMark Rutland <mark.rutland@arm.com>
Acked-by: NRob Herring <rob.herring@arm.com>
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Olof Johansson <olof@lixom.net>
Cc: Will Deacon <will.deacon@arm.com>
Signed-off-by: NArnd Bergmann <arnd@arndb.de>
      3ebee5a2
    • S
      ARM64: juno: add sp810 support and fix sp804 clock frequency · 3bb1555c
      由 Sudeep Holla 提交于 
      The clock generator in IOFPGA generates the two source clocks: 32kHz and
1MHz for the SP810 System Controller.

The SP810 System Controller selects 32kHz or 1MHz as the sources for
TIM_CLK[3:0], the SP804 timer clocks. The powerup default is 32kHz but
the maximum of "refclk" and "timclk" is chosen by the SP810 driver.

This patch adds support for SP810 system controller and also fixes the
SP804 timer clock frequency.

However the SP804 driver needs to be enabled on ARM64 to test this,
which requires SP804 driver to be moved out of arch/arm.

Fixes: 71f867ec ("arm64: Add Juno board device tree.")
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Will Deacon <will.deacon@arm.com>
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: Olof Johansson <olof@lixom.net>
Acked-by: NLiviu Dudau <Liviu.Dudau@arm.com>
Signed-off-by: NSudeep Holla <sudeep.holla@arm.com>
Signed-off-by: NArnd Bergmann <arnd@arndb.de>
      3bb1555c
  21. 11 5月, 2015 1 次提交
    • L
      arm64: juno: Add APB registers and LEDs using syscon · bfb47629
      由 Linus Walleij 提交于 
      This defines the Juno "APB system registers" as a syscon device,
and all the LEDs controlled by the APB system registers right
below it using the syscon LEDs driver on top of syscon. Define
LED0 for heartbeat, LED1 for MMC0 activity and the following
four LEDs indicating CPU activity using the Linux-specific
DT bindings for triggers.

This is the pattern and same drivers as used on the legacy
platform device trees for the ARM Integrators and the RealView
PB1176.

Cc: Arnd Bergmann <arnd@arndb.de>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Robin Murphy <robin.murphy@arm.com>
Cc: Pawel Moll <pawel.moll@arm.com>
Tested-by: NLiviu Dudau <Liviu.Dudau@arm.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
      bfb47629
  23. 04 5月, 2015 1 次提交
  25. 28 4月, 2015 4 次提交
  27. 04 4月, 2015 4 次提交
  29. 02 4月, 2015 1 次提交
  31. 30 3月, 2015 1 次提交
  33. 28 3月, 2015 1 次提交
  35. 19 3月, 2015 1 次提交
  37. 12 3月, 2015 2 次提交
  39. 10 3月, 2015 1 次提交
  41. 05 3月, 2015 1 次提交
  43. 26 2月, 2015 1 次提交
    • S
      arm64: Add L2 cache topology to ARM Ltd boards/models · 7934d69a
      由 Sudeep Holla 提交于 
      Commit 5d425c18 ("arm64: kernel: add support for cpu cache
information") adds cacheinfo support for ARM64. Since there's no
architectural way of detecting the cpus that share particular cache,
device tree can be used and the core cacheinfo already supports the
same.

This patch adds the L2 cache topology on Juno board, FVP/RTSM and
foundation models.
Signed-off-by: NSudeep Holla <sudeep.holla@arm.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Liviu Dudau <Liviu.Dudau@arm.com>
Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Signed-off-by: NArnd Bergmann <arnd@arndb.de>
      7934d69a
  45. 28 1月, 2015 1 次提交
  47. 26 1月, 2015 1 次提交
  49. 24 1月, 2015 1 次提交