- 30 11月, 2009 1 次提交
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由 Roel Kluin 提交于
The index is signed, make sure it is not negative when we read the array element. Signed-off-by: NRoel Kluin <roel.kluin@gmail.com> Signed-off-by: NArtem Bityutskiy <Artem.Bityutskiy@nokia.com> Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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- 06 4月, 2009 2 次提交
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由 Wolfgang Grandegger 提交于
The NAND flash on the TQM8548_BE modules requires a short delay after running the UPM pattern. The TQM8548_BE requires a further short delay after writing out a buffer. Normally the R/B pin should be checked, but it's not connected on the TQM8548_BE. The existing driver uses similar fixed delay points. To manage these extra delays in a more general way, I introduced the "fsl,ump-wait-flags" property allowing the board- specific driver to specify various types of extra delay. Signed-off-by: NWolfgang Grandegger <wg@grandegger.com> Acked-by: NAnton Vorontsov <avorontsov@ru.mvista.com> Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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由 Wolfgang Grandegger 提交于
This patch adds support for multi-chip NAND devices to the FSL-UPM driver. This requires support for multiple GPIOs for the RNB pins. The NAND chips are selected through address lines defined by the FDT property "fsl,upm-addr-line-cs-offsets". Signed-off-by: NWolfgang Grandegger <wg@grandegger.com> Acked-by: NAnton Vorontsov <avorontsov@ru.mvista.com> Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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- 07 1月, 2009 1 次提交
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由 Kay Sievers 提交于
CC: David Woodhouse <dwmw2@infradead.org> Signed-off-by: NKay Sievers <kay.sievers@vrfy.org> Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
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- 23 12月, 2008 1 次提交
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由 Kay Sievers 提交于
Signed-off-by: NKay Sievers <kay.sievers@vrfy.org> Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de> Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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- 27 11月, 2008 1 次提交
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由 Wolfgang Grandegger 提交于
The patch fixes following build error: CC drivers/mtd/nand/fsl_upm.o drivers/mtd/nand/fsl_upm.c: In function 'fun_chip_init': drivers/mtd/nand/fsl_upm.c:168: warning: passing argument 2 of 'of_mtd_parse_partitions' from incompatible pointer type drivers/mtd/nand/fsl_upm.c:168: warning: passing argument 3 of 'of_mtd_parse_partitions' from incompatible pointer type drivers/mtd/nand/fsl_upm.c:168: error: too many arguments to function 'of_mtd_parse_partitions' make[1]: *** [drivers/mtd/nand/fsl_upm.o] Error 1 The breakage was introduced in 69fd3a8d ("[MTD] remove unused mtd parameter in of_mtd_parse_partitions()"). While at it, also add a check for the of_mtd_parse_partitions() return value. Signed-off-by: NWolfgang Grandegger <wg@grandegger.com> Signed-off-by: NAnton Vorontsov <avorontsov@ru.mvista.com> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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- 10 10月, 2008 2 次提交
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由 Wolfgang Grandegger 提交于
This patch extends the FSL UPM NAND driver from Anton Vorontsov to support hardware which does not have the R/B pin of the NAND chip connected, like the TQM8548 module: - The OF_GPIO dependency has been removed from the Kconfig option because GPIO is not needed. The relevant gpio_* function are then stubbed out in <linux/gpio.h>. - It re-introduces the chip-delay property to define an appropriate maximum delay time (tR) required for read operations. The binding will be documented in a separate patch. Signed-off-by: NWolfgang Grandegger <wg@grandegger.com> Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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由 Anton Vorontsov 提交于
- Get rid of fsl,wait-pattern and fsl,wait-write. I think this isn't chip-specific, and we should always do waits. I saw one board that didn't need fsl,wait-pattern, but I assume this was the exception that proves the rule; - Get rid of chip-delay. Today there are no users for this, and if anyone really need this they should push the OF bindings beforehand; - Now flash chips should be child nodes of the FSL UPM NAND controller; - Implement OF partition parsing. Signed-off-by: NAnton Vorontsov <avorontsov@ru.mvista.com> Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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- 23 4月, 2008 1 次提交
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由 Anton Vorontsov 提交于
This is very simple driver, NAND is connected through localbus, and User-Programmable Machine is doing various adjustments to speak NAND. No special efforts needed to do read and write cycles, though to control ALE and CLE phases, we ask UPM to generate exact pre-programmed signals on the localbus lines. Signed-off-by: NAnton Vorontsov <avorontsov@ru.mvista.com> Signed-off-by: NDavid Woodhouse <dwmw2@infradead.org>
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