- 15 3月, 2010 1 次提交
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由 Magnus Damm 提交于
Update the Kconfig entry for the sh_flctl driver to enable build on SH-Mobile ARM platforms. Signed-off-by: NMagnus Damm <damm@opensource.se> Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
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- 27 2月, 2010 1 次提交
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由 Manuel Lauss 提交于
All Alchemy development boards have external CPLDs with a few registers in them. They all share an identical register layout with only a few minor differences (except the PB1000) in bit functions and base addresses. This patch - adds a primitive facility to initialize and use these external registers, - replaces all occurrences of bcsr->xxx accesses with calls to the new functions (the pb1200 cascade irq handling code is special). - collects BCSR register information scattered throughout the board headers in a central place. Signed-off-by: NManuel Lauss <manuel.lauss@gmail.com> Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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- 16 2月, 2010 1 次提交
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由 Vimal Singh 提交于
Introducing 'gpmc-nand.c' for GPMC specific NAND init. For example: GPMC timing parameters and all. This patch also migrates gpmc related calls from 'nand/omap2.c' to 'gpmc-nand.c'. Signed-off-by: NVimal Singh <vimalsingh@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 09 2月, 2010 1 次提交
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由 Daniel Mack 提交于
In particular, several occurances of funny versions of 'success', 'unknown', 'therefore', 'acknowledge', 'argument', 'achieve', 'address', 'beginning', 'desirable', 'separate' and 'necessary' are fixed. Signed-off-by: NDaniel Mack <daniel@caiaq.de> Cc: Joe Perches <joe@perches.com> Cc: Junio C Hamano <gitster@pobox.com> Signed-off-by: NJiri Kosina <jkosina@suse.cz>
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- 02 2月, 2010 2 次提交
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由 Magnus Damm 提交于
This patch extends the sh_flctl driver with support for 16-bit bus configuration using SEL_16BIT and support for multiplexed pins using SHBUSSEL. Signed-off-by: NMagnus Damm <damm@opensource.se> Acked-by: NYoshihiro Shimoda <shimoda.yoshihiro@renesas.com> Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
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由 Magnus Damm 提交于
This patch contains a few changes for the sh_flctl driver: - not sh7723-only driver - get rid of kconfig dependency - use dev_err() instead of printk() - use __devinit and __devexit for probe()/remove() - fix probe() return values Signed-off-by: NMagnus Damm <damm@opensource.se> Acked-by: NYoshihiro Shimoda <shimoda.yoshihiro@renesas.com> Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
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- 14 1月, 2010 1 次提交
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由 Baruch Siach 提交于
Signed-off-by: NBaruch Siach <baruch@tkos.co.il> Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>
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- 17 12月, 2009 1 次提交
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由 Ralf Baechle 提交于
The platform has never been fully merged Signed-off-by: NRalf Baechle <ralf@linux-mips.org> Cc: Thomas Koeller <thomas.koeller@baslerweb.com> Cc: David Woodhouse <dwmw2@infradead.org> Cc: Wim Van Sebroeck <wim@iguana.be> Cc: linux-kernel@vger.kernel.org Cc: linux-mtd@lists.infradead.org Acked-by: NDavid Woodhouse <David.Woodhouse@intel.com> Acked-by: NWim Van Sebroeck <wim@iguana.be>
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- 16 12月, 2009 1 次提交
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由 Alexey Dobriyan 提交于
Signed-off-by: NAlexey Dobriyan <adobriyan@gmail.com> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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- 07 12月, 2009 1 次提交
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由 Uwe Kleine-König 提交于
This reverts commit 82613b0d, because commit daa0f15a (mtd: don't use __exit_p to wrap mxcnd_remove) is a better solution. Not having a remove callback breaks rebinding because resources are not freed on remove. Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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- 04 12月, 2009 1 次提交
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由 André Goddard Rosa 提交于
That is "success", "unknown", "through", "performance", "[re|un]mapping" , "access", "default", "reasonable", "[con]currently", "temperature" , "channel", "[un]used", "application", "example","hierarchy", "therefore" , "[over|under]flow", "contiguous", "threshold", "enough" and others. Signed-off-by: NAndré Goddard Rosa <andre.goddard@gmail.com> Signed-off-by: NJiri Kosina <jkosina@suse.cz>
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- 01 12月, 2009 10 次提交
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I was going to play with a faulty nand image from real flash and noticed that nandsim does not work with: first_id_byte=0xec second_id_byte=0xd5 third_id_byte=0x51 fourth_id_byte=0xa6 This patch seems to fix it. Signed-off-by: NSebastian Andrzej Siewior <sebastian@breakpoint.cc> Signed-off-by: NArtem Bityutskiy <Artem.Bityutskiy@nokia.com> Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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由 Haojian Zhuang 提交于
Since the same nand controller is shared between ARCH_PXA and ARCH_MMP. Move the pxa3xx_nand.h from mach directory to plat directoy. Signed-off-by: NHaojian Zhuang <haojian.zhuang@marvell.com> Cc: David Woodhouse <david.woodhouse@intel.com> Signed-off-by: NEric Miao <eric.y.miao@gmail.com>
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由 Haojian Zhuang 提交于
MTD_NAND_PXA3xx module is shared between ARCH_PXA and ARCH_MMP. Update this configuration according to it. Signed-off-by: NHaojian Zhuang <haojian.zhuang@marvell.com> Signed-off-by: NEric Miao <eric.y.miao@gmail.com>
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由 Haojian Zhuang 提交于
Support samsung 2GbX8 and 32GbX8 nand flash. Support micron 4GbX8 and 4GbX16 nand flash. Signed-off-by: NHaojian Zhuang <haojian.zhuang@marvell.com> Signed-off-by: NEric Miao <eric.y.miao@gmail.com>
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由 Haojian Zhuang 提交于
In some bootloader, IRQ is enabled. Writing nand triggers unexpected interrupts. So disable nand irq in initialization. After nand initialized and in working state, irq is controlled by nand driver. Signed-off-by: NHaojian Zhuang <haojian.zhuang@marvell.com> Signed-off-by: NEric Miao <eric.y.miao@gmail.com>
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由 Haojian Zhuang 提交于
Nand driver uses IRQ_NAND as hardcode irq number. In ARCH_MMP, the irq number is different. So get irq resource from platform device structure and use it in initialization and deinitialization code. Signed-off-by: NHaojian Zhuang <haojian.zhuang@marvell.com> Signed-off-by: NEric Miao <eric.y.miao@gmail.com>
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由 Haojian Zhuang 提交于
Although nand controller is same between PXA3xx and MMP, the register space is different. Remove the hardcode register address setting in pxa3xx_nand.h. Signed-off-by: NHaojian Zhuang <haojian.zhuang@marvell.com> Signed-off-by: NEric Miao <eric.y.miao@gmail.com>
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由 Haojian Zhuang 提交于
Slow down the tRp of Micron NAND flash timing. Signed-off-by: NHaojian Zhuang <haojian.zhuang@marvell.com> Signed-off-by: NEric Miao <eric.y.miao@gmail.com>
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由 Haojian Zhuang 提交于
Initialize the read buffer content to 0xFF. Signed-off-by: NHaojian Zhuang <haojian.zhuang@marvell.com> Signed-off-by: NEric Miao <eric.y.miao@gmail.com>
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由 Haojian Zhuang 提交于
When fetch nand data with non-DMA mode, we should align info->data_size to 32bit, not 8bit. Signed-off-by: NHaojian Zhuang <haojian.zhuang@marvell.com> Signed-off-by: NEric Miao <eric.y.miao@gmail.com>
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- 30 11月, 2009 16 次提交
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由 David Hunter 提交于
The shift operator used here to convert from bytes to 32-bit words is backwards. Signed-off-by: NDavid Hunter <hunterd42@gmail.com> Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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由 Li Yang 提交于
Symptom: device_suspend(): mtd_cls_suspend+0x0/0x58 returns -11 PM: Device mtd14 failed to suspend: error -11 PM: Some devices failed to suspend This patch enables other chips to be suspended if the active chip of the controller has been suspended. Signed-off-by: NJin Qing <b24347@freescale.com> Signed-off-by: NLi Yang <leoli@freescale.com> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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由 Mark A. Greer 提交于
The existing NAND infrastructure allows the default main and mirror bad block tables to be overridden in nand_default_bbt(). However, the davinci_nand driver does not support this. Add that support by adding fields to the davinci driver's platform data so platform code can pass in their own bbt's and make the davinci_nand driver honor them. Signed-off-by: NMark A. Greer <mgreer@mvista.com> Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com> CC: Sudhakar Rajashekhara <sudhakar.raj@ti.com> Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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由 Uwe Kleine-König 提交于
The function mxcnd_remove is defined using __devexit, so don't use __exit_p but __devexit_p to wrap it. Signed-off-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: NArtem Bityutskiy <Artem.Bityutskiy@nokia.com> Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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由 Uwe Kleine-König 提交于
The function excite_nand_remove is used only wrapped by __devexit_p so define it using __devexit. Signed-off-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: NArtem Bityutskiy <Artem.Bityutskiy@nokia.com> Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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由 Scott Wood 提交于
We want error information even if the kernel hasn't been built for verbose debugging. Signed-off-by: NScott Wood <scottwood@freescale.com> Signed-off-by: NArtem Bityutskiy <Artem.Bityutskiy@nokia.com> Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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由 Scott Wood 提交于
Currently, the program and erase sequences do not wait for completion, instead relying on a subsequent waitfunc() callback. However, this causes the chipselect to be deasserted while the NAND chip is still asserting the busy pin, which can corrupt activity on other chipselects. This patch switches to using the sequences recommended by the manual, in which a wait is performed within the initial command sequence. We can now re-use the status byte from the initial command sequence, rather than having to do another status read in the waitfunc. Since we're already touching the command sequences, it also cleans up some cruft in SEQIN that isn't needed since we cannot program partial pages outside of OOB. Signed-off-by: NScott Wood <scottwood@freescale.com> Reported-by: NSuchit Lepcha <suchit.lepcha@freescale.com> Signed-off-by: NArtem Bityutskiy <Artem.Bityutskiy@nokia.com> Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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由 Scott Wood 提交于
When a NAND operation is in progress, all other localbus operations (including NOR flash) will have to wait for access to the bus. However, the NAND operation may take longer to complete than the default timeout. Thus, if NOR is accessed while a NAND operation is in progress, the NAND operation will fail. Signed-off-by: NScott Wood <scottwood@freescale.com> Signed-off-by: NArtem Bityutskiy <Artem.Bityutskiy@nokia.com> Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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由 Akinobu Mita 提交于
Signed-off-by: NAkinobu Mita <akinobu.mita@gmail.com> Signed-off-by: NArtem Bityutskiy <Artem.Bityutskiy@nokia.com> Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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由 Roel Kluin 提交于
Return a negative error value instead of a positive Signed-off-by: NRoel Kluin <roel.kluin@gmail.com> Signed-off-by: NArtem Bityutskiy <Artem.Bityutskiy@nokia.com> Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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由 Roel Kluin 提交于
The index is signed, make sure it is not negative when we read the array element. Signed-off-by: NRoel Kluin <roel.kluin@gmail.com> Signed-off-by: NArtem Bityutskiy <Artem.Bityutskiy@nokia.com> Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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由 Ben Dooks 提交于
Update the nand information passed to the core from the platform data to setup the initial option value, so that flags such as NAND_SCAN_SILENT_NODEV can pass through. Signed-off-by: NBen Dooks <ben@simtec.co.uk> Signed-off-by: NSimtec Linux Team <linux@simtec.co.uk> Signed-off-by: NArtem Bityutskiy <Artem.Bityutskiy@nokia.com> Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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由 Ben Dooks 提交于
Add NAND_SCAN_SILENT_NODEV to chip->options to the user-worrying messages 'No NAND device found!!!'. This message often worries users (was three exclamation marks really necessary?) and especially in systems such as the Simtec Osiris where there may be optional NAND devices which are not known until probe time. Revised version of the original NAND_PROBE_SPECULATIVE patch after comments by Artem Bityutskiy about adding a whole new call. Signed-off-by: NBen Dooks <ben@simtec.co.uk> Signed-off-by: NSimtec Linux Team <linux@simtec.co.uk> Signed-off-by: NArtem Bityutskiy <Artem.Bityutskiy@nokia.com> Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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由 Atsushi Nemoto 提交于
This patch fixes memory leak on chip->bbt and chip->buffers. Signed-off-by: NAtsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: NArtem Bityutskiy <Artem.Bityutskiy@nokia.com> Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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由 Simon Kagstrom 提交于
This is a quick and dirty patch to add panic_write for NAND flashes. The patch seems to work OK on my CRIS board running a 2.6.26 kernel with a ID: 0x20, Chip ID: 0xf1 (ST Micro NAND 128MiB 3,3V 8-bit), and also on a OpenRD base (Marvell Kirkwood) board with a Toshiba NAND 512MiB 3,3V 8-bit flash with 2.6.32-pre1. Signed-off-by: NEdgar E. Iglesias <edgar@axis.com> Signed-off-by: NSimon Kagstrom <simon.kagstrom@netinsight.net> Signed-off-by: NArtem Bityutskiy <Artem.Bityutskiy@nokia.com> Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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由 Akinobu Mita 提交于
Add __nand_calculate_ecc() which does not take struct mtd_info. The built-in 256/512 software ECC calculation and correction tester will use it. Signed-off-by: NAkinobu Mita <akinobu.mita@gmail.com> Acked-by: NVimal Singh <vimalsingh@ti.com> Signed-off-by: NArtem Bityutskiy <Artem.Bityutskiy@nokia.com> Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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- 12 11月, 2009 3 次提交
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由 Sascha Hauer 提交于
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>
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由 Sascha Hauer 提交于
wait_op_done is only called with the same timeout, so code the timeout into the function itself. Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>
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由 Sascha Hauer 提交于
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>
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