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  1. 22 1月, 2015 5 次提交
    • B
      drm/nouveau/msvld: separate from bsp · eccf7e8a
      由 Ben Skeggs 提交于 
      Switch to NVIDIA's name for the device.

The namespace of NVKM is being changed to nvkm_ instead of nouveau_,
which will be used for the DRM part of the driver.  This is being
done in order to make it very clear as to what part of the driver a
given symbol belongs to, and as a minor step towards splitting the
DRM driver out to be able to stand on its own (for virt).

Because there's already a large amount of churn here anyway, this is
as good a time as any to also switch to NVIDIA's device and chipset
naming to ease collaboration with them.
Signed-off-by: NBen Skeggs <bskeggs@redhat.com>
      eccf7e8a
    • B
      drm/nouveau/mmu: rename from vmmgr (no binary change) · 5ce3bf3c
      由 Ben Skeggs 提交于 
      Switch to NVIDIA's name for the device.

The namespace of NVKM is being changed to nvkm_ instead of nouveau_,
which will be used for the DRM part of the driver.  This is being
done in order to make it very clear as to what part of the driver a
given symbol belongs to, and as a minor step towards splitting the
DRM driver out to be able to stand on its own (for virt).

Because there's already a large amount of churn here anyway, this is
as good a time as any to also switch to NVIDIA's device and chipset
naming to ease collaboration with them.

A comparison of objdump disassemblies proves no code changes.
Signed-off-by: NBen Skeggs <bskeggs@redhat.com>
      5ce3bf3c
    • B
      drm/nouveau/pmu: rename from pwr (no binary change) · ebb58dc2
      由 Ben Skeggs 提交于 
      Switch to NVIDIA's name for the device.

The namespace of NVKM is being changed to nvkm_ instead of nouveau_,
which will be used for the DRM part of the driver.  This is being
done in order to make it very clear as to what part of the driver a
given symbol belongs to, and as a minor step towards splitting the
DRM driver out to be able to stand on its own (for virt).

Because there's already a large amount of churn here anyway, this is
as good a time as any to also switch to NVIDIA's device and chipset
naming to ease collaboration with them.

A comparison of objdump disassemblies proves no code changes.
Signed-off-by: NBen Skeggs <bskeggs@redhat.com>
      ebb58dc2
    • B
      drm/nouveau/clk: rename from clock (no binary change) · f3867f43
      由 Ben Skeggs 提交于 
      Rename to match the Linux subsystem responsible for the same kind of
things.  Will be investigating how feasible it will be to expose the
GPU clock trees with it at some point.

The namespace of NVKM is being changed to nvkm_ instead of nouveau_,
which will be used for the DRM part of the driver.  This is being
done in order to make it very clear as to what part of the driver a
given symbol belongs to, and as a minor step towards splitting the
DRM driver out to be able to stand on its own (for virt).

Because there's already a large amount of churn here anyway, this is
as good a time as any to also switch to NVIDIA's device and chipset
naming to ease collaboration with them.

A comparison of objdump disassemblies proves no code changes.
Signed-off-by: NBen Skeggs <bskeggs@redhat.com>
      f3867f43
    • B
      drm/nouveau: remove symlinks, move core/ to nvkm/ (no code changes) · c39f472e
      由 Ben Skeggs 提交于 
      The symlinks were annoying some people, and they're not used anywhere
else in the kernel tree.  The include directory structure has been
changed so that symlinks aren't needed anymore.

NVKM has been moved from core/ to nvkm/ to make it more obvious as to
what the directory is for, and as some minor prep for when NVKM gets
split out into its own module (virt) at a later date.
Signed-off-by: NBen Skeggs <bskeggs@redhat.com>
      c39f472e
  3. 02 12月, 2014 1 次提交
  5. 15 9月, 2014 2 次提交
  7. 10 8月, 2014 3 次提交
  9. 18 6月, 2014 1 次提交
  11. 11 6月, 2014 3 次提交
  13. 26 3月, 2014 3 次提交
  15. 23 1月, 2014 2 次提交
  17. 07 1月, 2014 1 次提交
  19. 14 11月, 2013 1 次提交
  21. 08 11月, 2013 9 次提交
  23. 05 7月, 2013 3 次提交
  25. 01 7月, 2013 1 次提交
  27. 20 5月, 2013 1 次提交
    • B
      drm/nvc0/ce: disable ce1 on a number of chipsets · 6d5f8383
      由 Ben Skeggs 提交于 
      The falcon is present, but the rest of the copy engine doesn't appear to
be...  PUNITS doesn't report disabled (maybe the bits for the copy engines
got added later?), so we end up trying to use a non-functional CE1, and
bust all sorts of things.. Most notably, suspend/resume..

Cc: stable@vger.kernel.org
Signed-off-by: NBen Skeggs <bskeggs@redhat.com>
      6d5f8383
  29. 26 4月, 2013 2 次提交
  31. 20 2月, 2013 2 次提交
    • B
      drm/nouveau/i2c: create proper chipset-specific class implementations · 7dcd060c
      由 Ben Skeggs 提交于 
      Signed-off-by: NBen Skeggs <bskeggs@redhat.com>
      7dcd060c
    • M
      drm/nouveau/pbus: add a PBUS subdev that hands IRQs to the right subdevs · a10220bb
      由 Martin Peres 提交于 
      We are going to use PTHERM's IRQs for thermal monitoring but we need to route
them first.

On nv31-50, PBUS's IRQ line is shared with GPIOs IRQs.

It seems like nv10-31 GPIO interruptions aren't well handled. I kept the
original behaviour but it is wrong and may lead to an IRQ storm.

Since we enable all PBUS IRQs, we need a way to avoid being stormed if we
don't handle them. The solution I used was to mask the IRQs that have not been
handled. This will also print one message in the logs to let us know.

v2: drop the shared intr handler because of was racy
v3: style fixes
v4: drop a useless construct in the chipset-dependent INTR
v5: add BUS to the disable mask
v6 (Ben Skeggs):
- general tidy to match the rest of the driver's style
- nva3->nvc0, nva3 can be serviced just fine with nv50.c, rnndb even notes
  that the THERM_ALARM bit got left in the hw until fermi anyway.. so, it's
  not going to conflict
- removed the peephole and user stuff, for the moment.. will handle them
  later if we find a good reason to actually care..
- limited INTR_EN to just what we can handle for now, mostly to prevent
  spam of unknown status bits (seen on at least nv4x)
Signed-off-by: NBen Skeggs <bskeggs@redhat.com>
Signed-off-by: NMartin Peres <martin.peres@labri.fr>
      a10220bb