1. 22 1月, 2015 8 次提交
  2. 02 12月, 2014 4 次提交
  3. 15 9月, 2014 1 次提交
  4. 10 8月, 2014 9 次提交
  5. 26 3月, 2014 2 次提交
    • A
      support for platform devices · 420b9469
      Alexandre Courbot 提交于
      Upcoming mobile Kepler GPUs (such as GK20A) use the platform bus instead
      of PCI to which Nouveau is tightly dependent. This patch allows Nouveau
      to handle platform devices by:
      
      - abstracting PCI-dependent functions that were typically used for
        resource querying and page mapping,
      - introducing a nv_device_is_pci() function that allows to make
        PCI-dependent code conditional,
      - providing a nouveau_drm_platform_probe() function that takes a GPU
        platform device to be probed.
      
      Core code as well as engine/subdev drivers are updated wherever possible
      to make use of these functions. Some older drivers are too dependent on
      PCI to be properly updated, but all newer code on which future chips may
      depend should at least be runnable with platform devices.
      Signed-off-by: NAlexandre Courbot <acourbot@nvidia.com>
      Signed-off-by: NBen Skeggs <bskeggs@redhat.com>
      420b9469
    • B
      drm/gm100/device: recognise GM107 · 3f204647
      Ben Skeggs 提交于
      Signed-off-by: NBen Skeggs <bskeggs@redhat.com>
      3f204647
  6. 07 1月, 2014 1 次提交
  7. 08 11月, 2013 8 次提交
  8. 02 5月, 2013 1 次提交
  9. 26 4月, 2013 4 次提交
  10. 20 2月, 2013 2 次提交
    • M
      drm/nouveau: mark nv_printk_ as printf-like function · 950fbfab
      Marcin Slusarz 提交于
      ...and fix all warnings
      Signed-off-by: NMarcin Slusarz <marcin.slusarz@gmail.com>
      Signed-off-by: NBen Skeggs <bskeggs@redhat.com>
      950fbfab
    • M
      drm/nouveau/pbus: add a PBUS subdev that hands IRQs to the right subdevs · a10220bb
      Martin Peres 提交于
      We are going to use PTHERM's IRQs for thermal monitoring but we need to route
      them first.
      
      On nv31-50, PBUS's IRQ line is shared with GPIOs IRQs.
      
      It seems like nv10-31 GPIO interruptions aren't well handled. I kept the
      original behaviour but it is wrong and may lead to an IRQ storm.
      
      Since we enable all PBUS IRQs, we need a way to avoid being stormed if we
      don't handle them. The solution I used was to mask the IRQs that have not been
      handled. This will also print one message in the logs to let us know.
      
      v2: drop the shared intr handler because of was racy
      v3: style fixes
      v4: drop a useless construct in the chipset-dependent INTR
      v5: add BUS to the disable mask
      v6 (Ben Skeggs):
      - general tidy to match the rest of the driver's style
      - nva3->nvc0, nva3 can be serviced just fine with nv50.c, rnndb even notes
        that the THERM_ALARM bit got left in the hw until fermi anyway.. so, it's
        not going to conflict
      - removed the peephole and user stuff, for the moment.. will handle them
        later if we find a good reason to actually care..
      - limited INTR_EN to just what we can handle for now, mostly to prevent
        spam of unknown status bits (seen on at least nv4x)
      Signed-off-by: NBen Skeggs <bskeggs@redhat.com>
      Signed-off-by: NMartin Peres <martin.peres@labri.fr>
      a10220bb