- 12 1月, 2013 1 次提交
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由 Felix Fietkau 提交于
Improves stability on affected devices and also fixes the Tx IQ calibration related regression on some AR9340 devices such as the TP-Link TL-WDR4300. Signed-off-by: NFelix Fietkau <nbd@openwrt.org> Signed-off-by: NJohn W. Linville <linville@tuxdriver.com>
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- 08 1月, 2013 1 次提交
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由 Sujith Manoharan 提交于
Signed-off-by: NSujith Manoharan <c_manoha@qca.qualcomm.com> Signed-off-by: NJohn W. Linville <linville@tuxdriver.com>
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- 30 10月, 2012 4 次提交
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由 Rajkumar Manoharan 提交于
Whenever WLAN receives scheduling msg from BT, it reduces tx power based on RSSI level. And then BT starts simultaneous transmission along with WLAN. Sometimes HW MAC compares tx power that is used prior to power reduction which is causing BT transmission to defer. Signed-off-by: NRajkumar Manoharan <rmanohar@qca.qualcomm.com> Signed-off-by: NJohn W. Linville <linville@tuxdriver.com>
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由 Rajkumar Manoharan 提交于
Signed-off-by: NRajkumar Manoharan <rmanohar@qca.qualcomm.com> Signed-off-by: NJohn W. Linville <linville@tuxdriver.com>
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由 Rajkumar Manoharan 提交于
Signed-off-by: NRajkumar Manoharan <rmanohar@qca.qualcomm.com> Signed-off-by: NJohn W. Linville <linville@tuxdriver.com>
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由 Rajkumar Manoharan 提交于
Signed-off-by: NRajkumar Manoharan <rmanohar@qca.qualcomm.com> Signed-off-by: NJohn W. Linville <linville@tuxdriver.com>
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- 12 9月, 2012 1 次提交
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由 Sujith Manoharan 提交于
And recognize the device in the init path. Signed-off-by: NSujith Manoharan <c_manoha@qca.qualcomm.com> Signed-off-by: NJohn W. Linville <linville@tuxdriver.com>
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- 13 7月, 2012 1 次提交
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由 Mohammed Shafi Shajakhan 提交于
*MAC WoW registers back-off shift, MAC interrupt enable, magic packet enable, pattern match enable, aifs, slot wait period, keep alive frame failure count, beacon fail enable, beacon timeout, keep alive timeout, auto keep alive disable, keep alive fail disable and their corresponding status registers. keep alive frame delay, pattern end/byte offsets, transmit buffers for keep alive frames and storing the user patterns *Power Management Control registers pme_d3cold_vaux, host_pme_enable, aux_pwr_detect, power_state_mask, wow_pme_clear Cc: Senthil Balasubramanian <senthilb@qca.qualcomm.com> Cc: Rajkumar Manoharan <rmanohar@qca.qualcomm.com> Cc: vadivel@qca.qualcomm.com Signed-off-by: NLuis R. Rodriguez <mcgrof@qca.qualcomm.com> Signed-off-by: NMohammed Shafi Shajakhan <mohammed@qca.qualcomm.com> Signed-off-by: NJohn W. Linville <linville@tuxdriver.com>
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- 11 7月, 2012 1 次提交
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由 Rajkumar Manoharan 提交于
Remove the CONT_* and LNA_* messages from AR_MCI_INTERRUPT_RX_MSG_DEFAULT. Those MCI rx messages only meant for debugging purpose. Including them in default rx_msg series could raise huge amount of MCI interrupts when BT traffic is going on. And also it increases power consumption when WLAN is scanning. Signed-off-by: NRajkumar Manoharan <rmanohar@qca.qualcomm.com> Signed-off-by: NJohn W. Linville <linville@tuxdriver.com>
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- 10 7月, 2012 2 次提交
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由 Gabor Juhos 提交于
Signed-off-by: NGabor Juhos <juhosg@openwrt.org> Acked-by: NLuis R. Rodriguez <mcgrof@qca.qualcomm.com> Signed-off-by: NJohn W. Linville <linville@tuxdriver.com>
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由 Thomas Huehn 提交于
Some register values of bit shifts are corrected in order to support the upcoming transmission power control (tpc) for control packets as well. Signed-off-by: NThomas Huehn <thomas@net.t-labs.tu-berlin.de> Signed-off-by: NJohn W. Linville <linville@tuxdriver.com>
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- 21 6月, 2012 1 次提交
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由 Rajkumar Manoharan 提交于
WLAN driver initialization is muting BT which is terminating the ongoing BT traffic. The reason to mute BT is to avoid any incoming MCI messages from BT when MCI reset is in progress that could corrupt WLAN MCI RX state machine. But we should not dedicate radio completely to WLAN in driver init itself. So this patch removes the wlan weightage changes from mute BT to retain BT connection. Signed-off-by: NRajkumar Manoharan <rmanohar@qca.qualcomm.com> Signed-off-by: NJohn W. Linville <linville@tuxdriver.com>
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- 14 6月, 2012 1 次提交
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由 Rajkumar Manoharan 提交于
Signed-off-by: NRajkumar Manoharan <rmanohar@qca.qualcomm.com> Signed-off-by: NJohn W. Linville <linville@tuxdriver.com>
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- 07 6月, 2012 1 次提交
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由 Rajkumar Manoharan 提交于
Enable WLAN and BT mode for switching regulator discontinuous orverride for AR9462 chips. Signed-off-by: NRajkumar Manoharan <rmanohar@qca.qualcomm.com> Signed-off-by: NJohn W. Linville <linville@tuxdriver.com>
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- 13 3月, 2012 1 次提交
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由 Mohammed Shafi Shajakhan 提交于
tested in AR9462 Rev:2, both hardware capability flag are set Signed-off-by: NMohammed Shafi Shajakhan <mohammed@qca.qualcomm.com> Signed-off-by: NJohn W. Linville <linville@tuxdriver.com>
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- 28 2月, 2012 1 次提交
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由 Sujith Manoharan 提交于
v1.0 chips are not available in the market. Signed-off-by: NSujith Manoharan <c_manoha@qca.qualcomm.com> Signed-off-by: NJohn W. Linville <linville@tuxdriver.com>
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- 01 12月, 2011 2 次提交
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由 Mohammed Shafi Shajakhan 提交于
send halt BT GPM if the chip is in network sleep and BT state is awake Cc: Wilson Tsao <wtsao@qca.qualcomm.com> Cc: Senthil Balasubramanian <senthilb@qca.qualcomm.com> Signed-off-by: NRajkumar Manoharan <rmanohar@qca.qualcomm.com> Signed-off-by: NMohammed Shafi Shajakhan <mohammed@qca.qualcomm.com> Signed-off-by: NJohn W. Linville <linville@tuxdriver.com>
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由 Mohammed Shafi Shajakhan 提交于
these definitions will be used by MCI state machine and the corresponding hardware code Cc: Wilson Tsao <wtsao@qca.qualcomm.com> Cc: Senthil Balasubramanian <senthilb@qca.qualcomm.com> Signed-off-by: NRajkumar Manoharan <rmanohar@qca.qualcomm.com> Signed-off-by: NMohammed Shafi Shajakhan <mohammed@qca.qualcomm.com> Signed-off-by: NJohn W. Linville <linville@tuxdriver.com>
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- 18 11月, 2011 2 次提交
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由 Rajkumar Manoharan 提交于
Signed-off-by: NRajkumar Manoharan <rmanohar@qca.qualcomm.com> Signed-off-by: NJohn W. Linville <linville@tuxdriver.com>
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由 Rajkumar Manoharan 提交于
Remove all wlan weight macros and group it together for better understanding & readability. It makes the code reusable for AR9462 wlan weights. Signed-off-by: NRajkumar Manoharan <rmanohar@qca.qualcomm.com> Signed-off-by: NJohn W. Linville <linville@tuxdriver.com>
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- 15 10月, 2011 2 次提交
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由 Rajkumar Manoharan 提交于
Renamed to be in sync with Marketing term and to avoid confusion with other chip names. Signed-off-by: NRajkumar Manoharan <rmanohar@qca.qualcomm.com> Signed-off-by: NJohn W. Linville <linville@tuxdriver.com>
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由 Rajkumar Manoharan 提交于
Supported calibrations of radio retention table (RTT) are - DC offset - Filter - Peak detect Signed-off-by: NRajkumar Manoharan <rmanohar@qca.qualcomm.com> Signed-off-by: NJohn W. Linville <linville@tuxdriver.com>
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- 20 9月, 2011 1 次提交
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由 Felix Fietkau 提交于
- AR_SREV_5416_20_OR_LATER is always true, remove it - AR_SREV_9280_20_OR_LATER is always true within eeprom_4k.c and eeprom_9287.c - (AR_SREV_9271 || AR_SREV_9285) is always true in eeprom_4k.c Signed-off-by: NFelix Fietkau <nbd@openwrt.org> Signed-off-by: NJohn W. Linville <linville@tuxdriver.com>
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- 17 9月, 2011 1 次提交
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由 Senthil Balasubramanian 提交于
Add initvals and register modifications required to support AR946/8x chipsets. Signed-off-by: NSenthil Balasubramanian <senthilb@qca.qualcomm.com> Signed-off-by: NJohn W. Linville <linville@tuxdriver.com>
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- 14 9月, 2011 1 次提交
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由 Felix Fietkau 提交于
The commit "ath9k_hw: Fix exceed transmission burst-time of 5GHz" added a padding of 60 delimiters on the first subframe to work around an issue on AR9380, but it lacked the checks to prevent it from being applied to pre-AR9380, enterprise AR9380 or AR9580+ Signed-off-by: NFelix Fietkau <nbd@openwrt.org> Cc: Rajkumar Manoharan <rmanohar@qca.qualcomm.com> Signed-off-by: NJohn W. Linville <linville@tuxdriver.com>
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- 30 8月, 2011 1 次提交
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由 Rajkumar Manoharan 提交于
For AR9287 v1.3+ chips, MAC runs at 117MHz. But the initvals IFS parameters are loaded based on 44/88MHz clockrate. So eifs/usec from ini should not be used for AR9287 v1.3+. The mentioned values are tested on 2 chain HT40 mode. Signed-off-by: NRajkumar Manoharan <rmanohar@qca.qualcomm.com> Signed-off-by: NJohn W. Linville <linville@tuxdriver.com>
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- 26 8月, 2011 1 次提交
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由 Luis R. Rodriguez 提交于
Here are the AR9580 1.0 initvals checksums using the Atheros initvals-tools [1]. This is useful for when we udate the initvals again with other values. It ensures that we match the same initvals used internally. The tool is documented on the wiki [2]. $ ./initvals -f ar9580-1p0 0x00000000e912711f ar9580_1p0_modes_fast_clock 0x000000004a488fc7 ar9580_1p0_radio_postamble 0x00000000f3888b02 ar9580_1p0_baseband_core 0x0000000003f783bb ar9580_1p0_mac_postamble 0x0000000094be244a ar9580_1p0_low_ob_db_tx_gain_table 0x0000000094be244a ar9580_1p0_high_power_tx_gain_table 0x0000000090be244a ar9580_1p0_lowest_ob_db_tx_gain_table 0x00000000ed9eaac6 ar9580_1p0_baseband_core_txfir_coeff_japan_2484 0x00000000c4d66d1b ar9580_1p0_mac_core 0x00000000e8e9043a ar9580_1p0_mixed_ob_db_tx_gain_table 0x000000003521a300 ar9580_1p0_wo_xlna_rx_gain_table 0x00000000301fc841 ar9580_1p0_soc_postamble 0x00000000a9a06b3a ar9580_1p0_high_ob_db_tx_gain_table 0x00000000a15ccf1b ar9580_1p0_soc_preamble 0x0000000029495000 ar9580_1p0_rx_gain_table 0x0000000037ac0ee8 ar9580_1p0_radio_core 0x00000000603a1b80 ar9580_1p0_baseband_postamble 0x000000003d8b4396 ar9580_1p0_pcie_phy_clkreq_enable_L1 0x00000000398b4396 ar9580_1p0_pcie_phy_clkreq_disable_L1 0x00000000397b4396 ar9580_1p0_pcie_phy_pll_on_clkreq [1] git://git.kernel.org/pub/scm/linux/kernel/git/mcgrof/initvals-tool.git [2] http://wireless.kernel.org/en/users/Drivers/ath9k_hw/initvals-tool Cc: David Quan <dquan@qca.qualcomm.com> Cc: Kathy Giori <kgiori@qca.qualcomm.com> Cc: Senthil Balasubramanian <senthilb@qca.qualcomm.com> Tested-by: NFlorian Fainelli <florian@openwrt.org> Signed-off-by: NLuis R. Rodriguez <mcgrof@qca.qualcomm.com> Signed-off-by: NJohn W. Linville <linville@tuxdriver.com>
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- 19 7月, 2011 1 次提交
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由 Pavel Roskin 提交于
Signed-off-by: NPavel Roskin <proski@gnu.org> Signed-off-by: NJohn W. Linville <linville@tuxdriver.com>
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- 12 7月, 2011 1 次提交
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由 Felix Fietkau 提交于
Now that the clock rate is initialized properly and SIFS, EIFS, USEC, slot time and ACK timeout are properly calculated by the generic code, the 'async FIFO' register hacks are no longer necessary. Signed-off-by: NFelix Fietkau <nbd@openwrt.org> Signed-off-by: NJohn W. Linville <linville@tuxdriver.com>
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- 23 6月, 2011 1 次提交
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由 Gabor Juhos 提交于
Signed-off-by: NGabor Juhos <juhosg@openwrt.org> Signed-off-by: NJohn W. Linville <linville@tuxdriver.com>
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- 20 5月, 2011 1 次提交
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由 Sujith Manoharan 提交于
The Times They Are a-Changin'. Signed-off-by: NSujith Manoharan <Sujith.Manoharan@atheros.com> Signed-off-by: NJohn W. Linville <linville@tuxdriver.com>
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- 29 4月, 2011 1 次提交
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由 Vivek Natarajan 提交于
Signed-off-by: NVivek Natarajan <vnatarajan@atheros.com> Signed-off-by: NJohn W. Linville <linville@tuxdriver.com>
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- 27 4月, 2011 1 次提交
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由 Rajkumar Manoharan 提交于
On AR9003 chips, doing three IQ calibrations will possibly cause chip in stuck state. In noisy environment, chip could receive a packet during the middle of three calibrations and it causes the conflict of HW access and the eventual failure. It also causes IQ calibration outliers which results in poor Tx EVM. The IQ Cal procedure is after resetting the chip, run IQ cal 3 times per each cal cycle and find the two closest readings and average of two. The advantage of running Tx IQ cal more than once is that we can compare calibration results for the same gain setting over multiple iterations. Most of the cases the IQ failures were observed after first pass. For the AR9485 and later chips, Tx IQ Calibration is performed along with AGC cal. But for pre-AR9485 chips, Tx IQ cal HW has to be separated from the rest of calibration HW to avoid chip hang. After all calibrations are done in HW, we can start SW post-processing. By doing this way, we minimize the SW difference among all chips. The order of calibration (run IQ cal before other calibration) is also needed to avoid chip hang for chips before AR9485. This issue was originally observed with AR9382. During the issue kernel log was filled with following message ath: timeout (100000 us) on reg 0xa640: 0x00000001 & 0x00000001 != 0x00000000 ath: timeout (100000 us) on reg 0xa2c4: 0x00158dd9 & 0x00000001 != 0x00000000 ath: Unable to reset channel (2412 MHz), reset status -5 ath: Unable to set channel Signed-off-by: NRajkumar Manoharan <rmanoharan@atheros.com> Signed-off-by: NJohn W. Linville <linville@tuxdriver.com>
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- 26 4月, 2011 3 次提交
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Signed-off-by: NVasanthakumar Thiagarajan <vasanth@atheros.com> Signed-off-by: NJohn W. Linville <linville@tuxdriver.com>
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Signed-off-by: NVasanthakumar Thiagarajan <vasanth@atheros.com> Signed-off-by: NJohn W. Linville <linville@tuxdriver.com>
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Signed-off-by: NVasanthakumar Thiagarajan <vasanth@atheros.com> Signed-off-by: NJohn W. Linville <linville@tuxdriver.com>
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- 13 4月, 2011 2 次提交
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This fixes random disconnect. Signed-off-by: NVasanthakumar Thiagarajan <vasanth@atheros.com> Signed-off-by: NJohn W. Linville <linville@tuxdriver.com>
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由 Felix Fietkau 提交于
Older versions have not been sold and the driver does not explicitly check for them anyway, so we can simply ignore the macRev here. Reduces ath9k_hw size on mips by more than 2 KB. Signed-off-by: NFelix Fietkau <nbd@openwrt.org> Signed-off-by: NJohn W. Linville <linville@tuxdriver.com>
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- 31 3月, 2011 1 次提交
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由 Felix Fietkau 提交于
Fixes interop issues with aggregation in combination with multi-BSSID Signed-off-by: NFelix Fietkau <nbd@openwrt.org> Signed-off-by: NJohn W. Linville <linville@tuxdriver.com>
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- 24 2月, 2011 1 次提交
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由 Sujith Manoharan 提交于
Some AR7010 based devices are recognized as storage media. Sending a CD-EJECT command to the device will 'convert' it into a WLAN device. Do this within the driver itself, removing the dependancy on an external program (usb_modeswitch). Signed-off-by: NSujith Manoharan <Sujith.Manoharan@atheros.com> Signed-off-by: NJohn W. Linville <linville@tuxdriver.com>
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