1. 18 12月, 2012 1 次提交
  2. 07 12月, 2012 1 次提交
    • H
      mmc: omap_hsmmc: Enable HSPE bit for high speed cards · cd587096
      Hebbar, Gururaja 提交于
      HSMMC IP on AM33xx need a special setting to handle High-speed cards.
      Other platforms like TI81xx, OMAP4 may need this as-well. This depends
      on the HSMMC IP timing closure done for the high speed cards.
      
      From AM335x TRM (SPRUH73F - 18.3.12 Output Signals Generation):
      
      The MMC/SD/SDIO output signals can be driven on either falling edge or
      rising edge depending on the SD_HCTL[2] HSPE bit. This feature allows
      to reach better timing performance, and thus to increase data transfer
      frequency.
      
      There are few pre-requisites for enabling the HSPE bit
      - Controller should support High-Speed-Enable Bit and
      - Controller should not be using DDR Mode and
      - Controller should advertise that it supports High Speed in
        capabilities register and
      - MMC/SD clock coming out of controller > 25MHz
      Signed-off-by: NHebbar, Gururaja <gururaja.hebbar@ti.com>
      Signed-off-by: NVenkatraman S <svenkatr@ti.com>
      Signed-off-by: NChris Ball <cjb@laptop.org>
      cd587096
  3. 01 12月, 2012 1 次提交
    • T
      ARM: OMAP: Move plat-omap/dma-omap.h to include/linux/omap-dma.h · 45c3eb7d
      Tony Lindgren 提交于
      Based on earlier discussions[1] we attempted to find a suitable
      location for the omap DMA header in commit 2b6c4e73 (ARM: OMAP:
      DMA: Move plat/dma.h to plat-omap/dma-omap.h) until the conversion
      to dmaengine is complete.
      
      Unfortunately that was before I was able to try to test compile
      of the ARM multiplatform builds for omap2+, and the end result
      was not very good.
      
      So I'm creating yet another all over the place patch to cut the
      last dependency for building omap2+ for ARM multiplatform. After
      this, we have finally removed the driver dependencies to the
      arch/arm code, except for few drivers that are being worked on.
      
      The other option was to make the <plat-omap/dma-omap.h> path
      to work, but we'd have to add some new header directory to for
      multiplatform builds.
      
      Or we would have to manually include arch/arm/plat-omap/include
      again from arch/arm/Makefile for omap2+.
      
      Neither of these alternatives sound appealing as they will
      likely lead addition of various other headers exposed to the
      drivers, which we want to avoid for the multiplatform kernels.
      
      Since we already have a minimal include/linux/omap-dma.h,
      let's just use that instead and add a note to it to not
      use the custom omap DMA functions any longer where possible.
      
      Note that converting omap DMA to dmaengine depends on
      dmaengine supporting automatically incrementing the FIFO
      address at the device end, and converting all the remaining
      legacy drivers. So it's going to be few more merge windows.
      
      [1] https://patchwork.kernel.org/patch/1519591/#
      
      cc: Russell King <linux@arm.linux.org.uk>
      cc: Kevin Hilman <khilman@ti.com>
      cc: "Benoît Cousson" <b-cousson@ti.com>
      cc: Herbert Xu <herbert@gondor.apana.org.au>
      cc: "David S. Miller" <davem@davemloft.net>
      cc: Vinod Koul <vinod.koul@intel.com>
      cc: Dan Williams <djbw@fb.com>
      cc: Mauro Carvalho Chehab <mchehab@infradead.org>
      cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
      cc: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
      cc: David Woodhouse <dwmw2@infradead.org>
      cc: Kyungmin Park <kyungmin.park@samsung.com>
      cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
      cc: Tomi Valkeinen <tomi.valkeinen@ti.com>
      cc: Florian Tobias Schandinat <FlorianSchandinat@gmx.de>
      cc: Hans Verkuil <hans.verkuil@cisco.com>
      cc: Vaibhav Hiremath <hvaibhav@ti.com>
      cc: Lokesh Vutla <lokeshvutla@ti.com>
      cc: Rusty Russell <rusty@rustcorp.com.au>
      cc: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
      cc: Afzal Mohammed <afzal@ti.com>
      cc: linux-crypto@vger.kernel.org
      cc: linux-media@vger.kernel.org
      cc: linux-mtd@lists.infradead.org
      cc: linux-usb@vger.kernel.org
      cc: linux-fbdev@vger.kernel.org
      Acked-by: NFelipe Balbi <balbi@ti.com>
      Signed-off-by: NTony Lindgren <tony@atomide.com>
      45c3eb7d
  4. 21 11月, 2012 5 次提交
  5. 17 11月, 2012 5 次提交
    • J
      ARM: OMAP: Add platform data header for DMTIMERs · 40fc3bb5
      Jon Hunter 提交于
      Move definition of dmtimer platform data structure in to its own header
      under <linux/platform_data>.
      Signed-off-by: NJon Hunter <jon-hunter@ti.com>
      40fc3bb5
    • J
      ARM: OMAP: Remove unnecessary omap_dm_timer structure declaration · 755ae860
      Jon Hunter 提交于
      Remove unnecessary declaration of structure omap_dm_timer from dmtimer.h and
      move the actual declaration of structure omap_dm_timer towards top of dmtimer.h
      to avoid any compilation errors.
      Signed-off-by: NJon Hunter <jon-hunter@ti.com>
      755ae860
    • J
      ARM: OMAP: Don't store timers physical address · 61b001c5
      Jon Hunter 提交于
      The OMAP2+ system timer code stores the physical address of the timer
      but never uses it. Remove this and clean-up the code by removing the
      local variable "size" and changing the names of the local variables
      mem_rsrc and irq_rsrc to mem and irq, respectively.
      Signed-off-by: NJon Hunter <jon-hunter@ti.com>
      61b001c5
    • J
      ARM: OMAP: Define omap_dm_timer_prepare function as static · b0cadb3c
      Jon Hunter 提交于
      The omap_dm_timer_prepare function is a local function only used in the
      dmtimer.c file. Therefore, make this a static function and remove its
      declaration from the dmtimer.h file.
      Signed-off-by: NJon Hunter <jon-hunter@ti.com>
      b0cadb3c
    • J
      ARM: OMAP: Clean-up dmtimer reset code · ae6672cb
      Jon Hunter 提交于
      Only OMAP1 devices use the omap_dm_timer_reset() and so require the
      omap_dm_timer_wait_for_reset() and __omap_dm_timer_reset() functions.
      Therefore combine these into a single function called omap_dm_timer_reset()
      and simplify the code.
      
      The omap_dm_timer_reset() function is now the only place that is using the
      omap_dm_timer structure member "sys_stat". Therefore, remove this member and
      just use the register offset definition to simplify and clean-up the code. The
      TISTAT register is only present on revision 1 timers and so check for this in
      the omap_dm_timer_reset() function.
      
      Please note that for OMAP1 devices, the TIOCP_CFG register does not have the
      clock-activity field and so when we reset the timer for an OMAP1 device we
      only need to configure the idle-mode field in the TIOCP_CFG register.
      Signed-off-by: NJon Hunter <jon-hunter@ti.com>
      ae6672cb
  6. 13 11月, 2012 7 次提交
    • T
      OMAP: remove vram allocator · 966458f8
      Tomi Valkeinen 提交于
      OMAP specific vram allocator is no longer in use, and we can remove all
      the vram code.
      Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>
      966458f8
    • J
      ARM: OMAP: Remove __omap_dm_timer_set_source function · b1538832
      Jon Hunter 提交于
      The __omap_dm_timer_set_source() function is only used by the system timer
      (clock-events and clock-source) code for OMAP2+ devices. Therefore, we can
      remove this code from the dmtimer driver and move it to the system timer
      code for OMAP2+ devices.
      
      The current __omap_dm_timer_set_source() function calls clk_disable() before
      calling clk_set_parent() and clk_enable() afterwards. We can avoid these calls
      to clk_disable/enable by moving the calls to omap_hwmod_setup_one() and
      omap_hwmod_enable() to after the call to clk_set_parent() in
      omap_dm_timer_init_one().
      
      The function omap_hwmod_setup_one() will enable the timers functional clock
      and therefore increment the use-count of the functional clock to 1.
      clk_set_parent() will fail if the use-count is not 0 when called. Hence, if
      omap_hwmod_setup_one() is called before clk_set_parent(), we will need to call
      clk_disable() before calling clk_set_parent() to decrement the use-count.
      Hence, avoid these extra calls to disable and enable the functional clock by
      moving the calls to omap_hwmod_setup_one() and omap_hwmod_enable() to after
      clk_set_parent().
      
      We can also remove the delay from the __omap_dm_timer_set_source() function
      because enabling the clock will now be handled via the HWMOD framework by
      calling omap_hwmod_setup_one(). Therefore, by moving the calls to
      omap_hwmod_setup_one() and omap_hwmod_enable() to after the call to
      clk_set_parent(), we can simply replace __omap_dm_timer_set_source() with
      clk_set_parent().
      
      It should be safe to move these hwmod calls to later in the
      omap_dm_timer_init_one() because other calls to the hwmod layer that occur
      before are just requesting resource information.
      
      Testing includes boot testing on OMAP2420 H4, OMAP3430 SDP and OMAP4430 Blaze
      with the following configurations:
      1. CONFIG_OMAP_32K_TIMER=y
      2. CONFIG_OMAP_32K_TIMER=y and boot parameter "clocksource=gp_timer"
      3. CONFIG_OMAP_32K_TIMER not set
      4. CONFIG_OMAP_32K_TIMER not set and boot parameter "clocksource=gp_timer"
      Signed-off-by: NJon Hunter <jon-hunter@ti.com>
      Acked-by: NSantosh Shilimkar <santosh.shilimkar@ti.com>
      b1538832
    • J
      ARM: OMAP: Add dmtimer interrupt disable function · 4249d96c
      Jon Hunter 提交于
      The OMAP dmtimer driver does not currently have a function to disable the
      timer interrupts. For some timer instances the timer interrupt enable
      function can be used to disable the interrupts because the same interrupt
      enable register is used to disable interrupts. However, some timer instances
      have separate interrupt enable/disable registers and so this will not work.
      Therefore, add a dedicated function to disable interrupts.
      
      This change is required for OMAP4+ devices. For OMAP4, all timers apart from 1,
      2 and 10 need this function and for OMAP5 all timers need this function.
      Please note that the interrupt disable function has been written so that it
      can be used by all OMAP devices.
      Signed-off-by: NJon Hunter <jon-hunter@ti.com>
      Acked-by: NSantosh Shilimkar <santosh.shilimkar@ti.com>
      4249d96c
    • J
      ARM: OMAP: Don't restore DMTIMER interrupt status register · 1eaff710
      Jon Hunter 提交于
      Restoring the timer interrupt status is not possible because writing a 1 to any
      bit in the register clears that bit if set and writing a 0 has no affect.
      Furthermore, if an interrupt is pending when someone attempts to disable a
      timer, the timer will fail to transition to the idle state and hence it's
      context will not be lost. Users should take care to service all interrupts
      before disabling the timer.
      Signed-off-by: NJon Hunter <jon-hunter@ti.com>
      Acked-by: NSantosh Shilimkar <santosh.shilimkar@ti.com>
      1eaff710
    • J
      ARM: OMAP: Don't restore of DMTIMER TISTAT register · d3004bb4
      Jon Hunter 提交于
      The timer TISTAT register is a read-only register and therefore restoring the
      context is not needed. Furthermore, the context of TISTAT is never saved
      anywhere in the current code. The TISTAT register is read-only for all OMAP
      devices from OMAP1 to OMAP4. OMAP5 timers no longer have this register.
      Signed-off-by: NJon Hunter <jon-hunter@ti.com>
      Acked-by: NSantosh Shilimkar <santosh.shilimkar@ti.com>
      d3004bb4
    • J
      ARM: OMAP3+: Implement timer workaround for errata i103 and i767 · bfd6d021
      Jon Hunter 提交于
      Errata Titles:
      i103: Delay needed to read some GP timer, WD timer and sync timer
            registers after wakeup (OMAP3/4)
      i767: Delay needed to read some GP timer registers after wakeup (OMAP5)
      
      Description (i103/i767):
      If a General Purpose Timer (GPTimer) is in posted mode
      (TSICR [2].POSTED=1), due to internal resynchronizations, values read in
      TCRR, TCAR1 and TCAR2 registers right after the timer interface clock
      (L4) goes from stopped to active may not return the expected values. The
      most common event leading to this situation occurs upon wake up from
      idle.
      
      GPTimer non-posted synchronization mode is not impacted by this
      limitation.
      
      Workarounds:
      1). Disable posted mode
      2). Use static dependency between timer clock domain and MPUSS clock
          domain
      3). Use no-idle mode when the timer is active
      
      Workarounds #2 and #3 are not pratical from a power standpoint and so
      workaround #1 has been implemented. Disabling posted mode adds some CPU
      overhead for configuring and reading the timers as the CPU has to wait
      for accesses to be re-synchronised within the timer. However, disabling
      posted mode guarantees correct operation.
      
      Please note that it is safe to use posted mode for timers if the counter
      (TCRR) and capture (TCARx) registers will never be read. An example of
      this is the clock-event system timer. This is used by the kernel to
      schedule events however, the timers counter is never read and capture
      registers are not used. Given that the kernel configures this timer
      often yet never reads the counter register it is safe to enable posted
      mode in this case. Hence, for the timer used for kernel clock-events,
      posted mode is enabled by overriding the errata for devices that are
      impacted by this defect.
      
      For drivers using the timers that do not read the counter or capture
      registers and wish to use posted mode, can override the errata and
      enable posted mode by making the following function calls.
      
      	__omap_dm_timer_override_errata(timer, OMAP_TIMER_ERRATA_I103_I767);
      	__omap_dm_timer_enable_posted(timer);
      
      Both dmtimers and watchdogs are impacted by this defect this patch only
      implements the workaround for the dmtimer. Currently the watchdog driver
      does not read the counter register and so no workaround is necessary.
      
      Posted mode will be disabled for all OMAP2+ devices (including AM33xx)
      using a GP timer as a clock-source timer to guarantee correct operation.
      This is not necessary for OMAP24xx devices but the default clock-source
      timer for OMAP24xx devices is the 32k-sync timer and not the GP timer
      and so should not have any impact. This should be re-visited for future
      devices if this errata is fixed.
      
      Confirmed with Vaibhav Hiremath that this bug also impacts AM33xx
      devices.
      Signed-off-by: NJon Hunter <jon-hunter@ti.com>
      Acked-by: NSantosh Shilimkar <santosh.shilimkar@ti.com>
      bfd6d021
    • J
      ARM: OMAP: Add DMTIMER definitions for posted mode · 971d0254
      Jon Hunter 提交于
      For OMAP2+ devices, when using DMTIMERs for system timers (clock-events and
      clock-source) the posted mode configuration of the timers is used. To allow
      the compiler to optimise the functions for configuring and reading the system
      timers, the posted flag variable is hard-coded with the value 1. To make it
      clear that posted mode is being used add some definitions so that it is more
      readable.
      Signed-off-by: NJon Hunter <jon-hunter@ti.com>
      Acked-by: NSantosh Shilimkar <santosh.shilimkar@ti.com>
      971d0254
  7. 09 11月, 2012 5 次提交
  8. 07 11月, 2012 1 次提交
  9. 04 11月, 2012 2 次提交
  10. 03 11月, 2012 1 次提交
    • J
      ARM: OMAP: Add function to request a timer by capability · 373fe0bd
      Jon Hunter 提交于
      Currently OMAP timers can be requested by requesting any available or by a
      numerical device ID. If a specific timer is required because it has a particular
      capability, such as can interrupt the on-chip DSP in addition to the ARM CPU,
      then the user needs to know the device ID of the timer with this feature.
      Therefore, add a new API called omap_dm_timer_request_by_cap() that allows
      drivers to request a timer by capability.
      Signed-off-by: NJon Hunter <jon-hunter@ti.com>
      373fe0bd
  11. 01 11月, 2012 8 次提交
  12. 31 10月, 2012 1 次提交
    • P
      ARM: OMAP2+: hwmod: add flag to prevent hwmod code from touching IP block during init · 5fb3d522
      Paul Walmsley 提交于
      Add HWMOD_EXT_OPT_MAIN_CLK flag to indicate that this IP block is
      dependent on an off-chip functional clock that is not guaranteed to be
      present during initialization.  IP blocks marked with this flag are
      left in the INITIALIZED state during kernel init.
      
      This is a workaround for a hardware problem.  It should be possible to
      guarantee that at least one clock source will be present and active
      for any IP block's main functional clock.  This ensures that the hwmod
      code can enable and reset the IP block.  Resetting the IP block during
      kernel init prevents any bogus bootloader, ROM code, or previous OS
      configuration from affecting the kernel.  Hopefully a clock
      multiplexer can be added on future SoCs.
      
      N.B., at some point in the future, it should be possible to query the
      clock framework for this type of information.  Then this flag should
      no longer be needed.
      Signed-off-by: NPaul Walmsley <paul@pwsan.com>
      Cc: Benoît Cousson <b-cousson@ti.com>
      5fb3d522
  13. 25 10月, 2012 2 次提交
    • F
      ARM: OMAP: move OMAP USB platform data to <linux/platform_data/omap-usb.h> · e8c4a7ac
      Felipe Balbi 提交于
      In order to make single zImage work for ARM architecture,
      we need to make sure we don't depend on private headers.
      
      Move USB platform_data to <linux/platform_data/omap-usb.h>
      and add a minimal drivers/mfd/usb-omap.h.
      
      Cc: Samuel Ortiz <sameo@linux.intel.com>
      Cc: Alan Stern <stern@rowland.harvard.edu>
      Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
      Cc: Partha Basak <parthab@india.ti.com>
      Cc: Keshava Munegowda <keshava_mgowda@ti.com>
      Cc: linux-usb@vger.kernel.org
      Signed-off-by: NFelipe Balbi <balbi@ti.com>
      [tony@atomide.com: updated for local mfd/usb-omap.h]
      Signed-off-by: NTony Lindgren <tony@atomide.com>
      e8c4a7ac
    • T
      ARM: OMAP2+: Introduce local usb.h · 54db6eee
      Tony Lindgren 提交于
      Let's move what we can from plat/usb.h to the local usb.h
      for ARM common zImage support.
      
      This is needed so we can remove plat/usb.h for ARM common
      zImage support.
      
      Cc: Samuel Ortiz <sameo@linux.intel.com>
      Cc: Alan Stern <stern@rowland.harvard.edu>
      Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
      Cc: Partha Basak <parthab@india.ti.com>
      Cc: Keshava Munegowda <keshava_mgowda@ti.com>
      Cc: linux-usb@vger.kernel.org
      Acked-by: NFelipe Balbi <balbi@ti.com>
      Signed-off-by: NTony Lindgren <tony@atomide.com>
      54db6eee