- 18 3月, 2014 1 次提交
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由 Patrik Jakobsson 提交于
Signed-off-by: NPatrik Jakobsson <patrik.r.jakobsson@gmail.com>
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- 15 8月, 2013 2 次提交
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由 Patrik Jakobsson 提交于
Add a callback hook to the chip ops struct to allow chips to have their specific self-refresh function. Currently only used by cdv. Signed-off-by: NPatrik Jakobsson <patrik.r.jakobsson@gmail.com>
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由 Patrik Jakobsson 提交于
Add a callback hook to the chip ops struct to allow chips to have their specific fifo watermark update function. Currently only cdv actually tries to set wms based on crtc configuration but if/when the other chips needs it we can attach a callback for them as well. Signed-off-by: NPatrik Jakobsson <patrik.r.jakobsson@gmail.com>
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- 24 7月, 2013 12 次提交
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由 Patrik Jakobsson 提交于
The psb_intel_encoder is generic and should be named appropriately Signed-off-by: NPatrik Jakobsson <patrik.r.jakobsson@gmail.com>
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由 Patrik Jakobsson 提交于
The psb_intel_crtc is generic and should be named appropriately Signed-off-by: NPatrik Jakobsson <patrik.r.jakobsson@gmail.com>
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由 Patrik Jakobsson 提交于
Signed-off-by: NPatrik Jakobsson <patrik.r.jakobsson@gmail.com>
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由 Patrik Jakobsson 提交于
Signed-off-by: NPatrik Jakobsson <patrik.r.jakobsson@gmail.com>
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由 Patrik Jakobsson 提交于
Signed-off-by: NPatrik Jakobsson <patrik.r.jakobsson@gmail.com>
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由 Patrik Jakobsson 提交于
Signed-off-by: NPatrik Jakobsson <patrik.r.jakobsson@gmail.com>
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由 Patrik Jakobsson 提交于
There is a slight difference in how we pick the palette register in the generic function but we should be ok as long as psb_intel_crtc->pipe and the register map is sane. Signed-off-by: NPatrik Jakobsson <patrik.r.jakobsson@gmail.com>
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由 Patrik Jakobsson 提交于
Signed-off-by: NPatrik Jakobsson <patrik.r.jakobsson@gmail.com>
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由 Patrik Jakobsson 提交于
Signed-off-by: NPatrik Jakobsson <patrik.r.jakobsson@gmail.com>
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由 Patrik Jakobsson 提交于
This patch makes cdv use the gma_xxx counterparts that are identical. I took them in one sweep as they should not cause any regressions. Signed-off-by: NPatrik Jakobsson <patrik.r.jakobsson@gmail.com>
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由 Patrik Jakobsson 提交于
Replace any use of xxx_intel_pipe_has_type() with the generic gma_pipe_has_type() function. Poulsbo still use it but that will be removed when we rip out psb_intel_pipe_has_type(). Signed-off-by: NPatrik Jakobsson <patrik.r.jakobsson@gmail.com>
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由 Patrik Jakobsson 提交于
Add chip specific callbacks for the generic and non-generic clock calculation code. Also remove as much dupilicated code as possible. Signed-off-by: NPatrik Jakobsson <patrik.r.jakobsson@gmail.com>
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- 10 6月, 2013 2 次提交
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由 Patrik Jakobsson 提交于
The internal crtc cursor gem object pointer was never set/updated since it was required to be set in the first place. Fixing this will make the pin/unpin count match and prevent cursor objects from leaking when userspace drops all references to it. Also make sure we drop the gem obj reference on failure. This patch only affects Cedarview chips. Signed-off-by: NPatrik Jakobsson <patrik.r.jakobsson@gmail.com>
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由 Patrik Jakobsson 提交于
The framebuffer needs to be unpinned in the crtc->disable callback because of previous pinning in psb_intel_pipe_set_base(). This will fix a memory leak where the framebuffer was released but not unpinned properly. This patch only affects Cedarview. Bugzilla: https://bugzilla.redhat.com/show_bug.cgi?id=889511 Bugzilla: https://bugzilla.novell.com/show_bug.cgi?id=812113 Cc: stable@vger.kernel.org Reviewed-by: NDaniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: NPatrik Jakobsson <patrik.r.jakobsson@gmail.com>
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- 24 8月, 2012 8 次提交
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由 Forest Bond 提交于
This is set when setting DPMS on and off, but it isn't checked anywhere, so just remove it. Signed-off-by: NForest Bond <forest.bond@rapidrollout.com> Signed-off-by: NAlan Cox <alan@linux.intel.com> Signed-off-by: NDave Airlie <airlied@redhat.com>
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由 Forest Bond 提交于
Signed-off-by: NForest Bond <forest.bond@rapidrollout.com> Signed-off-by: NAlan Cox <alan@linux.intel.com> Signed-off-by: NDave Airlie <airlied@redhat.com>
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由 Alan Cox 提交于
We should be making this call not praying that the values are right. In addition as noted by Josiah Standing we should be calling this for eDP as well. Signed-off-by: NAlan Cox <alan@linux.intel.com> Signed-off-by: NDave Airlie <airlied@redhat.com>
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由 Zhao Yakui 提交于
Introduce the eDP support into the driver. This has been reworked a bit because kernel driver proper uses encoder/connectors while the legacy Intel driver uses the old output stuff. It also diverges on the backlight handling. The legacy Intel driver adds a panel abstraction based upon the i915 one. It's only really used for backlight bits and we have a perfectly good backlight abstraction which can extend instead. Signed-off-by: NZhao Yakui <yakui.zhao@intel.com> [ported to upstream driver, redid backlight abstraction] Signed-off-by: NAlan Cox <alan@linux.intel.com> Signed-off-by: NDave Airlie <airlied@redhat.com>
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由 Alan Cox 提交于
This is mostly just aligning bits of behaviour Signed-off-by: NAlan Cox <alan@linux.intel.com> Signed-off-by: NDave Airlie <airlied@redhat.com>
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由 Alan Cox 提交于
Based on bits from Yakui <yakui.zhao@intel.com> We can import various little bits of code before we plumb it all in and hopefully this way catch any regressions more easily. Signed-off-by: NAlan Cox <alan@linux.intel.com> Signed-off-by: NDave Airlie <airlied@redhat.com>
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由 Zhao Yakui 提交于
Based on the spec, the CRT output doesn't use the lane. And the HDMI B output uses the Lane0/1 while the HDMI C output uses the Lane 2/3. But currently it will program all the four lanes for the CRT/HDMI. Signed-off-by: NZhao Yakui <yakui.zhao@intel.com> [Ported to the in-kernel driver] Signed-off-by: NAlan Cox <alan@linux.intel.com> Signed-off-by: NDave Airlie <airlied@redhat.com>
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由 Zhao Yakui 提交于
Currently when trying to call the DPMS off again for one CRTC with DPMS off, it will firstly disable the SR and can't enable it again because of the incorrect check/logic. In such case the self refresh is still disabled although one CRTC pipe is active. This is wrong. Signed-off-by: NZhao Yakui <yakui.zhao@intel.com> [Ported to in kernel driver] Signed-off-by: NAlan Cox <alan@linux.intel.com> Signed-off-by: NDave Airlie <airlied@redhat.com>
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- 20 7月, 2012 1 次提交
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由 Laurent Pinchart 提交于
The passed mode must not be modified by the operation, make it const. Signed-off-by: NLaurent Pinchart <laurent.pinchart@ideasonboard.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NDave Airlie <airlied@redhat.com>
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- 12 5月, 2012 2 次提交
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由 Alan Cox 提交于
Signed-off-by: NAlan Cox <alan@linux.intel.com> Signed-off-by: NDave Airlie <airlied@redhat.com>
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由 Alan Cox 提交于
This starts the move away from lots of confused unions of per driver stuff inherited when we merged the drivers together. Signed-off-by: NAlan Cox <alan@linux.intel.com> Signed-off-by: NDave Airlie <airlied@redhat.com>
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- 27 4月, 2012 2 次提交
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由 Alan Cox 提交于
In particular clean up the errata handling and correct the crtc masks. We do this a bit differently using our device abstraction for neatness. This doesn't address the ACPI opregion and hotplug plumbing, nor the IRQ related changes that will need. It touches on backlight init but the full backlight support is not in this change set. Signed-off-by: NAlan Cox <alan@linux.intel.com> Signed-off-by: NDave Airlie <airlied@redhat.com>
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由 Alan Cox 提交于
Signed-off-by: NDave Airlie <airlied@redhat.com>
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- 10 3月, 2012 5 次提交
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由 Kirill A. Shutemov 提交于
Signed-off-by: NKirill A. Shutemov <kirill.shutemov@linux.intel.com> Signed-off-by: NAlan Cox <alan@linux.intel.com> Signed-off-by: NDave Airlie <airlied@redhat.com>
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由 Kirill A. Shutemov 提交于
Signed-off-by: NKirill A. Shutemov <kirill.shutemov@linux.intel.com> Signed-off-by: NAlan Cox <alan@linux.intel.com> Signed-off-by: NDave Airlie <airlied@redhat.com>
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由 Kirill A. Shutemov 提交于
Signed-off-by: NKirill A. Shutemov <kirill.shutemov@linux.intel.com> Signed-off-by: NAlan Cox <alan@linux.intel.com> Signed-off-by: NDave Airlie <airlied@redhat.com>
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由 Alan Cox 提交于
Rework registers handling to prepare for Medfield. Signed-off-by: NAlan Cox <alan@linux.intel.com> [split out from a single big patch] Signed-off-by: NKirill A. Shutemov <kirill.shutemov@linux.intel.com> Signed-off-by: NDave Airlie <airlied@redhat.com>
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由 Alan Cox 提交于
Signed-off-by: NAlan Cox <alan@linux.intel.com> Signed-off-by: NDave Airlie <airlied@redhat.com>
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- 20 12月, 2011 2 次提交
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由 Patrik Jakobsson 提交于
Replace psb_intel_output with psb_intel_encoder and psb_intel_connector. Things will need to be cleaned up and tested so consider this an initial patch for Cedarview. Signed-off-by: NPatrik Jakobsson <patrik.r.jakobsson@gmail.com> Signed-off-by: NAlan Cox <alan@linux.intel.com> Signed-off-by: NDave Airlie <airlied@redhat.com>
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由 Ville Syrjälä 提交于
Otherwise each driver would need to keep the information inside their own framebuffer object structure. Also add offsets[]. BOs on the other hand are driver specific, so those can be kept in driver specific structures. Signed-off-by: NVille Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: NDave Airlie <airlied@redhat.com>
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- 16 11月, 2011 1 次提交
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由 Alan Cox 提交于
Again this is similar but has some differences so we have a set of plug in support. This does make the driver bigger than is needed in some respects but the tradeoff for maintainability is huge. Signed-off-by: NAlan Cox <alan@linux.intel.com> Signed-off-by: NDave Airlie <airlied@redhat.com>
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- 09 7月, 2011 1 次提交
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由 Alan Cox 提交于
We are close to having PSB and CDV ready for moving from staging so it's time to get the polish out. Signed-off-by: NAlan Cox <alan@linux.intel.com> Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
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- 05 7月, 2011 1 次提交
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由 Alan Cox 提交于
A lot of the intel_display stuff is duplicated, but we will add it first, clean it up and then investigate the best way to merge stuff. This first block integrates the various basic chunks of the CDV display setup. Signed-off-by: NAlan Cox <alan@linux.intel.com> Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
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